From c2b3aaa7d1b8364bad82cfcdbdd870d58a4d36a0 Mon Sep 17 00:00:00 2001 From: Blaise Tine Date: Thu, 12 Aug 2021 20:05:43 -0700 Subject: [PATCH] enabling delayed tracing --- driver/opae/vlsim/opae_sim.cpp | 12 ++- hw/dpi/float_dpi.vh | 44 ++++----- hw/dpi/util_dpi.cpp | 16 ++++ hw/dpi/util_dpi.vh | 10 +- hw/rtl/VX_alu_unit.v | 4 +- hw/rtl/VX_commit.v | 32 +++---- hw/rtl/VX_decode.v | 6 +- hw/rtl/VX_icache_stage.v | 4 +- hw/rtl/VX_issue.v | 50 +++++----- hw/rtl/VX_lsu_unit.v | 38 ++++---- hw/rtl/VX_muldiv.v | 4 - hw/rtl/VX_platform.vh | 30 +++--- hw/rtl/VX_print_instr.vh | 168 ++++++++++++++++----------------- hw/rtl/VX_scoreboard.v | 6 +- hw/rtl/Vortex.v | 6 +- hw/rtl/afu/VX_avs_wrapper.v | 11 ++- hw/rtl/afu/vortex_afu.sv | 44 ++++----- hw/rtl/cache/VX_bank.v | 18 ++-- hw/rtl/cache/VX_data_access.v | 6 +- hw/rtl/cache/VX_miss_resrv.v | 22 ++--- hw/rtl/cache/VX_shared_mem.v | 24 ++--- hw/rtl/cache/VX_tag_access.v | 8 +- hw/simulate/simulator.cpp | 16 +++- 23 files changed, 305 insertions(+), 274 deletions(-) diff --git a/driver/opae/vlsim/opae_sim.cpp b/driver/opae/vlsim/opae_sim.cpp index a5a6454e..a97a8457 100644 --- a/driver/opae/vlsim/opae_sim.cpp +++ b/driver/opae/vlsim/opae_sim.cpp @@ -10,6 +10,10 @@ #define ENABLE_MEM_STALLS +#ifndef TRACE_DELAY +#define TRACE_DELAY 0 +#endif + #ifndef MEM_LATENCY #define MEM_LATENCY 24 #endif @@ -26,7 +30,9 @@ #define VERILATOR_RESET_VALUE 2 #endif -uint64_t timestamp = 0; +uint64_t sim_trace_delay = TRACE_DELAY; + +static uint64_t timestamp = 0; double sc_time_stamp() { return timestamp; @@ -198,7 +204,9 @@ void opae_sim::step() { void opae_sim::eval() { vortex_afu_->eval(); #ifdef VCD_OUTPUT - trace_->dump(timestamp); + if (timestamp >= sim_trace_delay) { + trace_->dump(timestamp); + } #endif ++timestamp; } diff --git a/hw/dpi/float_dpi.vh b/hw/dpi/float_dpi.vh index bba4c891..8a609ca5 100644 --- a/hw/dpi/float_dpi.vh +++ b/hw/dpi/float_dpi.vh @@ -1,31 +1,31 @@ `ifndef FLOAT_DPI `define FLOAT_DPI -import "DPI-C" context function void dpi_fadd(input int a, input int b, input bit[2:0] frm, output int result, output bit[4:0] fflags); -import "DPI-C" context function void dpi_fsub(input int a, input int b, input bit[2:0] frm, output int result, output bit[4:0] fflags); -import "DPI-C" context function void dpi_fmul(input int a, input int b, input bit[2:0] frm, output int result, output bit[4:0] fflags); -import "DPI-C" context function void dpi_fmadd(input int a, input int b, input int c, input bit[2:0] frm, output int result, output bit[4:0] fflags); -import "DPI-C" context function void dpi_fmsub(input int a, input int b, input int c, input bit[2:0] frm, output int result, output bit[4:0] fflags); -import "DPI-C" context function void dpi_fnmadd(input int a, input int b, input int c, input bit[2:0] frm, output int result, output bit[4:0] fflags); -import "DPI-C" context function void dpi_fnmsub(input int a, input int b, input int c, input bit[2:0] frm, output int result, output bit[4:0] fflags); +import "DPI-C" function void dpi_fadd(input int a, input int b, input bit[2:0] frm, output int result, output bit[4:0] fflags); +import "DPI-C" function void dpi_fsub(input int a, input int b, input bit[2:0] frm, output int result, output bit[4:0] fflags); +import "DPI-C" function void dpi_fmul(input int a, input int b, input bit[2:0] frm, output int result, output bit[4:0] fflags); +import "DPI-C" function void dpi_fmadd(input int a, input int b, input int c, input bit[2:0] frm, output int result, output bit[4:0] fflags); +import "DPI-C" function void dpi_fmsub(input int a, input int b, input int c, input bit[2:0] frm, output int result, output bit[4:0] fflags); +import "DPI-C" function void dpi_fnmadd(input int a, input int b, input int c, input bit[2:0] frm, output int result, output bit[4:0] fflags); +import "DPI-C" function void dpi_fnmsub(input int a, input int b, input int c, input bit[2:0] frm, output int result, output bit[4:0] fflags); -import "DPI-C" context function void dpi_fdiv(input int a, input int b, input bit[2:0] frm, output int result, output bit[4:0] fflags); -import "DPI-C" context function void dpi_fsqrt(input int a, input bit[2:0] frm, output int result, output bit[4:0] fflags); +import "DPI-C" function void dpi_fdiv(input int a, input int b, input bit[2:0] frm, output int result, output bit[4:0] fflags); +import "DPI-C" function void dpi_fsqrt(input int a, input bit[2:0] frm, output int result, output bit[4:0] fflags); -import "DPI-C" context function void dpi_ftoi(input int a, input bit[2:0] frm, output int result, output bit[4:0] fflags); -import "DPI-C" context function void dpi_ftou(input int a, input bit[2:0] frm, output int result, output bit[4:0] fflags); -import "DPI-C" context function void dpi_itof(input int a, input bit[2:0] frm, output int result, output bit[4:0] fflags); -import "DPI-C" context function void dpi_utof(input int a, input bit[2:0] frm, output int result, output bit[4:0] fflags); +import "DPI-C" function void dpi_ftoi(input int a, input bit[2:0] frm, output int result, output bit[4:0] fflags); +import "DPI-C" function void dpi_ftou(input int a, input bit[2:0] frm, output int result, output bit[4:0] fflags); +import "DPI-C" function void dpi_itof(input int a, input bit[2:0] frm, output int result, output bit[4:0] fflags); +import "DPI-C" function void dpi_utof(input int a, input bit[2:0] frm, output int result, output bit[4:0] fflags); -import "DPI-C" context function void dpi_fclss(input int a, output int result); -import "DPI-C" context function void dpi_fsgnj(input int a, input int b, output int result); -import "DPI-C" context function void dpi_fsgnjn(input int a, input int b, output int result); -import "DPI-C" context function void dpi_fsgnjx(input int a, input int b, output int result); +import "DPI-C" function void dpi_fclss(input int a, output int result); +import "DPI-C" function void dpi_fsgnj(input int a, input int b, output int result); +import "DPI-C" function void dpi_fsgnjn(input int a, input int b, output int result); +import "DPI-C" function void dpi_fsgnjx(input int a, input int b, output int result); -import "DPI-C" context function void dpi_flt(input int a, input int b, output int result, output bit[4:0] fflags); -import "DPI-C" context function void dpi_fle(input int a, input int b, output int result, output bit[4:0] fflags); -import "DPI-C" context function void dpi_feq(input int a, input int b, output int result, output bit[4:0] fflags); -import "DPI-C" context function void dpi_fmin(input int a, input int b, output int result, output bit[4:0] fflags); -import "DPI-C" context function void dpi_fmax(input int a, input int b, output int result, output bit[4:0] fflags); +import "DPI-C" function void dpi_flt(input int a, input int b, output int result, output bit[4:0] fflags); +import "DPI-C" function void dpi_fle(input int a, input int b, output int result, output bit[4:0] fflags); +import "DPI-C" function void dpi_feq(input int a, input int b, output int result, output bit[4:0] fflags); +import "DPI-C" function void dpi_fmin(input int a, input int b, output int result, output bit[4:0] fflags); +import "DPI-C" function void dpi_fmax(input int a, input int b, output int result, output bit[4:0] fflags); `endif \ No newline at end of file diff --git a/hw/dpi/util_dpi.cpp b/hw/dpi/util_dpi.cpp index 9469bc6e..cecf9974 100644 --- a/hw/dpi/util_dpi.cpp +++ b/hw/dpi/util_dpi.cpp @@ -14,8 +14,14 @@ extern "C" { int dpi_register(); void dpi_assert(int inst, bool cond, int delay); + + void dpi_trace(const char* format, ...); } +double sc_time_stamp(); + +extern uint64_t sim_trace_delay; + class ShiftRegister { public: ShiftRegister() : init_(false), depth_(0) {} @@ -133,4 +139,14 @@ void dpi_idiv(int a, int b, bool is_signed, int* quotient, int* remainder) { *remainder = dividen % divisor; } } +} + +void dpi_trace(const char* format, ...) { + uint64_t timestamp = (uint64_t)sc_time_stamp(); + if (timestamp < sim_trace_delay) + return; + va_list va; + va_start(va, format); + vprintf(format, va); + va_end(va); } \ No newline at end of file diff --git a/hw/dpi/util_dpi.vh b/hw/dpi/util_dpi.vh index 553641a7..6e685bd2 100644 --- a/hw/dpi/util_dpi.vh +++ b/hw/dpi/util_dpi.vh @@ -1,10 +1,12 @@ `ifndef UTIL_DPI `define UTIL_DPI -import "DPI-C" context function void dpi_imul(input int a, input int b, input logic is_signed_a, input logic is_signed_b, output int resultl, output int resulth); -import "DPI-C" context function void dpi_idiv(input int a, input int b, input logic is_signed, output int quotient, output int remainder); +import "DPI-C" function void dpi_imul(input int a, input int b, input logic is_signed_a, input logic is_signed_b, output int resultl, output int resulth); +import "DPI-C" function void dpi_idiv(input int a, input int b, input logic is_signed, output int quotient, output int remainder); -import "DPI-C" context function int dpi_register(); -import "DPI-C" context function void dpi_assert(int inst, input logic cond, input int delay); +import "DPI-C" function int dpi_register(); +import "DPI-C" function void dpi_assert(int inst, input logic cond, input int delay); + +import "DPI-C" function void dpi_trace(input string format /*verilator sformat*/); `endif \ No newline at end of file diff --git a/hw/rtl/VX_alu_unit.v b/hw/rtl/VX_alu_unit.v index bb8068b8..8f7f5e90 100644 --- a/hw/rtl/VX_alu_unit.v +++ b/hw/rtl/VX_alu_unit.v @@ -204,8 +204,8 @@ module VX_alu_unit #( `ifdef DBG_PRINT_PIPELINE always @(posedge clk) begin if (branch_ctl_if.valid) begin - $display("%t: core%0d-branch: wid=%0d, PC=%0h, taken=%b, dest=%0h", $time, CORE_ID, - branch_ctl_if.wid, alu_commit_if.PC, branch_ctl_if.taken, branch_ctl_if.dest); + dpi_trace("%d: core%0d-branch: wid=%0d, PC=%0h, taken=%b, dest=%0h\n", + $time, CORE_ID, branch_ctl_if.wid, alu_commit_if.PC, branch_ctl_if.taken, branch_ctl_if.dest); end end `endif diff --git a/hw/rtl/VX_commit.v b/hw/rtl/VX_commit.v index 807d874c..14fa7614 100644 --- a/hw/rtl/VX_commit.v +++ b/hw/rtl/VX_commit.v @@ -93,34 +93,34 @@ module VX_commit #( `ifdef DBG_PRINT_PIPELINE always @(posedge clk) begin if (alu_commit_if.valid && alu_commit_if.ready) begin - $write("%t: core%0d-commit: wid=%0d, PC=%0h, ex=ALU, tmask=%b, wb=%0d, rd=%0d, data=", $time, CORE_ID, alu_commit_if.wid, alu_commit_if.PC, alu_commit_if.tmask, alu_commit_if.wb, alu_commit_if.rd); - `PRINT_ARRAY1D(alu_commit_if.data, `NUM_THREADS); - $write("\n"); + dpi_trace("%d: core%0d-commit: wid=%0d, PC=%0h, ex=ALU, tmask=%b, wb=%0d, rd=%0d, data=", $time, CORE_ID, alu_commit_if.wid, alu_commit_if.PC, alu_commit_if.tmask, alu_commit_if.wb, alu_commit_if.rd); + `TRACE_ARRAY1D(alu_commit_if.data, `NUM_THREADS); + dpi_trace("\n"); end if (ld_commit_if.valid && ld_commit_if.ready) begin - $write("%t: core%0d-commit: wid=%0d, PC=%0h, ex=LSU, tmask=%b, wb=%0d, rd=%0d, data=", $time, CORE_ID, ld_commit_if.wid, ld_commit_if.PC, ld_commit_if.tmask, ld_commit_if.wb, ld_commit_if.rd); - `PRINT_ARRAY1D(ld_commit_if.data, `NUM_THREADS); - $write("\n"); + dpi_trace("%d: core%0d-commit: wid=%0d, PC=%0h, ex=LSU, tmask=%b, wb=%0d, rd=%0d, data=", $time, CORE_ID, ld_commit_if.wid, ld_commit_if.PC, ld_commit_if.tmask, ld_commit_if.wb, ld_commit_if.rd); + `TRACE_ARRAY1D(ld_commit_if.data, `NUM_THREADS); + dpi_trace("\n"); end if (st_commit_if.valid && st_commit_if.ready) begin - $display("%t: core%0d-commit: wid=%0d, PC=%0h, ex=LSU, tmask=%b, wb=%0d, rd=%0d", $time, CORE_ID, st_commit_if.wid, st_commit_if.PC, st_commit_if.tmask, st_commit_if.wb, st_commit_if.rd); + dpi_trace("%d: core%0d-commit: wid=%0d, PC=%0h, ex=LSU, tmask=%b, wb=%0d, rd=%0d\n", $time, CORE_ID, st_commit_if.wid, st_commit_if.PC, st_commit_if.tmask, st_commit_if.wb, st_commit_if.rd); end if (csr_commit_if.valid && csr_commit_if.ready) begin - $write("%t: core%0d-commit: wid=%0d, PC=%0h, ex=CSR, tmask=%b, wb=%0d, rd=%0d, data=", $time, CORE_ID, csr_commit_if.wid, csr_commit_if.PC, csr_commit_if.tmask, csr_commit_if.wb, csr_commit_if.rd); - `PRINT_ARRAY1D(csr_commit_if.data, `NUM_THREADS); - $write("\n"); + dpi_trace("%d: core%0d-commit: wid=%0d, PC=%0h, ex=CSR, tmask=%b, wb=%0d, rd=%0d, data=", $time, CORE_ID, csr_commit_if.wid, csr_commit_if.PC, csr_commit_if.tmask, csr_commit_if.wb, csr_commit_if.rd); + `TRACE_ARRAY1D(csr_commit_if.data, `NUM_THREADS); + dpi_trace("\n"); end `ifdef EXT_F_ENABLE if (fpu_commit_if.valid && fpu_commit_if.ready) begin - $write("%t: core%0d-commit: wid=%0d, PC=%0h, ex=FPU, tmask=%b, wb=%0d, rd=%0d, data=", $time, CORE_ID, fpu_commit_if.wid, fpu_commit_if.PC, fpu_commit_if.tmask, fpu_commit_if.wb, fpu_commit_if.rd); - `PRINT_ARRAY1D(fpu_commit_if.data, `NUM_THREADS); - $write("\n"); + dpi_trace("%d: core%0d-commit: wid=%0d, PC=%0h, ex=FPU, tmask=%b, wb=%0d, rd=%0d, data=", $time, CORE_ID, fpu_commit_if.wid, fpu_commit_if.PC, fpu_commit_if.tmask, fpu_commit_if.wb, fpu_commit_if.rd); + `TRACE_ARRAY1D(fpu_commit_if.data, `NUM_THREADS); + dpi_trace("\n"); end `endif if (gpu_commit_if.valid && gpu_commit_if.ready) begin - $write("%t: core%0d-commit: wid=%0d, PC=%0h, ex=GPU, tmask=%b, wb=%0d, rd=%0d, data=", $time, CORE_ID, gpu_commit_if.wid, gpu_commit_if.PC, gpu_commit_if.tmask, gpu_commit_if.wb, gpu_commit_if.rd); - `PRINT_ARRAY1D(gpu_commit_if.data, `NUM_THREADS); - $write("\n"); + dpi_trace("%d: core%0d-commit: wid=%0d, PC=%0h, ex=GPU, tmask=%b, wb=%0d, rd=%0d, data=", $time, CORE_ID, gpu_commit_if.wid, gpu_commit_if.PC, gpu_commit_if.tmask, gpu_commit_if.wb, gpu_commit_if.rd); + `TRACE_ARRAY1D(gpu_commit_if.data, `NUM_THREADS); + dpi_trace("\n"); end end `endif diff --git a/hw/rtl/VX_decode.v b/hw/rtl/VX_decode.v index e1d0d221..0c90e2b5 100644 --- a/hw/rtl/VX_decode.v +++ b/hw/rtl/VX_decode.v @@ -416,11 +416,11 @@ module VX_decode #( `ifdef DBG_PRINT_PIPELINE always @(posedge clk) begin if (decode_if.valid && decode_if.ready) begin - $write("%t: core%0d-decode: wid=%0d, PC=%0h, ex=", $time, CORE_ID, decode_if.wid, decode_if.PC); + dpi_trace("%d: core%0d-decode: wid=%0d, PC=%0h, ex=", $time, CORE_ID, decode_if.wid, decode_if.PC); print_ex_type(decode_if.ex_type); - $write(", op="); + dpi_trace(", op="); print_ex_op(decode_if.ex_type, decode_if.op_type, decode_if.op_mod); - $write(", mod=%0d, tmask=%b, wb=%b, rd=%0d, rs1=%0d, rs2=%0d, rs3=%0d, imm=%0h, use_pc=%b, use_imm=%b, use_regs=%b\n", decode_if.op_mod, decode_if.tmask, decode_if.wb, decode_if.rd, decode_if.rs1, decode_if.rs2, decode_if.rs3, decode_if.imm, decode_if.use_PC, decode_if.use_imm, decode_if.used_regs); + dpi_trace(", mod=%0d, tmask=%b, wb=%b, rd=%0d, rs1=%0d, rs2=%0d, rs3=%0d, imm=%0h, use_pc=%b, use_imm=%b, use_regs=%b\n", decode_if.op_mod, decode_if.tmask, decode_if.wb, decode_if.rd, decode_if.rs1, decode_if.rs2, decode_if.rs3, decode_if.imm, decode_if.use_PC, decode_if.use_imm, decode_if.used_regs); end end `endif diff --git a/hw/rtl/VX_icache_stage.v b/hw/rtl/VX_icache_stage.v index 1dfaa832..b05692c4 100644 --- a/hw/rtl/VX_icache_stage.v +++ b/hw/rtl/VX_icache_stage.v @@ -92,10 +92,10 @@ module VX_icache_stage #( `ifdef DBG_PRINT_CORE_ICACHE always @(posedge clk) begin if (icache_req_if.valid && icache_req_if.ready) begin - $display("%t: I$%0d req: wid=%0d, PC=%0h", $time, CORE_ID, ifetch_req_if.wid, ifetch_req_if.PC); + dpi_trace("%d: I$%0d req: wid=%0d, PC=%0h\n", $time, CORE_ID, ifetch_req_if.wid, ifetch_req_if.PC); end if (ifetch_rsp_if.valid && ifetch_rsp_if.ready) begin - $display("%t: I$%0d rsp: wid=%0d, PC=%0h, data=%0h", $time, CORE_ID, ifetch_rsp_if.wid, ifetch_rsp_if.PC, ifetch_rsp_if.data); + dpi_trace("%d: I$%0d rsp: wid=%0d, PC=%0h, data=%0h\n", $time, CORE_ID, ifetch_rsp_if.wid, ifetch_rsp_if.PC, ifetch_rsp_if.data); end end `endif diff --git a/hw/rtl/VX_issue.v b/hw/rtl/VX_issue.v index b589b341..5dc41aea 100644 --- a/hw/rtl/VX_issue.v +++ b/hw/rtl/VX_issue.v @@ -186,46 +186,46 @@ module VX_issue #( `ifdef DBG_PRINT_PIPELINE always @(posedge clk) begin if (alu_req_if.valid && alu_req_if.ready) begin - $write("%t: core%0d-issue: wid=%0d, PC=%0h, ex=ALU, tmask=%b, rd=%0d, rs1_data=", + dpi_trace("%d: core%0d-issue: wid=%0d, PC=%0h, ex=ALU, tmask=%b, rd=%0d, rs1_data=", $time, CORE_ID, alu_req_if.wid, alu_req_if.PC, alu_req_if.tmask, alu_req_if.rd); - `PRINT_ARRAY1D(alu_req_if.rs1_data, `NUM_THREADS); - $write(", rs2_data="); - `PRINT_ARRAY1D(alu_req_if.rs2_data, `NUM_THREADS); - $write("\n"); + `TRACE_ARRAY1D(alu_req_if.rs1_data, `NUM_THREADS); + dpi_trace(", rs2_data="); + `TRACE_ARRAY1D(alu_req_if.rs2_data, `NUM_THREADS); + dpi_trace("\n"); end if (lsu_req_if.valid && lsu_req_if.ready) begin - $write("%t: core%0d-issue: wid=%0d, PC=%0h, ex=LSU, tmask=%b, rd=%0d, offset=%0h, addr=", + dpi_trace("%d: core%0d-issue: wid=%0d, PC=%0h, ex=LSU, tmask=%b, rd=%0d, offset=%0h, addr=", $time, CORE_ID, lsu_req_if.wid, lsu_req_if.PC, lsu_req_if.tmask, lsu_req_if.rd, lsu_req_if.offset); - `PRINT_ARRAY1D(lsu_req_if.base_addr, `NUM_THREADS); - $write(", data="); - `PRINT_ARRAY1D(lsu_req_if.store_data, `NUM_THREADS); - $write("\n"); + `TRACE_ARRAY1D(lsu_req_if.base_addr, `NUM_THREADS); + dpi_trace(", data="); + `TRACE_ARRAY1D(lsu_req_if.store_data, `NUM_THREADS); + dpi_trace("\n"); end if (csr_req_if.valid && csr_req_if.ready) begin - $write("%t: core%0d-issue: wid=%0d, PC=%0h, ex=CSR, tmask=%b, rd=%0d, addr=%0h, rs1_data=", + dpi_trace("%d: core%0d-issue: wid=%0d, PC=%0h, ex=CSR, tmask=%b, rd=%0d, addr=%0h, rs1_data=", $time, CORE_ID, csr_req_if.wid, csr_req_if.PC, csr_req_if.tmask, csr_req_if.rd, csr_req_if.addr); - `PRINT_ARRAY1D(csr_req_if.rs1_data, `NUM_THREADS); - $write("\n"); + `TRACE_ARRAY1D(csr_req_if.rs1_data, `NUM_THREADS); + dpi_trace("\n"); end `ifdef EXT_F_ENABLE if (fpu_req_if.valid && fpu_req_if.ready) begin - $write("%t: core%0d-issue: wid=%0d, PC=%0h, ex=FPU, tmask=%b, rd=%0d, rs1_data=", + dpi_trace("%d: core%0d-issue: wid=%0d, PC=%0h, ex=FPU, tmask=%b, rd=%0d, rs1_data=", $time, CORE_ID, fpu_req_if.wid, fpu_req_if.PC, fpu_req_if.tmask, fpu_req_if.rd); - `PRINT_ARRAY1D(fpu_req_if.rs1_data, `NUM_THREADS); - $write(", rs2_data="); - `PRINT_ARRAY1D(fpu_req_if.rs2_data, `NUM_THREADS); - $write(", rs3_data="); - `PRINT_ARRAY1D(fpu_req_if.rs3_data, `NUM_THREADS); - $write("\n"); + `TRACE_ARRAY1D(fpu_req_if.rs1_data, `NUM_THREADS); + dpi_trace(", rs2_data="); + `TRACE_ARRAY1D(fpu_req_if.rs2_data, `NUM_THREADS); + dpi_trace(", rs3_data="); + `TRACE_ARRAY1D(fpu_req_if.rs3_data, `NUM_THREADS); + dpi_trace("\n"); end `endif if (gpu_req_if.valid && gpu_req_if.ready) begin - $write("%t: core%0d-issue: wid=%0d, PC=%0h, ex=GPU, tmask=%b, rd=%0d, rs1_data=", + dpi_trace("%d: core%0d-issue: wid=%0d, PC=%0h, ex=GPU, tmask=%b, rd=%0d, rs1_data=", $time, CORE_ID, gpu_req_if.wid, gpu_req_if.PC, gpu_req_if.tmask, gpu_req_if.rd); - `PRINT_ARRAY1D(gpu_req_if.rs1_data, `NUM_THREADS); - $write(", rs2_data="); - `PRINT_ARRAY1D(gpu_req_if.rs2_data, `NUM_THREADS); - $write("\n"); + `TRACE_ARRAY1D(gpu_req_if.rs1_data, `NUM_THREADS); + dpi_trace(", rs2_data="); + `TRACE_ARRAY1D(gpu_req_if.rs2_data, `NUM_THREADS); + dpi_trace("\n"); end end `endif diff --git a/hw/rtl/VX_lsu_unit.v b/hw/rtl/VX_lsu_unit.v index f8fbc104..81f052cd 100644 --- a/hw/rtl/VX_lsu_unit.v +++ b/hw/rtl/VX_lsu_unit.v @@ -324,8 +324,8 @@ module VX_lsu_unit #( for (integer i = 0; i < `LSUQ_SIZE; ++i) begin if (pending_reqs[i][0]) begin assert(($time - pending_reqs[i][1 +: 64]) < delay_timeout) else - $error("%t: *** D$%0d response timeout: remaining=%b, wid=%0d, PC=%0h, rd=%0d", $time, CORE_ID, - rsp_rem_mask[i], pending_reqs[i][1+64+32+`NR_BITS +: `NW_BITS], pending_reqs[i][1+64+`NR_BITS +: 32], pending_reqs[i][1+64 +: `NR_BITS]); + $error("%t: *** D$%0d response timeout: remaining=%b, wid=%0d, PC=%0h, rd=%0d", + $time, CORE_ID, rsp_rem_mask[i], pending_reqs[i][1+64+32+`NR_BITS +: `NW_BITS], pending_reqs[i][1+64+`NR_BITS +: 32], pending_reqs[i][1+64 +: `NR_BITS]); end end end @@ -333,31 +333,31 @@ module VX_lsu_unit #( `ifdef DBG_PRINT_CORE_DCACHE always @(posedge clk) begin - if (lsu_req_if.valid && fence_wait) begin - $display("%t: *** D$%0d fence wait", $time, CORE_ID); + if (lsu_req_if.valid && fence_wait) begin + dpi_trace("%d: *** D$%0d fence wait\n", $time, CORE_ID); end if (dcache_req_fire_any) begin if (dcache_req_if.rw[0]) begin - $write("%t: D$%0d Wr Req: wid=%0d, PC=%0h, tmask=%b, addr=", $time, CORE_ID, req_wid, req_pc, dcache_req_fire); - `PRINT_ARRAY1D(req_addr, `NUM_THREADS); - $write(", tag=%0h, byteen=%0h, type=", req_tag, dcache_req_if.byteen); - `PRINT_ARRAY1D(req_addr_type, `NUM_THREADS); - $write(", data="); - `PRINT_ARRAY1D(dcache_req_if.data, `NUM_THREADS); - $write("\n"); + dpi_trace("%d: D$%0d Wr Req: wid=%0d, PC=%0h, tmask=%b, addr=", $time, CORE_ID, req_wid, req_pc, dcache_req_fire); + `TRACE_ARRAY1D(req_addr, `NUM_THREADS); + dpi_trace(", tag=%0h, byteen=%0h, type=", req_tag, dcache_req_if.byteen); + `TRACE_ARRAY1D(req_addr_type, `NUM_THREADS); + dpi_trace(", data="); + `TRACE_ARRAY1D(dcache_req_if.data, `NUM_THREADS); + dpi_trace("\n"); end else begin - $write("%t: D$%0d Rd Req: wid=%0d, PC=%0h, tmask=%b, addr=", $time, CORE_ID, req_wid, req_pc, dcache_req_fire); - `PRINT_ARRAY1D(req_addr, `NUM_THREADS); - $write(", tag=%0h, byteen=%0h, type=", req_tag, dcache_req_if.byteen); - `PRINT_ARRAY1D(req_addr_type, `NUM_THREADS); - $write(", rd=%0d, is_dup=%b\n", req_rd, req_is_dup); + dpi_trace("%d: D$%0d Rd Req: wid=%0d, PC=%0h, tmask=%b, addr=", $time, CORE_ID, req_wid, req_pc, dcache_req_fire); + `TRACE_ARRAY1D(req_addr, `NUM_THREADS); + dpi_trace(", tag=%0h, byteen=%0h, type=", req_tag, dcache_req_if.byteen); + `TRACE_ARRAY1D(req_addr_type, `NUM_THREADS); + dpi_trace(", rd=%0d, is_dup=%b\n", req_rd, req_is_dup); end end if (dcache_rsp_fire) begin - $write("%t: D$%0d Rsp: wid=%0d, PC=%0h, tmask=%b, tag=%0h, rd=%0d, data=", + dpi_trace("%d: D$%0d Rsp: wid=%0d, PC=%0h, tmask=%b, tag=%0h, rd=%0d, data=", $time, CORE_ID, rsp_wid, rsp_pc, dcache_rsp_if.tmask, mbuf_raddr, rsp_rd); - `PRINT_ARRAY1D(dcache_rsp_if.data, `NUM_THREADS); - $write(", is_dup=%b\n", rsp_is_dup); + `TRACE_ARRAY1D(dcache_rsp_if.data, `NUM_THREADS); + dpi_trace(", is_dup=%b\n", rsp_is_dup); end end `endif diff --git a/hw/rtl/VX_muldiv.v b/hw/rtl/VX_muldiv.v index 13146fb1..8a0a466e 100644 --- a/hw/rtl/VX_muldiv.v +++ b/hw/rtl/VX_muldiv.v @@ -1,9 +1,5 @@ `include "VX_define.vh" -`ifndef SYNTHESIS -`include "util_dpi.vh" -`endif - module VX_muldiv ( input wire clk, input wire reset, diff --git a/hw/rtl/VX_platform.vh b/hw/rtl/VX_platform.vh index 057999e2..76b57c6b 100644 --- a/hw/rtl/VX_platform.vh +++ b/hw/rtl/VX_platform.vh @@ -1,6 +1,10 @@ `ifndef VX_PLATFORM `define VX_PLATFORM +`ifndef SYNTHESIS +`include "util_dpi.vh" +`endif + `include "VX_scope.vh" /////////////////////////////////////////////////////////////////////////////// @@ -91,25 +95,25 @@ `define LTRIM(x,s) x[s-1:0] -`define PRINT_ARRAY1D(a, m) \ - $write("{"); \ +`define TRACE_ARRAY1D(a, m) \ + dpi_trace("{"); \ for (integer i = (m-1); i >= 0; --i) begin \ - if (i != (m-1)) $write(", "); \ - $write("0x%0h", a[i]); \ + if (i != (m-1)) dpi_trace(", "); \ + dpi_trace("0x%0h", a[i]); \ end \ - $write("}"); \ + dpi_trace("}"); \ -`define PRINT_ARRAY2D(a, m, n) \ - $write("{"); \ +`define TRACE_ARRAY2D(a, m, n) \ + dpi_trace("{"); \ for (integer i = n-1; i >= 0; --i) begin \ - if (i != (n-1)) $write(", "); \ - $write("{"); \ + if (i != (n-1)) dpi_trace(", "); \ + dpi_trace("{"); \ for (integer j = (m-1); j >= 0; --j) begin \ - if (j != (m-1)) $write(", "); \ - $write("0x%0h", a[i][j]); \ + if (j != (m-1)) dpi_trace(", "); \ + dpi_trace("0x%0h", a[i][j]); \ end \ - $write("}"); \ + dpi_trace("}"); \ end \ - $write("}") + dpi_trace("}") `endif \ No newline at end of file diff --git a/hw/rtl/VX_print_instr.vh b/hw/rtl/VX_print_instr.vh index 691c4ac8..66e19c08 100644 --- a/hw/rtl/VX_print_instr.vh +++ b/hw/rtl/VX_print_instr.vh @@ -7,12 +7,12 @@ task print_ex_type ( input [`EX_BITS-1:0] ex_type ); case (ex_type) - `EX_ALU: $write("ALU"); - `EX_LSU: $write("LSU"); - `EX_CSR: $write("CSR"); - `EX_FPU: $write("FPU"); - `EX_GPU: $write("GPU"); - default: $write("NOP"); + `EX_ALU: dpi_trace("ALU"); + `EX_LSU: dpi_trace("LSU"); + `EX_CSR: dpi_trace("CSR"); + `EX_FPU: dpi_trace("FPU"); + `EX_GPU: dpi_trace("GPU"); + default: dpi_trace("NOP"); endcase endtask @@ -25,113 +25,113 @@ task print_ex_op ( `EX_ALU: begin if (`ALU_IS_BR(op_mod)) begin case (`BR_BITS'(op_type)) - `BR_EQ: $write("BEQ"); - `BR_NE: $write("BNE"); - `BR_LT: $write("BLT"); - `BR_GE: $write("BGE"); - `BR_LTU: $write("BLTU"); - `BR_GEU: $write("BGEU"); - `BR_JAL: $write("JAL"); - `BR_JALR: $write("JALR"); - `BR_ECALL: $write("ECALL"); - `BR_EBREAK:$write("EBREAK"); - `BR_MRET: $write("MRET"); - `BR_SRET: $write("SRET"); - `BR_DRET: $write("DRET"); - default: $write("?"); + `BR_EQ: dpi_trace("BEQ"); + `BR_NE: dpi_trace("BNE"); + `BR_LT: dpi_trace("BLT"); + `BR_GE: dpi_trace("BGE"); + `BR_LTU: dpi_trace("BLTU"); + `BR_GEU: dpi_trace("BGEU"); + `BR_JAL: dpi_trace("JAL"); + `BR_JALR: dpi_trace("JALR"); + `BR_ECALL: dpi_trace("ECALL"); + `BR_EBREAK:dpi_trace("EBREAK"); + `BR_MRET: dpi_trace("MRET"); + `BR_SRET: dpi_trace("SRET"); + `BR_DRET: dpi_trace("DRET"); + default: dpi_trace("?"); endcase end else if (`ALU_IS_MUL(op_mod)) begin case (`MUL_BITS'(op_type)) - `MUL_MUL: $write("MUL"); - `MUL_MULH: $write("MULH"); - `MUL_MULHSU:$write("MULHSU"); - `MUL_MULHU: $write("MULHU"); - `MUL_DIV: $write("DIV"); - `MUL_DIVU: $write("DIVU"); - `MUL_REM: $write("REM"); - `MUL_REMU: $write("REMU"); - default: $write("?"); + `MUL_MUL: dpi_trace("MUL"); + `MUL_MULH: dpi_trace("MULH"); + `MUL_MULHSU:dpi_trace("MULHSU"); + `MUL_MULHU: dpi_trace("MULHU"); + `MUL_DIV: dpi_trace("DIV"); + `MUL_DIVU: dpi_trace("DIVU"); + `MUL_REM: dpi_trace("REM"); + `MUL_REMU: dpi_trace("REMU"); + default: dpi_trace("?"); endcase end else begin case (`ALU_BITS'(op_type)) - `ALU_ADD: $write("ADD"); - `ALU_SUB: $write("SUB"); - `ALU_SLL: $write("SLL"); - `ALU_SRL: $write("SRL"); - `ALU_SRA: $write("SRA"); - `ALU_SLT: $write("SLT"); - `ALU_SLTU: $write("SLTU"); - `ALU_XOR: $write("XOR"); - `ALU_OR: $write("OR"); - `ALU_AND: $write("AND"); - `ALU_LUI: $write("LUI"); - `ALU_AUIPC: $write("AUIPC"); - default: $write("?"); + `ALU_ADD: dpi_trace("ADD"); + `ALU_SUB: dpi_trace("SUB"); + `ALU_SLL: dpi_trace("SLL"); + `ALU_SRL: dpi_trace("SRL"); + `ALU_SRA: dpi_trace("SRA"); + `ALU_SLT: dpi_trace("SLT"); + `ALU_SLTU: dpi_trace("SLTU"); + `ALU_XOR: dpi_trace("XOR"); + `ALU_OR: dpi_trace("OR"); + `ALU_AND: dpi_trace("AND"); + `ALU_LUI: dpi_trace("LUI"); + `ALU_AUIPC: dpi_trace("AUIPC"); + default: dpi_trace("?"); endcase end end `EX_LSU: begin case (`LSU_BITS'(op_type)) - `LSU_LB: $write("LB"); - `LSU_LH: $write("LH"); - `LSU_LW: $write("LW"); - `LSU_LBU:$write("LBU"); - `LSU_LHU:$write("LHU"); - `LSU_SB: $write("SB"); - `LSU_SH: $write("SH"); - `LSU_SW: $write("SW"); - default: $write("?"); + `LSU_LB: dpi_trace("LB"); + `LSU_LH: dpi_trace("LH"); + `LSU_LW: dpi_trace("LW"); + `LSU_LBU:dpi_trace("LBU"); + `LSU_LHU:dpi_trace("LHU"); + `LSU_SB: dpi_trace("SB"); + `LSU_SH: dpi_trace("SH"); + `LSU_SW: dpi_trace("SW"); + default: dpi_trace("?"); endcase end `EX_CSR: begin case (`CSR_BITS'(op_type)) - `CSR_RW: $write("CSRW"); - `CSR_RS: $write("CSRS"); - `CSR_RC: $write("CSRC"); - default: $write("?"); + `CSR_RW: dpi_trace("CSRW"); + `CSR_RS: dpi_trace("CSRS"); + `CSR_RC: dpi_trace("CSRC"); + default: dpi_trace("?"); endcase end `EX_FPU: begin case (`FPU_BITS'(op_type)) - `FPU_ADD: $write("ADD"); - `FPU_SUB: $write("SUB"); - `FPU_MUL: $write("MUL"); - `FPU_DIV: $write("DIV"); - `FPU_SQRT: $write("SQRT"); - `FPU_MADD: $write("MADD"); - `FPU_NMSUB: $write("NMSUB"); - `FPU_NMADD: $write("NMADD"); - `FPU_CVTWS: $write("CVTWS"); - `FPU_CVTWUS:$write("CVTWUS"); - `FPU_CVTSW: $write("CVTSW"); - `FPU_CVTSWU:$write("CVTSWU"); - `FPU_CLASS: $write("CLASS"); - `FPU_CMP: $write("CMP"); + `FPU_ADD: dpi_trace("ADD"); + `FPU_SUB: dpi_trace("SUB"); + `FPU_MUL: dpi_trace("MUL"); + `FPU_DIV: dpi_trace("DIV"); + `FPU_SQRT: dpi_trace("SQRT"); + `FPU_MADD: dpi_trace("MADD"); + `FPU_NMSUB: dpi_trace("NMSUB"); + `FPU_NMADD: dpi_trace("NMADD"); + `FPU_CVTWS: dpi_trace("CVTWS"); + `FPU_CVTWUS:dpi_trace("CVTWUS"); + `FPU_CVTSW: dpi_trace("CVTSW"); + `FPU_CVTSWU:dpi_trace("CVTSWU"); + `FPU_CLASS: dpi_trace("CLASS"); + `FPU_CMP: dpi_trace("CMP"); `FPU_MISC: begin case (op_mod) - 0: $write("SGNJ"); - 1: $write("SGNJN"); - 2: $write("SGNJX"); - 3: $write("MIN"); - 4: $write("MAX"); - 5: $write("MVXW"); - 6: $write("MVWX"); + 0: dpi_trace("SGNJ"); + 1: dpi_trace("SGNJN"); + 2: dpi_trace("SGNJX"); + 3: dpi_trace("MIN"); + 4: dpi_trace("MAX"); + 5: dpi_trace("MVXW"); + 6: dpi_trace("MVWX"); endcase end - default: $write("?"); + default: dpi_trace("?"); endcase end `EX_GPU: begin case (`GPU_BITS'(op_type)) - `GPU_TMC: $write("TMC"); - `GPU_WSPAWN:$write("WSPAWN"); - `GPU_SPLIT: $write("SPLIT"); - `GPU_JOIN: $write("JOIN"); - `GPU_BAR: $write("BAR"); - default: $write("?"); + `GPU_TMC: dpi_trace("TMC"); + `GPU_WSPAWN:dpi_trace("WSPAWN"); + `GPU_SPLIT: dpi_trace("SPLIT"); + `GPU_JOIN: dpi_trace("JOIN"); + `GPU_BAR: dpi_trace("BAR"); + default: dpi_trace("?"); endcase end - default: $write("?"); + default: dpi_trace("?"); endcase endtask diff --git a/hw/rtl/VX_scoreboard.v b/hw/rtl/VX_scoreboard.v index 24ad1c37..d54e1982 100644 --- a/hw/rtl/VX_scoreboard.v +++ b/hw/rtl/VX_scoreboard.v @@ -47,9 +47,9 @@ module VX_scoreboard #( end else begin `ifdef DBG_PRINT_PIPELINE if (ibuffer_if.valid && ~ibuffer_if.ready) begin - $display("%t: *** core%0d-stall: wid=%0d, PC=%0h, rd=%0d, wb=%0d, inuse=%b%b%b%b", - $time, CORE_ID, ibuffer_if.wid, ibuffer_if.PC, ibuffer_if.rd, ibuffer_if.wb, - deq_inuse_regs[ibuffer_if.rd], deq_inuse_regs[ibuffer_if.rs1], deq_inuse_regs[ibuffer_if.rs2], deq_inuse_regs[ibuffer_if.rs3]); + dpi_trace("%d: *** core%0d-stall: wid=%0d, PC=%0h, rd=%0d, wb=%0d, inuse=%b%b%b%b\n", + $time, CORE_ID, ibuffer_if.wid, ibuffer_if.PC, ibuffer_if.rd, ibuffer_if.wb, + deq_inuse_regs[ibuffer_if.rd], deq_inuse_regs[ibuffer_if.rs1], deq_inuse_regs[ibuffer_if.rs2], deq_inuse_regs[ibuffer_if.rs3]); end `endif if (release_reg) begin diff --git a/hw/rtl/Vortex.v b/hw/rtl/Vortex.v index 8fa952ed..d92c6cfd 100644 --- a/hw/rtl/Vortex.v +++ b/hw/rtl/Vortex.v @@ -201,12 +201,12 @@ module Vortex ( always @(posedge clk) begin if (mem_req_valid && mem_req_ready) begin if (mem_req_rw) - $display("%t: MEM Wr Req: addr=%0h, tag=%0h, byteen=%0h data=%0h", $time, `TO_FULL_ADDR(mem_req_addr), mem_req_tag, mem_req_byteen, mem_req_data); + dpi_trace("%d: MEM Wr Req: addr=%0h, tag=%0h, byteen=%0h data=%0h\n", $time, `TO_FULL_ADDR(mem_req_addr), mem_req_tag, mem_req_byteen, mem_req_data); else - $display("%t: MEM Rd Req: addr=%0h, tag=%0h, byteen=%0h", $time, `TO_FULL_ADDR(mem_req_addr), mem_req_tag, mem_req_byteen); + dpi_trace("%d: MEM Rd Req: addr=%0h, tag=%0h, byteen=%0h\n", $time, `TO_FULL_ADDR(mem_req_addr), mem_req_tag, mem_req_byteen); end if (mem_rsp_valid && mem_rsp_ready) begin - $display("%t: MEM Rsp: tag=%0h, data=%0h", $time, mem_rsp_tag, mem_rsp_data); + dpi_trace("%d: MEM Rsp: tag=%0h, data=%0h\n", $time, mem_rsp_tag, mem_rsp_data); end end `endif diff --git a/hw/rtl/afu/VX_avs_wrapper.v b/hw/rtl/afu/VX_avs_wrapper.v index cdefcec1..d1417e07 100644 --- a/hw/rtl/afu/VX_avs_wrapper.v +++ b/hw/rtl/afu/VX_avs_wrapper.v @@ -166,13 +166,14 @@ module VX_avs_wrapper #( `ifdef DBG_PRINT_AVS always @(posedge clk) begin if (mem_req_valid && mem_req_ready) begin - if (mem_req_rw) - $display("%t: AVS Wr Req: addr=%0h, byteen=%0h, tag=%0h, data=%0h", $time, `TO_FULL_ADDR(mem_req_addr), mem_req_byteen, mem_req_tag, mem_req_data); - else - $display("%t: AVS Rd Req: addr=%0h, byteen=%0h, tag=%0h, pending=%0d", $time, `TO_FULL_ADDR(mem_req_addr), mem_req_byteen, mem_req_tag, req_queue_size); + if (mem_req_rw) begin + dpi_trace("%d: AVS Wr Req: addr=%0h, byteen=%0h, tag=%0h, data=%0h\n", $time, `TO_FULL_ADDR(mem_req_addr), mem_req_byteen, mem_req_tag, mem_req_data); + end else begin + dpi_trace("%d: AVS Rd Req: addr=%0h, byteen=%0h, tag=%0h, pending=%0d\n", $time, `TO_FULL_ADDR(mem_req_addr), mem_req_byteen, mem_req_tag, req_queue_size); + end end if (mem_rsp_valid && mem_rsp_ready) begin - $display("%t: AVS Rd Rsp: tag=%0h, data=%0h, pending=%0d", $time, mem_rsp_tag, mem_rsp_data, req_queue_size); + dpi_trace("%d: AVS Rd Rsp: tag=%0h, data=%0h, pending=%0d\n", $time, mem_rsp_tag, mem_rsp_data, req_queue_size); end end `endif diff --git a/hw/rtl/afu/vortex_afu.sv b/hw/rtl/afu/vortex_afu.sv index b10fb062..d24baef8 100644 --- a/hw/rtl/afu/vortex_afu.sv +++ b/hw/rtl/afu/vortex_afu.sv @@ -186,36 +186,36 @@ always @(posedge clk) begin MMIO_IO_ADDR: begin cmd_io_addr <= t_ccip_clAddr'(cp2af_sRxPort.c0.data); `ifdef DBG_PRINT_OPAE - $display("%t: MMIO_IO_ADDR: addr=%0h, data=0x%0h", $time, mmio_hdr.address, t_ccip_clAddr'(cp2af_sRxPort.c0.data)); + dpi_trace("%d: MMIO_IO_ADDR: addr=%0h, data=0x%0h\n", $time, mmio_hdr.address, t_ccip_clAddr'(cp2af_sRxPort.c0.data)); `endif end MMIO_MEM_ADDR: begin cmd_mem_addr <= $bits(cmd_mem_addr)'(cp2af_sRxPort.c0.data); `ifdef DBG_PRINT_OPAE - $display("%t: MMIO_MEM_ADDR: addr=%0h, data=0x%0h", $time, mmio_hdr.address, $bits(cmd_mem_addr)'(cp2af_sRxPort.c0.data)); + dpi_trace("%d: MMIO_MEM_ADDR: addr=%0h, data=0x%0h\n", $time, mmio_hdr.address, $bits(cmd_mem_addr)'(cp2af_sRxPort.c0.data)); `endif end MMIO_DATA_SIZE: begin cmd_data_size <= $bits(cmd_data_size)'(cp2af_sRxPort.c0.data); `ifdef DBG_PRINT_OPAE - $display("%t: MMIO_DATA_SIZE: addr=%0h, data=%0d", $time, mmio_hdr.address, $bits(cmd_data_size)'(cp2af_sRxPort.c0.data)); + dpi_trace("%d: MMIO_DATA_SIZE: addr=%0h, data=%0d\n", $time, mmio_hdr.address, $bits(cmd_data_size)'(cp2af_sRxPort.c0.data)); `endif end MMIO_CMD_TYPE: begin `ifdef DBG_PRINT_OPAE - $display("%t: MMIO_CMD_TYPE: addr=%0h, data=%0d", $time, mmio_hdr.address, $bits(cmd_type)'(cp2af_sRxPort.c0.data)); + dpi_trace("%d: MMIO_CMD_TYPE: addr=%0h, data=%0d\n", $time, mmio_hdr.address, $bits(cmd_type)'(cp2af_sRxPort.c0.data)); `endif end `ifdef SCOPE MMIO_SCOPE_WRITE: begin `ifdef DBG_PRINT_OPAE - $display("%t: MMIO_SCOPE_WRITE: addr=%0h, data=%0h", $time, mmio_hdr.address, 64'(cp2af_sRxPort.c0.data)); + dpi_trace("%d: MMIO_SCOPE_WRITE: addr=%0h, data=%0h\n", $time, mmio_hdr.address, 64'(cp2af_sRxPort.c0.data)); `endif end `endif default: begin `ifdef DBG_PRINT_OPAE - $display("%t: Unknown MMIO Wr: addr=%0h, data=%0h", $time, mmio_hdr.address, $bits(cmd_data_size)'(cp2af_sRxPort.c0.data)); + dpi_trace("%d: Unknown MMIO Wr: addr=%0h, data=%0h\n", $time, mmio_hdr.address, $bits(cmd_data_size)'(cp2af_sRxPort.c0.data)); `endif end endcase @@ -243,7 +243,7 @@ always @(posedge clk) begin mmio_tx.data <= 64'({cout_q_dout, !cout_q_empty, 8'(state)}); `ifdef DBG_PRINT_OPAE if (state != STATE_WIDTH'(mmio_tx.data)) begin - $display("%t: MMIO_STATUS: addr=%0h, state=%0d", $time, mmio_hdr.address, state); + dpi_trace("%d: MMIO_STATUS: addr=%0h, state=%0d\n", $time, mmio_hdr.address, state); end `endif end @@ -251,20 +251,20 @@ always @(posedge clk) begin MMIO_SCOPE_READ: begin mmio_tx.data <= cmd_scope_rdata; `ifdef DBG_PRINT_OPAE - $display("%t: MMIO_SCOPE_READ: addr=%0h, data=%0h", $time, mmio_hdr.address, cmd_scope_rdata); + dpi_trace("%d: MMIO_SCOPE_READ: addr=%0h, data=%0h\n", $time, mmio_hdr.address, cmd_scope_rdata); `endif end `endif MMIO_DEV_CAPS: begin mmio_tx.data <= dev_caps; `ifdef DBG_PRINT_OPAE - $display("%t: MMIO_DEV_CAPS: addr=%0h, data=%0h", $time, mmio_hdr.address, dev_caps); + dpi_trace("%d: MMIO_DEV_CAPS: addr=%0h, data=%0h\n", $time, mmio_hdr.address, dev_caps); `endif end default: begin mmio_tx.data <= 64'h0; `ifdef DBG_PRINT_OPAE - $display("%t: Unknown MMIO Rd: addr=%0h", $time, mmio_hdr.address); + dpi_trace("%d: Unknown MMIO Rd: addr=%0h\n", $time, mmio_hdr.address); `endif end endcase @@ -298,19 +298,19 @@ always @(posedge clk) begin case (cmd_type) CMD_MEM_READ: begin `ifdef DBG_PRINT_OPAE - $display("%t: STATE READ: ia=%0h addr=%0h size=%0d", $time, cmd_io_addr, cmd_mem_addr, cmd_data_size); + dpi_trace("%d: STATE READ: ia=%0h addr=%0h size=%0d\n", $time, cmd_io_addr, cmd_mem_addr, cmd_data_size); `endif state <= STATE_READ; end CMD_MEM_WRITE: begin `ifdef DBG_PRINT_OPAE - $display("%t: STATE WRITE: ia=%0h addr=%0h size=%0d", $time, cmd_io_addr, cmd_mem_addr, cmd_data_size); + dpi_trace("%d: STATE WRITE: ia=%0h addr=%0h size=%0d\n", $time, cmd_io_addr, cmd_mem_addr, cmd_data_size); `endif state <= STATE_WRITE; end CMD_RUN: begin `ifdef DBG_PRINT_OPAE - $display("%t: STATE START", $time); + dpi_trace("%d: STATE START\n", $time); `endif vx_reset <= 1; state <= STATE_START; @@ -325,7 +325,7 @@ always @(posedge clk) begin if (cmd_read_done) begin state <= STATE_IDLE; `ifdef DBG_PRINT_OPAE - $display("%t: STATE IDLE", $time); + dpi_trace("%d: STATE IDLE\n", $time); `endif end end @@ -334,7 +334,7 @@ always @(posedge clk) begin if (cmd_write_done) begin state <= STATE_IDLE; `ifdef DBG_PRINT_OPAE - $display("%t: STATE IDLE", $time); + dpi_trace("%d: STATE IDLE\n", $time); `endif end end @@ -346,7 +346,7 @@ always @(posedge clk) begin vx_started <= 0; state <= STATE_IDLE; `ifdef DBG_PRINT_OPAE - $display("%t: STATE IDLE", $time); + dpi_trace("%d: STATE IDLE\n", $time); `endif end end else begin @@ -697,7 +697,7 @@ always @(posedge clk) begin cci_rd_req_addr <= cci_rd_req_addr + 1; cci_rd_req_ctr <= cci_rd_req_ctr + 1; `ifdef DBG_PRINT_OPAE - $display("%t: CCI Rd Req: addr=%0h, tag=%0h, rem=%0d, pending=%0d", $time, cci_rd_req_addr, cci_rd_req_tag, (cmd_data_size - cci_rd_req_ctr - 1), cci_pending_reads); + dpi_trace("%d: CCI Rd Req: addr=%0h, tag=%0h, rem=%0d, pending=%0d\n", $time, cci_rd_req_addr, cci_rd_req_tag, (cmd_data_size - cci_rd_req_ctr - 1), cci_pending_reads); `endif end @@ -707,13 +707,13 @@ always @(posedge clk) begin cci_mem_wr_req_addr_base <= cci_mem_wr_req_addr_base + CCI_ADDR_WIDTH'(CCI_RD_WINDOW_SIZE); end `ifdef DBG_PRINT_OPAE - $display("%t: CCI Rd Rsp: idx=%0d, ctr=%0d, data=%0h", $time, cci_rd_rsp_tag, cci_rd_rsp_ctr, cp2af_sRxPort.c0.data); + dpi_trace("%d: CCI Rd Rsp: idx=%0d, ctr=%0d, data=%0h\n", $time, cci_rd_rsp_tag, cci_rd_rsp_ctr, cp2af_sRxPort.c0.data); `endif end if (cci_rdq_pop) begin `ifdef DBG_PRINT_OPAE - $display("%t: CCI Rd Queue Pop: pending=%0d", $time, cci_pending_reads); + dpi_trace("%d: CCI Rd Queue Pop: pending=%0d\n", $time, cci_pending_reads); `endif end @@ -852,13 +852,13 @@ begin cci_wr_req_done <= 1; end `ifdef DBG_PRINT_OPAE - $display("%t: CCI Wr Req: addr=%0h, rem=%0d, pending=%0d, data=%0h", $time, cci_wr_req_addr, (cci_wr_req_ctr - 1), cci_pending_writes, af2cp_sTxPort.c1.data); + dpi_trace("%d: CCI Wr Req: addr=%0h, rem=%0d, pending=%0d, data=%0h\n", $time, cci_wr_req_addr, (cci_wr_req_ctr - 1), cci_pending_writes, af2cp_sTxPort.c1.data); `endif end if (cci_wr_rsp_fire) begin `ifdef DBG_PRINT_OPAE - $display("%t: CCI Wr Rsp: pending=%0d", $time, cci_pending_writes); + dpi_trace("%d: CCI Wr Rsp: pending=%0d\n", $time, cci_pending_writes); `endif end end @@ -879,7 +879,7 @@ Vortex #() vortex ( `SCOPE_BIND_afu_vortex .clk (clk), - .reset (reset | vx_reset), + .reset (vx_reset), // Memory request .mem_req_valid (vx_mem_req_valid), diff --git a/hw/rtl/cache/VX_bank.v b/hw/rtl/cache/VX_bank.v index f3c1b774..c13da3aa 100644 --- a/hw/rtl/cache/VX_bank.v +++ b/hw/rtl/cache/VX_bank.v @@ -527,31 +527,31 @@ module VX_bank #( always @(posedge clk) begin if (pipeline_stall) begin - $display("%d: *** cache%0d:%0d stall: crsq=%b, mreq=%b, mshr=%b", $time, CACHE_ID, BANK_ID, crsq_stall, mreq_alm_full, mshr_alm_full); + dpi_trace("%d: *** cache%0d:%0d stall: crsq=%b, mreq=%b, mshr=%b\n", $time, CACHE_ID, BANK_ID, crsq_stall, mreq_alm_full, mshr_alm_full); end if (flush_enable) begin - $display("%t: cache%0d:%0d flush: addr=%0h", $time, CACHE_ID, BANK_ID, `LINE_TO_BYTE_ADDR(flush_addr, BANK_ID)); + dpi_trace("%d: cache%0d:%0d flush: addr=%0h\n", $time, CACHE_ID, BANK_ID, `LINE_TO_BYTE_ADDR(flush_addr, BANK_ID)); end if (mem_rsp_fire) begin - $display("%t: cache%0d:%0d fill-rsp: addr=%0h, id=%0d, data=%0h", $time, CACHE_ID, BANK_ID, `LINE_TO_BYTE_ADDR(mem_rsp_addr, BANK_ID), mem_rsp_id, mem_rsp_data); + dpi_trace("%d: cache%0d:%0d fill-rsp: addr=%0h, id=%0d, data=%0h\n", $time, CACHE_ID, BANK_ID, `LINE_TO_BYTE_ADDR(mem_rsp_addr, BANK_ID), mem_rsp_id, mem_rsp_data); end if (mshr_fire) begin - $display("%t: cache%0d:%0d mshr-pop: addr=%0h, tag=%0h, pmask=%b, tid=%0d, wid=%0d, PC=%0h", $time, CACHE_ID, BANK_ID, `LINE_TO_BYTE_ADDR(mshr_addr, BANK_ID), mshr_tag, mshr_pmask, mshr_tid, debug_wid_sel, debug_pc_sel); + dpi_trace("%d: cache%0d:%0d mshr-pop: addr=%0h, tag=%0h, pmask=%b, tid=%0d, wid=%0d, PC=%0h\n", $time, CACHE_ID, BANK_ID, `LINE_TO_BYTE_ADDR(mshr_addr, BANK_ID), mshr_tag, mshr_pmask, mshr_tid, debug_wid_sel, debug_pc_sel); end if (creq_fire) begin if (creq_rw) - $display("%t: cache%0d:%0d core-wr-req: addr=%0h, tag=%0h, pmask=%b, tid=%0d, byteen=%b, data=%0h, wid=%0d, PC=%0h", $time, CACHE_ID, BANK_ID, `LINE_TO_BYTE_ADDR(creq_addr, BANK_ID), creq_tag, creq_pmask, creq_tid, creq_byteen, creq_data, debug_wid_sel, debug_pc_sel); + dpi_trace("%d: cache%0d:%0d core-wr-req: addr=%0h, tag=%0h, pmask=%b, tid=%0d, byteen=%b, data=%0h, wid=%0d, PC=%0h\n", $time, CACHE_ID, BANK_ID, `LINE_TO_BYTE_ADDR(creq_addr, BANK_ID), creq_tag, creq_pmask, creq_tid, creq_byteen, creq_data, debug_wid_sel, debug_pc_sel); else - $display("%t: cache%0d:%0d core-rd-req: addr=%0h, tag=%0h, pmask=%b, tid=%0d, byteen=%b, wid=%0d, PC=%0h", $time, CACHE_ID, BANK_ID, `LINE_TO_BYTE_ADDR(creq_addr, BANK_ID), creq_tag, creq_pmask, creq_tid, creq_byteen, debug_wid_sel, debug_pc_sel); + dpi_trace("%d: cache%0d:%0d core-rd-req: addr=%0h, tag=%0h, pmask=%b, tid=%0d, byteen=%b, wid=%0d, PC=%0h\n", $time, CACHE_ID, BANK_ID, `LINE_TO_BYTE_ADDR(creq_addr, BANK_ID), creq_tag, creq_pmask, creq_tid, creq_byteen, debug_wid_sel, debug_pc_sel); end if (crsq_fire) begin - $display("%t: cache%0d:%0d core-rsp: addr=%0h, tag=%0h, pmask=%b, tid=%0d, data=%0h, wid=%0d, PC=%0h", $time, CACHE_ID, BANK_ID, `LINE_TO_BYTE_ADDR(addr_st1, BANK_ID), crsq_tag, crsq_pmask, crsq_tid, crsq_data, debug_wid_st1, debug_pc_st1); + dpi_trace("%d: cache%0d:%0d core-rsp: addr=%0h, tag=%0h, pmask=%b, tid=%0d, data=%0h, wid=%0d, PC=%0h\n", $time, CACHE_ID, BANK_ID, `LINE_TO_BYTE_ADDR(addr_st1, BANK_ID), crsq_tag, crsq_pmask, crsq_tid, crsq_data, debug_wid_st1, debug_pc_st1); end if (mreq_push) begin if (do_writeback_st1) - $display("%t: cache%0d:%0d writeback: addr=%0h, data=%0h, byteen=%b, wid=%0d, PC=%0h", $time, CACHE_ID, BANK_ID, `LINE_TO_BYTE_ADDR(mreq_addr, BANK_ID), mreq_data, mreq_byteen, debug_wid_st1, debug_pc_st1); + dpi_trace("%d: cache%0d:%0d writeback: addr=%0h, data=%0h, byteen=%b, wid=%0d, PC=%0h\n", $time, CACHE_ID, BANK_ID, `LINE_TO_BYTE_ADDR(mreq_addr, BANK_ID), mreq_data, mreq_byteen, debug_wid_st1, debug_pc_st1); else - $display("%t: cache%0d:%0d fill-req: addr=%0h, id=%0d, wid=%0d, PC=%0h", $time, CACHE_ID, BANK_ID, `LINE_TO_BYTE_ADDR(mreq_addr, BANK_ID), mreq_id, debug_wid_st1, debug_pc_st1); + dpi_trace("%d: cache%0d:%0d fill-req: addr=%0h, id=%0d, wid=%0d, PC=%0h\n", $time, CACHE_ID, BANK_ID, `LINE_TO_BYTE_ADDR(mreq_addr, BANK_ID), mreq_id, debug_wid_st1, debug_pc_st1); end end `endif diff --git a/hw/rtl/cache/VX_data_access.v b/hw/rtl/cache/VX_data_access.v index 13179f9c..eb26036d 100644 --- a/hw/rtl/cache/VX_data_access.v +++ b/hw/rtl/cache/VX_data_access.v @@ -83,13 +83,13 @@ module VX_data_access #( always @(posedge clk) begin if (writeen && ~stall) begin if (is_fill) begin - $display("%t: cache%0d:%0d data-fill: addr=%0h, blk_addr=%0d, data=%0h", $time, CACHE_ID, BANK_ID, `LINE_TO_BYTE_ADDR(addr, BANK_ID), line_addr, wdata); + dpi_trace("%d: cache%0d:%0d data-fill: addr=%0h, blk_addr=%0d, data=%0h\n", $time, CACHE_ID, BANK_ID, `LINE_TO_BYTE_ADDR(addr, BANK_ID), line_addr, wdata); end else begin - $display("%t: cache%0d:%0d data-write: addr=%0h, wid=%0d, PC=%0h, byteen=%b, blk_addr=%0d, data=%0h", $time, CACHE_ID, BANK_ID, `LINE_TO_BYTE_ADDR(addr, BANK_ID), debug_wid, debug_pc, byte_enable, line_addr, wdata); + dpi_trace("%d: cache%0d:%0d data-write: addr=%0h, wid=%0d, PC=%0h, byteen=%b, blk_addr=%0d, data=%0h\n", $time, CACHE_ID, BANK_ID, `LINE_TO_BYTE_ADDR(addr, BANK_ID), debug_wid, debug_pc, byte_enable, line_addr, wdata); end end if (readen && ~stall) begin - $display("%t: cache%0d:%0d data-read: addr=%0h, wid=%0d, PC=%0h, blk_addr=%0d, data=%0h", $time, CACHE_ID, BANK_ID, `LINE_TO_BYTE_ADDR(addr, BANK_ID), debug_wid, debug_pc, line_addr, rdata); + dpi_trace("%d: cache%0d:%0d data-read: addr=%0h, wid=%0d, PC=%0h, blk_addr=%0d, data=%0h\n", $time, CACHE_ID, BANK_ID, `LINE_TO_BYTE_ADDR(addr, BANK_ID), debug_wid, debug_pc, line_addr, rdata); end end `endif diff --git a/hw/rtl/cache/VX_miss_resrv.v b/hw/rtl/cache/VX_miss_resrv.v index 368accf0..342bc596 100644 --- a/hw/rtl/cache/VX_miss_resrv.v +++ b/hw/rtl/cache/VX_miss_resrv.v @@ -202,33 +202,33 @@ module VX_miss_resrv #( always @(posedge clk) begin if (allocate_fire || fill_valid || dequeue_fire || lookup_replay || lookup_valid || release_valid) begin if (allocate_fire) - $display("%t: cache%0d:%0d mshr-allocate: addr=%0h, id=%0d, wid=%0d, PC=%0h", $time, CACHE_ID, BANK_ID, + dpi_trace("%d: cache%0d:%0d mshr-allocate: addr=%0h, id=%0d, wid=%0d, PC=%0h\n", $time, CACHE_ID, BANK_ID, `LINE_TO_BYTE_ADDR(allocate_addr, BANK_ID), allocate_id, deq_debug_wid, deq_debug_pc); if (fill_valid) - $display("%t: cache%0d:%0d mshr-fill: addr=%0h, id=%0d", $time, CACHE_ID, BANK_ID, + dpi_trace("%d: cache%0d:%0d mshr-fill: addr=%0h, id=%0d\n", $time, CACHE_ID, BANK_ID, `LINE_TO_BYTE_ADDR(addr_table[fill_id], BANK_ID), fill_id); if (dequeue_fire) - $display("%t: cache%0d:%0d mshr-dequeue: addr=%0h, id=%0d, wid=%0d, PC=%0h", $time, CACHE_ID, BANK_ID, + dpi_trace("%d: cache%0d:%0d mshr-dequeue: addr=%0h, id=%0d, wid=%0d, PC=%0h\n", $time, CACHE_ID, BANK_ID, `LINE_TO_BYTE_ADDR(dequeue_addr, BANK_ID), dequeue_id_r, deq_debug_wid, deq_debug_pc); if (lookup_replay) - $display("%t: cache%0d:%0d mshr-replay: addr=%0h, id=%0d", $time, CACHE_ID, BANK_ID, + dpi_trace("%d: cache%0d:%0d mshr-replay: addr=%0h, id=%0d\n", $time, CACHE_ID, BANK_ID, `LINE_TO_BYTE_ADDR(lookup_addr, BANK_ID), lookup_id); if (lookup_valid) - $display("%t: cache%0d:%0d mshr-lookup: addr=%0h, id=%0d, match=%b, wid=%0d, PC=%0h", $time, CACHE_ID, BANK_ID, + dpi_trace("%d: cache%0d:%0d mshr-lookup: addr=%0h, id=%0d, match=%b, wid=%0d, PC=%0h\n", $time, CACHE_ID, BANK_ID, `LINE_TO_BYTE_ADDR(lookup_addr, BANK_ID), lookup_id, lookup_match, lkp_debug_wid, lkp_debug_pc); if (release_valid) - $display("%t: cache%0d:%0d mshr-release id=%0d, wid=%0d, PC=%0h", $time, CACHE_ID, BANK_ID, + dpi_trace("%d: cache%0d:%0d mshr-release id=%0d, wid=%0d, PC=%0h\n", $time, CACHE_ID, BANK_ID, release_id, rel_debug_wid, rel_debug_pc); - $write("%t: cache%0d:%0d mshr-table", $time, CACHE_ID, BANK_ID); + dpi_trace("%d: cache%0d:%0d mshr-table", $time, CACHE_ID, BANK_ID); for (integer i = 0; i < MSHR_SIZE; ++i) begin if (valid_table[i]) begin - $write(" "); + dpi_trace(" "); if (ready_table[i]) - $write("*"); - $write("%0d=%0h", i, `LINE_TO_BYTE_ADDR(addr_table[i], BANK_ID)); + dpi_trace("*"); + dpi_trace("%0d=%0h", i, `LINE_TO_BYTE_ADDR(addr_table[i], BANK_ID)); end end - $write("\n"); + dpi_trace("\n"); end end `endif diff --git a/hw/rtl/cache/VX_shared_mem.v b/hw/rtl/cache/VX_shared_mem.v index 4fa5d159..985430ff 100644 --- a/hw/rtl/cache/VX_shared_mem.v +++ b/hw/rtl/cache/VX_shared_mem.v @@ -298,22 +298,20 @@ module VX_shared_mem #( always @(posedge clk) begin if (!crsq_in_ready) begin - $display("%t: *** cache%0d pipeline-stall", $time, CACHE_ID); + dpi_trace("%d: *** cache%0d pipeline-stall\n", $time, CACHE_ID); end if (is_multi_tag_req) begin - $display("%t: *** cache%0d multi-tag request!", $time, CACHE_ID); + dpi_trace("%d: *** cache%0d multi-tag request!\n", $time, CACHE_ID); end if (creq_in_fire) begin for (integer i = 0; i < NUM_BANKS; ++i) begin if (per_bank_core_req_valid_unqual[i]) begin if (per_bank_core_req_rw_unqual[i]) begin - $display("%t: cache%0d:%0d core-wr-req: addr=%0h, tag=%0h, byteen=%b, data=%0h, wid=%0d, PC=%0h", - $time, CACHE_ID, i, per_bank_core_req_addr_unqual[i], per_bank_core_req_tag_unqual[i], per_bank_core_req_byteen_unqual[i], per_bank_core_req_data_unqual[i], - debug_wid_st0[i], debug_pc_st0[i]); + dpi_trace("%d: cache%0d:%0d core-wr-req: addr=%0h, tag=%0h, byteen=%b, data=%0h, wid=%0d, PC=%0h\n", + $time, CACHE_ID, i, per_bank_core_req_addr_unqual[i], per_bank_core_req_tag_unqual[i], per_bank_core_req_byteen_unqual[i], per_bank_core_req_data_unqual[i], debug_wid_st0[i], debug_pc_st0[i]); end else begin - $display("%t: cache%0d:%0d core-rd-req: addr=%0h, tag=%0h, byteen=%b, wid=%0d, PC=%0h", - $time, CACHE_ID, i, per_bank_core_req_addr_unqual[i], per_bank_core_req_tag_unqual[i], per_bank_core_req_byteen_unqual[i], - debug_wid_st0[i], debug_pc_st0[i]); + dpi_trace("%d: cache%0d:%0d core-rd-req: addr=%0h, tag=%0h, byteen=%b, wid=%0d, PC=%0h\n", + $time, CACHE_ID, i, per_bank_core_req_addr_unqual[i], per_bank_core_req_tag_unqual[i], per_bank_core_req_byteen_unqual[i], debug_wid_st0[i], debug_pc_st0[i]); end end end @@ -322,13 +320,11 @@ module VX_shared_mem #( for (integer i = 0; i < NUM_BANKS; ++i) begin if (per_bank_core_req_valid[i]) begin if (per_bank_core_req_rw[i]) begin - $display("%t: cache%0d:%0d core-wr-rsp: addr=%0h, tag=%0h, byteen=%b, data=%0h, wid=%0d, PC=%0h", - $time, CACHE_ID, i, per_bank_core_req_addr[i], per_bank_core_req_tag[i], per_bank_core_req_byteen[i], per_bank_core_req_data[i], - debug_wid_st1[i], debug_pc_st1[i]); + dpi_trace("%d: cache%0d:%0d core-wr-rsp: addr=%0h, tag=%0h, byteen=%b, data=%0h, wid=%0d, PC=%0h\n", + $time, CACHE_ID, i, per_bank_core_req_addr[i], per_bank_core_req_tag[i], per_bank_core_req_byteen[i], per_bank_core_req_data[i], debug_wid_st1[i], debug_pc_st1[i]); end else begin - $display("%t: cache%0d:%0d core-rd-rsp: addr=%0h, tag=%0h, byteen=%b, data=%0h, wid=%0d, PC=%0h", - $time, CACHE_ID, i, per_bank_core_req_addr[i], per_bank_core_req_tag[i], per_bank_core_req_byteen[i], per_bank_core_rsp_data[i], - debug_wid_st1[i], debug_pc_st1[i]); + dpi_trace("%d: cache%0d:%0d core-rd-rsp: addr=%0h, tag=%0h, byteen=%b, data=%0h, wid=%0d, PC=%0h\n", + $time, CACHE_ID, i, per_bank_core_req_addr[i], per_bank_core_req_tag[i], per_bank_core_req_byteen[i], per_bank_core_rsp_data[i], debug_wid_st1[i], debug_pc_st1[i]); end end end diff --git a/hw/rtl/cache/VX_tag_access.v b/hw/rtl/cache/VX_tag_access.v index 3cd69384..a4c60357 100644 --- a/hw/rtl/cache/VX_tag_access.v +++ b/hw/rtl/cache/VX_tag_access.v @@ -68,16 +68,16 @@ module VX_tag_access #( always @(posedge clk) begin if (fill && ~stall) begin if (is_flush) begin - $display("%t: cache%0d:%0d tag-flush: addr=%0h, blk_addr=%0d", $time, CACHE_ID, BANK_ID, `LINE_TO_BYTE_ADDR(addr, BANK_ID), line_addr); + dpi_trace("%d: cache%0d:%0d tag-flush: addr=%0h, blk_addr=%0d\n", $time, CACHE_ID, BANK_ID, `LINE_TO_BYTE_ADDR(addr, BANK_ID), line_addr); end else begin - $display("%t: cache%0d:%0d tag-fill: addr=%0h, blk_addr=%0d, tag_id=%0h, old_tag_id=%0h", $time, CACHE_ID, BANK_ID, `LINE_TO_BYTE_ADDR(addr, BANK_ID), line_addr, line_tag, read_tag); + dpi_trace("%d: cache%0d:%0d tag-fill: addr=%0h, blk_addr=%0d, tag_id=%0h, old_tag_id=%0h\n", $time, CACHE_ID, BANK_ID, `LINE_TO_BYTE_ADDR(addr, BANK_ID), line_addr, line_tag, read_tag); end end if (lookup && ~stall) begin if (tag_match) begin - $display("%t: cache%0d:%0d tag-hit: addr=%0h, wid=%0d, PC=%0h, blk_addr=%0d, tag_id=%0h", $time, CACHE_ID, BANK_ID, `LINE_TO_BYTE_ADDR(addr, BANK_ID), debug_wid, debug_pc, line_addr, line_tag); + dpi_trace("%d: cache%0d:%0d tag-hit: addr=%0h, wid=%0d, PC=%0h, blk_addr=%0d, tag_id=%0h\n", $time, CACHE_ID, BANK_ID, `LINE_TO_BYTE_ADDR(addr, BANK_ID), debug_wid, debug_pc, line_addr, line_tag); end else begin - $display("%t: cache%0d:%0d tag-miss: addr=%0h, wid=%0d, PC=%0h, blk_addr=%0d, tag_id=%0h, old_tag_id=%0h", $time, CACHE_ID, BANK_ID, `LINE_TO_BYTE_ADDR(addr, BANK_ID), debug_wid, debug_pc, line_addr, line_tag, read_tag); + dpi_trace("%d: cache%0d:%0d tag-miss: addr=%0h, wid=%0d, PC=%0h, blk_addr=%0d, tag_id=%0h, old_tag_id=%0h\n", $time, CACHE_ID, BANK_ID, `LINE_TO_BYTE_ADDR(addr, BANK_ID), debug_wid, debug_pc, line_addr, line_tag, read_tag); end end end diff --git a/hw/simulate/simulator.cpp b/hw/simulate/simulator.cpp index 88cb8134..11a83262 100644 --- a/hw/simulate/simulator.cpp +++ b/hw/simulate/simulator.cpp @@ -5,6 +5,10 @@ #define ENABLE_MEM_STALLS +#ifndef TRACE_DELAY +#define TRACE_DELAY 0 +#endif + #ifndef MEM_LATENCY #define MEM_LATENCY 24 #endif @@ -24,7 +28,9 @@ #define VL_WDATA_GETW(lwp, i, n, w) \ VL_SEL_IWII(0, n * w, 0, 0, lwp, i * w, w) -uint64_t timestamp = 0; +uint64_t sim_trace_delay = TRACE_DELAY; + +static uint64_t timestamp = 0; double sc_time_stamp() { return timestamp; @@ -120,7 +126,9 @@ void Simulator::step() { void Simulator::eval() { vortex_->eval(); #ifdef VCD_OUTPUT - trace_->dump(timestamp); + if (timestamp >= sim_trace_delay) { + trace_->dump(timestamp); + } #endif ++timestamp; } @@ -141,11 +149,11 @@ void Simulator::eval_mem_bus() { bool has_response = false; - // schedule memory responses in FIFO order + // schedule memory responses that are ready for (int i = 0; i < MEMORY_BANKS; ++i) { uint32_t b = (i + last_mem_rsp_bank_ + 1) % MEMORY_BANKS; if (!mem_rsp_vec_[b].empty() - && (0 == mem_rsp_vec_[b].begin()->cycles_left)) { + && (mem_rsp_vec_[b].begin()->cycles_left) <= 0) { has_response = true; last_mem_rsp_bank_ = b; break;