debug tracing refactoring
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@@ -1,6 +1,6 @@
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`include "VX_define.vh"
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`ifdef DBG_PRINT_PIPELINE
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`include "VX_print_instr.vh"
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`ifdef DBG_TRACE_PIPELINE
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`include "VX_trace_instr.vh"
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`endif
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`ifdef EXT_F_ENABLE
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@@ -427,13 +427,13 @@ module VX_decode #(
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assign ifetch_rsp_if.ready = decode_if.ready;
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`ifdef DBG_PRINT_PIPELINE
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`ifdef DBG_TRACE_PIPELINE
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always @(posedge clk) begin
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if (decode_if.valid && decode_if.ready) begin
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dpi_trace("%d: core%0d-decode: wid=%0d, PC=%0h, ex=", $time, CORE_ID, decode_if.wid, decode_if.PC);
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print_ex_type(decode_if.ex_type);
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trace_ex_type(decode_if.ex_type);
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dpi_trace(", op=");
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print_ex_op(decode_if.ex_type, decode_if.op_type, decode_if.op_mod);
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trace_ex_op(decode_if.ex_type, decode_if.op_type, decode_if.op_mod);
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dpi_trace(", mod=%0d, tmask=%b, wb=%b, rd=%0d, rs1=%0d, rs2=%0d, rs3=%0d, imm=%0h, use_pc=%b, use_imm=%b\n", decode_if.op_mod, decode_if.tmask, decode_if.wb, decode_if.rd, decode_if.rs1, decode_if.rs2, decode_if.rs3, decode_if.imm, decode_if.use_PC, decode_if.use_imm);
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end
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end
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