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rebase master update

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This commit is contained in:
Blaise Tine
2021-07-30 21:03:14 -07:00
parent 79fd92a1b4
commit bb1ceffadd
86 changed files with 6111 additions and 132 deletions
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4
hw/rtl/cache/VX_bank.v vendored
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@@ -253,7 +253,7 @@ module VX_bank #(
`ifdef DBG_CACHE_REQ_INFO
if (CORE_TAG_WIDTH != CORE_TAG_ID_BITS && CORE_TAG_ID_BITS != 0) begin
assign {debug_pc_st0, debug_wid_st0} = tag_st0[CORE_TAG_WIDTH-1:CORE_TAG_ID_BITS];
assign {debug_pc_st0, debug_wid_st0} = tag_st0[`CACHE_REQ_INFO_RNG];
end else begin
assign {debug_pc_st0, debug_wid_st0} = 0;
end
@@ -322,7 +322,7 @@ module VX_bank #(
`ifdef DBG_CACHE_REQ_INFO
if (CORE_TAG_WIDTH != CORE_TAG_ID_BITS && CORE_TAG_ID_BITS != 0) begin
assign {debug_pc_st1, debug_wid_st1} = tag_st1[CORE_TAG_WIDTH-1:CORE_TAG_ID_BITS];
assign {debug_pc_st1, debug_wid_st1} = tag_st1[`CACHE_REQ_INFO_RNG];
end else begin
assign {debug_pc_st1, debug_wid_st1} = 0;
end