cache refactoring - phase 2

2020-11-03 04:51:40 -08:00
parent 5be1d85648
commit ba81d76e02
19 changed files with 567 additions and 424 deletions
--- a/hw/rtl/Vortex.v
+++ b/hw/rtl/Vortex.v
@@ -380,11 +380,13 @@ module Vortex (
            .NUM_REQUESTS       (`L3NUM_REQUESTS),
            .CREQ_SIZE          (`L3CREQ_SIZE),
            .MRVQ_SIZE          (`L3MRVQ_SIZE),
-            .DRPQ_SIZE          (`L3DRPQ_SIZE),
+            .DRFQ_SIZE          (`L3DRFQ_SIZE),
            .SNRQ_SIZE          (`L3SNRQ_SIZE),
            .CWBQ_SIZE          (`L3CWBQ_SIZE),
            .DREQ_SIZE          (`L3DREQ_SIZE),
+            .SNPQ_SIZE          (`L3SNPQ_SIZE),
            .DRAM_ENABLE        (1),
+            .FLUSH_ENABLE       (1), 
            .WRITE_ENABLE       (1),
            .SNOOP_FORWARDING   (1),
            .CORE_TAG_WIDTH     (`L2DRAM_TAG_WIDTH),