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cache refactoring - phase 2

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This commit is contained in:
Blaise Tine
2020-11-03 04:51:40 -08:00
parent 5be1d85648
commit ba81d76e02
19 changed files with 567 additions and 424 deletions
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31
hw/rtl/VX_config.vh
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@@ -223,9 +223,14 @@
`define DDREQ_SIZE 8
`endif
// Snoop Response Queue Size
`ifndef DSNPQ_SIZE
`define DSNPQ_SIZE 8
`endif
// DRAM Response Queue Size
`ifndef DDRPQ_SIZE
`define DDRPQ_SIZE 8
`ifndef DDRFQ_SIZE
`define DDRFQ_SIZE 8
`endif
// Snoop Req Queue Size
@@ -276,8 +281,8 @@
`endif
// DRAM Response Queue Size
`ifndef IDRPQ_SIZE
`define IDRPQ_SIZE 8
`ifndef IDRFQ_SIZE
`define IDRFQ_SIZE 8
`endif
// SM Configurable Knobs ======================================================
@@ -355,8 +360,8 @@
`endif
// DRAM Response Queue Size
`ifndef L2DRPQ_SIZE
`define L2DRPQ_SIZE 8
`ifndef L2DRFQ_SIZE
`define L2DRFQ_SIZE 8
`endif
// Snoop Req Queue Size
@@ -364,6 +369,11 @@
`define L2SNRQ_SIZE 8
`endif
// Snoop Response Queue Size
`ifndef L2SNPQ_SIZE
`define L2SNPQ_SIZE 8
`endif
// L3cache Configurable Knobs =================================================
// Size of cache in bytes
@@ -407,8 +417,8 @@
`endif
// DRAM Response Queue Size
`ifndef L3DRPQ_SIZE
`define L3DRPQ_SIZE 8
`ifndef L3DRFQ_SIZE
`define L3DRFQ_SIZE 8
`endif
// Snoop Req Queue Size
@@ -416,4 +426,9 @@
`define L3SNRQ_SIZE 8
`endif
// Snoop Response Queue Size
`ifndef L3SNPQ_SIZE
`define L3SNPQ_SIZE 8
`endif
`endif