cache refactoring - phase 2

2020-11-03 04:51:40 -08:00
parent 5be1d85648
commit ba81d76e02
19 changed files with 567 additions and 424 deletions
--- a/hw/rtl/VX_cluster.v
+++ b/hw/rtl/VX_cluster.v
@@ -357,11 +357,13 @@ module VX_cluster #(
            .NUM_REQUESTS           (`L2NUM_REQUESTS),
            .CREQ_SIZE              (`L2CREQ_SIZE),
            .MRVQ_SIZE              (`L2MRVQ_SIZE),
-            .DRPQ_SIZE              (`L2DRPQ_SIZE),
+            .DRFQ_SIZE              (`L2DRFQ_SIZE),
            .SNRQ_SIZE              (`L2SNRQ_SIZE),
            .CWBQ_SIZE              (`L2CWBQ_SIZE),
            .DREQ_SIZE              (`L2DREQ_SIZE),
+            .SNPQ_SIZE              (`L2SNPQ_SIZE),
            .DRAM_ENABLE            (1),
+            .FLUSH_ENABLE           (1),
            .WRITE_ENABLE           (1),
            .SNOOP_FORWARDING       (1),
            .CORE_TAG_WIDTH         (`DDRAM_TAG_WIDTH),