wu-arch/vortex
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

fix rtl gpr zero

Browse Source
This commit is contained in:
Blaise Tine
2020-05-06 05:25:20 -04:00
parent 7e748e4e38
commit b1fdf0a947
16 changed files with 34529 additions and 78542 deletions
Download Patch File Download Diff File Expand all files Collapse all files

8
hw/simulate/simulator.cpp
View File

@@ -111,11 +111,12 @@ void Simulator::io_driver() {
vortex_->io_req_ready = true;
}
void Simulator::reset() {
time_stamp = 0;
void Simulator::reset() {
vortex_->reset = 1;
this->step();
this->step();
vortex_->reset = 0;
dram_rsp_vec_.clear();
}
void Simulator::step() {
@@ -150,6 +151,7 @@ bool Simulator::is_busy() {
void Simulator::flush_caches(uint32_t mem_addr, uint32_t size) {
// send snoop requests to the caches
printf("[sim] total cycles: %ld\n", time_stamp/2);
// align address to LLC block boundaries
auto aligned_addr_start = mem_addr / GLOBAL_BLOCK_SIZE;
auto aligned_addr_end = (mem_addr + size + GLOBAL_BLOCK_SIZE - 1) / GLOBAL_BLOCK_SIZE;