pipeline optimization: fixed GPR fanout delay to execute units
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@@ -28,7 +28,6 @@ module VX_execute #(
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VX_gpu_req_if gpu_req_if,
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// outputs
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VX_csr_to_issue_if csr_to_issue_if,
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VX_branch_ctl_if branch_ctl_if,
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VX_warp_ctl_if warp_ctl_if,
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VX_exu_to_cmt_if alu_commit_if,
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@@ -41,6 +40,7 @@ module VX_execute #(
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input wire busy,
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output wire ebreak
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);
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VX_csr_to_fpu_if csr_to_fpu_if();
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VX_alu_unit #(
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.CORE_ID(CORE_ID)
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@@ -70,7 +70,7 @@ module VX_execute #(
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.clk (clk),
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.reset (reset),
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.cmt_to_csr_if (cmt_to_csr_if),
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.csr_to_issue_if(csr_to_issue_if),
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.csr_to_fpu_if (csr_to_fpu_if),
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.csr_io_req_if (csr_io_req_if),
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.csr_io_rsp_if (csr_io_rsp_if),
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.csr_req_if (csr_req_if),
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@@ -104,7 +104,8 @@ module VX_execute #(
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) fpu_unit (
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.clk (clk),
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.reset (reset),
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.fpu_req_if (fpu_req_if),
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.fpu_req_if (fpu_req_if),
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.csr_to_fpu_if (csr_to_fpu_if),
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.fpu_commit_if (fpu_commit_if)
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);
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`else
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