Before FE BE abstraction

rtl/interfaces/VX_forward_csr_response_inter.sv

@@ -0,0 +1,32 @@
+
+`include "VX_define.v"
+
+`ifndef VX_FWD_CSR_RSP
+
+`define VX_FWD_CSR_RSP
+
+interface VX_forward_csr_response_inter ();
+		/* verilator lint_off UNUSED */
+		wire                 csr_fwd;
+		wire[31:0]           csr_fwd_data;
+		/* verilator lint_on UNUSED */
+
+	// source-side view
+	modport snk (
+
+		input csr_fwd,
+		input csr_fwd_data
+	);
+
+
+	// source-side view
+	modport src (
+		output csr_fwd,
+		output csr_fwd_data
+	);
+
+
+endinterface
+
+
+`endif

rtl/interfaces/VX_forward_exe_inter.v

@@ -0,0 +1,39 @@
+
+`include "VX_define.v"
+
+`ifndef VX_FWD_EXE
+
+`define VX_FWD_EXE
+
+interface VX_forward_exe_inter ();
+
+		wire[4:0]            dest;
+		wire[1:0]            wb;
+		wire[`NT_M1:0][31:0] alu_result;
+		wire[31:0]           PC_next;
+		wire[`NW_M1:0]       warp_num;
+
+	// source-side view
+	modport snk (
+		input dest,
+		input wb,
+		input alu_result,
+		input PC_next,
+		input warp_num
+	);
+
+
+	// source-side view
+	modport src (
+		output dest,
+		output wb,
+		output alu_result,
+		output PC_next,
+		output warp_num
+	);
+
+
+endinterface
+
+
+`endif

rtl/interfaces/VX_forward_mem_inter.sv

@@ -0,0 +1,42 @@
+
+`include "VX_define.v"
+
+`ifndef VX_FWD_MEM
+
+`define VX_FWD_MEM
+
+interface VX_forward_mem_inter ();
+
+		wire[4:0]              dest;
+		wire[1:0]              wb;
+		wire[`NT_M1:0][31:0]   alu_result;
+		wire[`NT_M1:0][31:0]   mem_data;
+		wire[31:0]             PC_next;
+		wire[`NW_M1:0]         warp_num;
+
+	// source-side view
+	modport snk (
+		input dest,
+		input wb,
+		input alu_result,
+		input mem_data,
+		input PC_next,
+		input warp_num
+	);
+
+
+	// source-side view
+	modport src (
+		output dest,
+		output wb,
+		output alu_result,
+		output mem_data,
+		output PC_next,
+		output warp_num
+	);
+
+
+endinterface
+
+
+`endif

rtl/interfaces/VX_forward_reqeust_inter.v

@@ -0,0 +1,33 @@
+
+`include "VX_define.v"
+
+`ifndef VX_FWD_REQ
+
+`define VX_FWD_REQ
+
+interface VX_forward_reqeust_inter ();
+
+		wire[4:0]      src1;
+		wire[4:0]      src2;
+		wire[`NW_M1:0] warp_num;
+
+	// source-side view
+	modport snk (
+		input src1,
+		input src2,
+		input warp_num
+	);
+
+
+	// source-side view
+	modport src (
+		output src1,
+		output src2,
+		output warp_num
+	);
+
+
+endinterface
+
+
+`endif

rtl/interfaces/VX_forward_response_inter.v

@@ -0,0 +1,36 @@
+
+`include "VX_define.v"
+
+`ifndef VX_FWD_RSP
+
+`define VX_FWD_RSP
+
+interface VX_forward_response_inter ();
+
+		wire                 src1_fwd;
+		wire                 src2_fwd;
+		wire[`NT_M1:0][31:0] src1_fwd_data;
+		wire[`NT_M1:0][31:0] src2_fwd_data;
+
+	// source-side view
+	modport snk (
+		input src1_fwd,
+		input src2_fwd,
+		input src1_fwd_data,
+		input src2_fwd_data
+	);
+
+
+	// source-side view
+	modport src (
+		output src1_fwd,
+		output src2_fwd,
+		output src1_fwd_data,
+		output src2_fwd_data
+	);
+
+
+endinterface
+
+
+`endif

rtl/interfaces/VX_forward_wb_inter.v

@@ -0,0 +1,42 @@
+
+`include "VX_define.v"
+
+`ifndef VX_FWD_WB
+
+`define VX_FWD_WB
+
+interface VX_forward_wb_inter ();
+
+		wire[4:0]            dest;
+		wire[1:0]            wb;
+		wire[`NT_M1:0][31:0] alu_result;
+		wire[`NT_M1:0][31:0] mem_data;
+		wire[31:0]           PC_next;
+		wire[`NW_M1:0]       warp_num;
+
+	// source-side view
+	modport snk (
+		input dest,
+		input wb,
+		input alu_result,
+		input mem_data,
+		input PC_next,
+		input warp_num
+	);
+
+
+	// source-side view
+	modport src (
+		output dest,
+		output wb,
+		output alu_result,
+		output mem_data,
+		output PC_next,
+		output warp_num
+	);
+
+
+endinterface
+
+
+`endif

rtl/interfaces/VX_inst_mem_wb_inter.v

@@ -11,8 +11,6 @@ interface VX_inst_mem_wb_inter ();
 		wire[`NT_M1:0][31:0] mem_result;
 		wire[4:0]            rd;
 		wire[1:0]            wb;
-		wire[4:0]            rs1;
-		wire[4:0]            rs2;
 		wire[31:0]           PC_next;
 		wire[`NT_M1:0]       valid;
 		wire[`NW_M1:0]       warp_num;
@@ -23,8 +21,6 @@ interface VX_inst_mem_wb_inter ();
 		input mem_result,
 		input rd,
 		input wb,
-		input rs1,
-		input rs2,
 		input PC_next,
 		input valid,
 		input warp_num
@@ -37,8 +33,6 @@ interface VX_inst_mem_wb_inter ();
 		output mem_result,
 		output rd,
 		output wb,
-		output rs1,
-		output rs2,
 		output PC_next,
 		output valid,
 		output warp_num

rtl/interfaces/VX_mw_wb_inter.v

@@ -0,0 +1,45 @@
+
+`include "VX_define.v"
+
+`ifndef VX_MW_WB_INTER
+
+`define VX_MW_WB_INTER
+
+interface VX_mw_wb_inter ();
+
+		wire[`NT_M1:0][31:0] alu_result;
+		wire[`NT_M1:0][31:0] mem_result;
+		wire[4:0]            rd;
+		wire[1:0]            wb;
+		wire[31:0]           PC_next;
+		wire[`NT_M1:0]       valid;
+		wire [`NW_M1:0]      warp_num;
+
+	// source-side view
+	modport snk (
+		input alu_result,
+		input mem_result,
+		input rd,
+		input wb,
+		input PC_next,
+		input valid,
+		input warp_num
+	);
+
+
+	// source-side view
+	modport src (
+		input alu_result,
+		input mem_result,
+		input rd,
+		input wb,
+		input PC_next,
+		input valid,
+		input warp_num
+	);
+
+
+endinterface
+
+
+`endif