From abee301b6e2eb15d9d41a7c241e95875fc185c18 Mon Sep 17 00:00:00 2001 From: Zhongdi LUO Date: Wed, 27 May 2026 05:54:24 +0000 Subject: [PATCH] Support 4-lane Blackwell tensor wrapper --- hw/rtl/core/VX_tensor_blackwell_core.sv | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/hw/rtl/core/VX_tensor_blackwell_core.sv b/hw/rtl/core/VX_tensor_blackwell_core.sv index acfd2e43..2f5873e6 100644 --- a/hw/rtl/core/VX_tensor_blackwell_core.sv +++ b/hw/rtl/core/VX_tensor_blackwell_core.sv @@ -28,6 +28,9 @@ module VX_tensor_blackwell_core_block import VX_gpu_pkg::*; #( VX_tc_bus_if.master smem_B_if, VX_commit_if.master commit_if ); + `STATIC_ASSERT((`NUM_THREADS == 4), + ("4-lane Blackwell tensor core wrapper requires NUM_THREADS == 4")) + localparam NUM_LANES = `NUM_THREADS; localparam METADATA_QUEUE_DEPTH = 2; @@ -144,10 +147,6 @@ module VX_tensor_blackwell_core_block import VX_gpu_pkg::*; #( .io_writeback_bits_data_1(writeback_data[1]), .io_writeback_bits_data_2(writeback_data[2]), .io_writeback_bits_data_3(writeback_data[3]), - .io_writeback_bits_data_4(writeback_data[4]), - .io_writeback_bits_data_5(writeback_data[5]), - .io_writeback_bits_data_6(writeback_data[6]), - .io_writeback_bits_data_7(writeback_data[7]), .io_respA_ready(tmem_if.rsp_ready), .io_respA_valid(tmem_if.rsp_valid),