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cache request interfaces update

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This commit is contained in:
Blaise Tine
2021-02-10 20:55:04 -08:00
parent 665b97b810
commit ab63ac9e5d
19 changed files with 275 additions and 192 deletions
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12
hw/rtl/VX_databus_arb.v
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@@ -5,18 +5,18 @@ module VX_databus_arb (
input wire reset,
// input request
VX_cache_core_req_if core_req_if,
VX_dcache_core_req_if core_req_if,
// output requests
VX_cache_core_req_if cache_req_if,
VX_cache_core_req_if smem_req_if,
VX_dcache_core_req_if cache_req_if,
VX_dcache_core_req_if smem_req_if,
// input responses
VX_cache_core_rsp_if cache_rsp_if,
VX_cache_core_rsp_if smem_rsp_if,
VX_dcache_core_rsp_if cache_rsp_if,
VX_dcache_core_rsp_if smem_rsp_if,
// output response
VX_cache_core_rsp_if core_rsp_if
VX_dcache_core_rsp_if core_rsp_if
);
localparam SMEM_ASHIFT = `CLOG2(`SHARED_MEM_BASE_ADDR_ALIGN);
localparam REQ_ASHIFT = `CLOG2(`DWORD_SIZE);