wu-arch/vortex
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Passing some cases

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This commit is contained in:
felsabbagh3
2020-03-04 04:05:54 -08:00
parent d8e25045be
commit aa1a0ee376
22 changed files with 217 additions and 153 deletions
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11
rtl/Vortex.v
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@@ -1,6 +1,6 @@
`include "VX_define.v"
// `include "VX_define.v"
`include "./VX_cache/VX_cache_config.v"
module Vortex
/*#(
@@ -51,15 +51,13 @@ module Vortex
reg[31:0] icache_banks = `ICACHE_BANKS;
reg[31:0] icache_num_words_per_block = `ICACHE_NUM_WORDS_PER_BLOCK;
reg[31:0] number_threads = `NT;
reg[31:0] number_warps = `NW;
always @(posedge clk) begin
icache_banks <= icache_banks;
icache_num_words_per_block <= icache_num_words_per_block;
dcache_banks <= dcache_banks;
dcache_num_words_per_block <= dcache_num_words_per_block;
number_threads <= number_threads;
number_warps <= number_warps;
end
@@ -133,7 +131,6 @@ for (curr_bank = 0; curr_bank < `ICACHE_BANKS; curr_bank = curr_bank + 1) begin
assign VX_dram_req_rsp_icache.i_m_readdata[curr_bank][curr_word] = i_m_readdata_i[curr_bank][curr_word]; // fixed
end
end
endgenerate
/////////////////////////////////////////////////////////////////////////