updating kernels with 32-cores support

This commit is contained in:
Blaise Tine
2021-01-25 10:33:42 -05:00
parent 3602d287b4
commit a9f82bceae
32 changed files with 49971 additions and 49997 deletions

View File

@@ -1,5 +1,5 @@
/tmp/pocl_vortex_kernel-4a-12-5b-81-37.elf: file format ELF32-riscv /tmp/pocl_vortex_kernel-40-a9-cf-21-b7.elf: file format ELF32-riscv
Disassembly of section .init: Disassembly of section .init:
@@ -15,7 +15,7 @@ Disassembly of section .init:
8000001c: 17 15 00 00 auipc a0, 1 8000001c: 17 15 00 00 auipc a0, 1
80000020: 13 05 85 41 addi a0, a0, 1048 80000020: 13 05 85 41 addi a0, a0, 1048
80000024: 17 16 00 00 auipc a2, 1 80000024: 17 16 00 00 auipc a2, 1
80000028: 13 06 06 45 addi a2, a2, 1104 80000028: 13 06 06 49 addi a2, a2, 1168
8000002c: 33 06 a6 40 sub a2, a2, a0 8000002c: 33 06 a6 40 sub a2, a2, a0
80000030: 93 05 00 00 mv a1, zero 80000030: 93 05 00 00 mv a1, zero
80000034: ef 00 90 0c jal 2248 80000034: ef 00 90 0c jal 2248
@@ -185,7 +185,7 @@ Disassembly of section .text:
8000029c: ef 00 80 4f jal 1272 8000029c: ef 00 80 4f jal 1272
800002a0: 93 0a 05 00 mv s5, a0 800002a0: 93 0a 05 00 mv s5, a0
800002a4: ef 00 80 4e jal 1256 800002a4: ef 00 80 4e jal 1256
800002a8: 93 05 f0 00 addi a1, zero, 15 800002a8: 93 05 f0 01 addi a1, zero, 31
800002ac: 63 cc a5 16 blt a1, a0, 376 800002ac: 63 cc a5 16 blt a1, a0, 376
800002b0: b3 05 74 03 mul a1, s0, s7 800002b0: b3 05 74 03 mul a1, s0, s7
800002b4: 33 86 85 03 mul a2, a1, s8 800002b4: 33 86 85 03 mul a2, a1, s8
@@ -205,39 +205,39 @@ Disassembly of section .text:
800002ec: 13 06 00 00 mv a2, zero 800002ec: 13 06 00 00 mv a2, zero
800002f0: b3 06 b6 00 add a3, a2, a1 800002f0: b3 06 b6 00 add a3, a2, a1
800002f4: 33 c6 56 03 div a2, a3, s5 800002f4: 33 c6 56 03 div a2, a3, s5
800002f8: 13 07 00 00 mv a4, zero 800002f8: 93 07 00 00 mv a5, zero
800002fc: 63 50 46 03 bge a2, s4, 32 800002fc: 63 50 46 03 bge a2, s4, 32
80000300: 6f 00 00 02 j 32 80000300: 6f 00 00 02 j 32
80000304: b3 86 d5 02 mul a3, a1, a3 80000304: b3 86 d5 02 mul a3, a1, a3
80000308: 33 06 d6 40 sub a2, a2, a3 80000308: 33 06 d6 40 sub a2, a2, a3
8000030c: b3 06 b6 00 add a3, a2, a1 8000030c: b3 06 b6 00 add a3, a2, a1
80000310: 33 c6 56 03 div a2, a3, s5 80000310: 33 c6 56 03 div a2, a3, s5
80000314: 13 07 00 00 mv a4, zero 80000314: 93 07 00 00 mv a5, zero
80000318: 63 44 46 01 blt a2, s4, 8 80000318: 63 44 46 01 blt a2, s4, 8
8000031c: 33 47 46 03 div a4, a2, s4 8000031c: b3 47 46 03 div a5, a2, s4
80000320: 93 07 00 00 mv a5, zero 80000320: 13 07 00 00 mv a4, zero
80000324: b3 0a 56 03 mul s5, a2, s5 80000324: b3 0a 56 03 mul s5, a2, s5
80000328: 13 04 10 00 addi s0, zero, 1 80000328: 13 08 10 00 addi a6, zero, 1
8000032c: 63 08 07 00 beqz a4, 16 8000032c: 13 04 10 00 addi s0, zero, 1
80000330: b3 07 47 03 mul a5, a4, s4 80000330: 63 88 07 00 beqz a5, 16
80000334: b3 07 f6 40 sub a5, a2, a5 80000334: 33 87 47 03 mul a4, a5, s4
80000338: 13 04 07 00 mv s0, a4 80000338: 33 07 e6 40 sub a4, a2, a4
8000033c: 33 8b 56 41 sub s6, a3, s5 8000033c: 13 84 07 00 mv s0, a5
80000340: 23 20 91 00 sw s1, 0(sp) 80000340: 33 8b 56 41 sub s6, a3, s5
80000344: 23 22 31 01 sw s3, 4(sp) 80000344: 23 20 91 00 sw s1, 0(sp)
80000348: 23 24 21 01 sw s2, 8(sp) 80000348: 23 22 31 01 sw s3, 4(sp)
8000034c: b3 85 a5 02 mul a1, a1, a0 8000034c: 23 24 21 01 sw s2, 8(sp)
80000350: 23 26 b1 00 sw a1, 12(sp) 80000350: b3 85 a5 02 mul a1, a1, a0
80000354: 23 28 81 00 sw s0, 16(sp) 80000354: 23 26 b1 00 sw a1, 12(sp)
80000358: 23 2a f1 00 sw a5, 20(sp) 80000358: 23 28 81 00 sw s0, 16(sp)
8000035c: b7 15 00 80 lui a1, 524289 8000035c: 23 2a e1 00 sw a4, 20(sp)
80000360: 93 85 45 43 addi a1, a1, 1076 80000360: b7 15 00 80 lui a1, 524289
80000364: 13 15 25 00 slli a0, a0, 2 80000364: 93 85 45 43 addi a1, a1, 1076
80000368: 33 05 b5 00 add a0, a0, a1 80000368: 13 15 25 00 slli a0, a0, 2
8000036c: 93 05 01 00 mv a1, sp 8000036c: 33 05 b5 00 add a0, a0, a1
80000370: 93 06 20 00 addi a3, zero, 2 80000370: 93 05 01 00 mv a1, sp
80000374: 23 20 b5 00 sw a1, 0(a0) 80000374: 23 20 b5 00 sw a1, 0(a0)
80000378: 63 40 d6 02 blt a2, a3, 32 80000378: 63 40 06 03 blt a2, a6, 32
8000037c: 63 44 46 01 blt a2, s4, 8 8000037c: 63 44 46 01 blt a2, s4, 8
80000380: 13 06 0a 00 mv a2, s4 80000380: 13 06 0a 00 mv a2, s4
80000384: 37 05 00 80 lui a0, 524288 80000384: 37 05 00 80 lui a0, 524288
@@ -550,11 +550,11 @@ Disassembly of section .text:
800007a8: 67 80 00 00 ret 800007a8: 67 80 00 00 ret
800007ac vx_num_cycles: 800007ac vx_num_cycles:
800007ac: 73 25 00 b0 csrr a0, mcycle 800007ac: 73 25 00 c0 rdcycle a0
800007b0: 67 80 00 00 ret 800007b0: 67 80 00 00 ret
800007b4 vx_num_instrs: 800007b4 vx_num_instrs:
800007b4: 73 25 20 b0 csrr a0, minstret 800007b4: 73 25 20 c0 rdinstret a0
800007b8: 67 80 00 00 ret 800007b8: 67 80 00 00 ret
800007bc atexit: 800007bc atexit:
@@ -1130,7 +1130,7 @@ Disassembly of section .symtab:
210: 33 01 00 00 add sp, zero, zero 210: 33 01 00 00 add sp, zero, zero
214: 34 14 <unknown> 214: 34 14 <unknown>
216: 00 80 <unknown> 216: 00 80 <unknown>
218: 40 00 <unknown> 218: 80 00 <unknown>
21a: 00 00 <unknown> 21a: 00 00 <unknown>
21c: 11 00 <unknown> 21c: 11 00 <unknown>
21e: 06 00 <unknown> 21e: 06 00 <unknown>
@@ -1308,7 +1308,7 @@ Disassembly of section .symtab:
37e: 02 00 <unknown> 37e: 02 00 <unknown>
380: 7c 02 <unknown> 380: 7c 02 <unknown>
382: 00 00 <unknown> 382: 00 00 <unknown>
384: 74 14 <unknown> 384: b4 14 <unknown>
386: 00 80 <unknown> 386: 00 80 <unknown>
388: 00 00 <unknown> 388: 00 00 <unknown>
38a: 00 00 <unknown> 38a: 00 00 <unknown>
@@ -1401,7 +1401,7 @@ Disassembly of section .symtab:
43e: 05 00 <unknown> 43e: 05 00 <unknown>
440: 9d 00 <unknown> 440: 9d 00 <unknown>
442: 00 00 <unknown> 442: 00 00 <unknown>
444: 74 14 <unknown> 444: b4 14 <unknown>
446: 00 80 <unknown> 446: 00 80 <unknown>
448: 00 00 <unknown> 448: 00 00 <unknown>
44a: 00 00 <unknown> 44a: 00 00 <unknown>
@@ -1478,12 +1478,13 @@ Disassembly of section .strtab:
3e: 5f 6b 65 72 <unknown> 3e: 5f 6b 65 72 <unknown>
42: 6e 65 <unknown> 42: 6e 65 <unknown>
44: 6c 2d <unknown> 44: 6c 2d <unknown>
46: 37 32 2d 62 lui tp, 402131 46: 39 62 <unknown>
48: 2d 37 <unknown>
4a: 62 2d <unknown> 4a: 62 2d <unknown>
4c: 62 61 <unknown> 4c: 34 36 <unknown>
4e: 2d 63 <unknown> 4e: 2d 36 <unknown>
50: 30 2d <unknown> 50: 38 2d <unknown>
52: 37 64 2e 63 lui s0, 406246 52: 63 31 2e 63 <unknown>
56: 00 70 <unknown> 56: 00 70 <unknown>
58: 61 72 <unknown> 58: 61 72 <unknown>
5a: 61 6c <unknown> 5a: 61 6c <unknown>

View File

@@ -1,5 +1,5 @@
/tmp/pocl_vortex_kernel-55-6b-f9-64-73.elf: file format ELF32-riscv /tmp/pocl_vortex_kernel-e8-31-f8-9e-55.elf: file format ELF32-riscv
Disassembly of section .init: Disassembly of section .init:
@@ -15,7 +15,7 @@ Disassembly of section .init:
8000001c: 17 15 00 00 auipc a0, 1 8000001c: 17 15 00 00 auipc a0, 1
80000020: 13 05 85 41 addi a0, a0, 1048 80000020: 13 05 85 41 addi a0, a0, 1048
80000024: 17 16 00 00 auipc a2, 1 80000024: 17 16 00 00 auipc a2, 1
80000028: 13 06 06 45 addi a2, a2, 1104 80000028: 13 06 06 49 addi a2, a2, 1168
8000002c: 33 06 a6 40 sub a2, a2, a0 8000002c: 33 06 a6 40 sub a2, a2, a0
80000030: 93 05 00 00 mv a1, zero 80000030: 93 05 00 00 mv a1, zero
80000034: ef 00 50 42 jal 3108 80000034: ef 00 50 42 jal 3108
@@ -185,7 +185,7 @@ Disassembly of section .text:
8000029c: ef 00 50 05 jal 2132 8000029c: ef 00 50 05 jal 2132
800002a0: 93 0a 05 00 mv s5, a0 800002a0: 93 0a 05 00 mv s5, a0
800002a4: ef 00 50 04 jal 2116 800002a4: ef 00 50 04 jal 2116
800002a8: 93 05 f0 00 addi a1, zero, 15 800002a8: 93 05 f0 01 addi a1, zero, 31
800002ac: 63 cc a5 16 blt a1, a0, 376 800002ac: 63 cc a5 16 blt a1, a0, 376
800002b0: b3 05 74 03 mul a1, s0, s7 800002b0: b3 05 74 03 mul a1, s0, s7
800002b4: 33 86 85 03 mul a2, a1, s8 800002b4: 33 86 85 03 mul a2, a1, s8
@@ -205,39 +205,39 @@ Disassembly of section .text:
800002ec: 13 06 00 00 mv a2, zero 800002ec: 13 06 00 00 mv a2, zero
800002f0: b3 06 b6 00 add a3, a2, a1 800002f0: b3 06 b6 00 add a3, a2, a1
800002f4: 33 c6 56 03 div a2, a3, s5 800002f4: 33 c6 56 03 div a2, a3, s5
800002f8: 13 07 00 00 mv a4, zero 800002f8: 93 07 00 00 mv a5, zero
800002fc: 63 50 46 03 bge a2, s4, 32 800002fc: 63 50 46 03 bge a2, s4, 32
80000300: 6f 00 00 02 j 32 80000300: 6f 00 00 02 j 32
80000304: b3 86 d5 02 mul a3, a1, a3 80000304: b3 86 d5 02 mul a3, a1, a3
80000308: 33 06 d6 40 sub a2, a2, a3 80000308: 33 06 d6 40 sub a2, a2, a3
8000030c: b3 06 b6 00 add a3, a2, a1 8000030c: b3 06 b6 00 add a3, a2, a1
80000310: 33 c6 56 03 div a2, a3, s5 80000310: 33 c6 56 03 div a2, a3, s5
80000314: 13 07 00 00 mv a4, zero 80000314: 93 07 00 00 mv a5, zero
80000318: 63 44 46 01 blt a2, s4, 8 80000318: 63 44 46 01 blt a2, s4, 8
8000031c: 33 47 46 03 div a4, a2, s4 8000031c: b3 47 46 03 div a5, a2, s4
80000320: 93 07 00 00 mv a5, zero 80000320: 13 07 00 00 mv a4, zero
80000324: b3 0a 56 03 mul s5, a2, s5 80000324: b3 0a 56 03 mul s5, a2, s5
80000328: 13 04 10 00 addi s0, zero, 1 80000328: 13 08 10 00 addi a6, zero, 1
8000032c: 63 08 07 00 beqz a4, 16 8000032c: 13 04 10 00 addi s0, zero, 1
80000330: b3 07 47 03 mul a5, a4, s4 80000330: 63 88 07 00 beqz a5, 16
80000334: b3 07 f6 40 sub a5, a2, a5 80000334: 33 87 47 03 mul a4, a5, s4
80000338: 13 04 07 00 mv s0, a4 80000338: 33 07 e6 40 sub a4, a2, a4
8000033c: 33 8b 56 41 sub s6, a3, s5 8000033c: 13 84 07 00 mv s0, a5
80000340: 23 20 91 00 sw s1, 0(sp) 80000340: 33 8b 56 41 sub s6, a3, s5
80000344: 23 22 31 01 sw s3, 4(sp) 80000344: 23 20 91 00 sw s1, 0(sp)
80000348: 23 24 21 01 sw s2, 8(sp) 80000348: 23 22 31 01 sw s3, 4(sp)
8000034c: b3 85 a5 02 mul a1, a1, a0 8000034c: 23 24 21 01 sw s2, 8(sp)
80000350: 23 26 b1 00 sw a1, 12(sp) 80000350: b3 85 a5 02 mul a1, a1, a0
80000354: 23 28 81 00 sw s0, 16(sp) 80000354: 23 26 b1 00 sw a1, 12(sp)
80000358: 23 2a f1 00 sw a5, 20(sp) 80000358: 23 28 81 00 sw s0, 16(sp)
8000035c: b7 15 00 80 lui a1, 524289 8000035c: 23 2a e1 00 sw a4, 20(sp)
80000360: 93 85 45 43 addi a1, a1, 1076 80000360: b7 15 00 80 lui a1, 524289
80000364: 13 15 25 00 slli a0, a0, 2 80000364: 93 85 45 43 addi a1, a1, 1076
80000368: 33 05 b5 00 add a0, a0, a1 80000368: 13 15 25 00 slli a0, a0, 2
8000036c: 93 05 01 00 mv a1, sp 8000036c: 33 05 b5 00 add a0, a0, a1
80000370: 93 06 20 00 addi a3, zero, 2 80000370: 93 05 01 00 mv a1, sp
80000374: 23 20 b5 00 sw a1, 0(a0) 80000374: 23 20 b5 00 sw a1, 0(a0)
80000378: 63 40 d6 02 blt a2, a3, 32 80000378: 63 40 06 03 blt a2, a6, 32
8000037c: 63 44 46 01 blt a2, s4, 8 8000037c: 63 44 46 01 blt a2, s4, 8
80000380: 13 06 0a 00 mv a2, s4 80000380: 13 06 0a 00 mv a2, s4
80000384: 37 05 00 80 lui a0, 524288 80000384: 37 05 00 80 lui a0, 524288
@@ -765,11 +765,11 @@ Disassembly of section .text:
80000b04: 67 80 00 00 ret 80000b04: 67 80 00 00 ret
80000b08 vx_num_cycles: 80000b08 vx_num_cycles:
80000b08: 73 25 00 b0 csrr a0, mcycle 80000b08: 73 25 00 c0 rdcycle a0
80000b0c: 67 80 00 00 ret 80000b0c: 67 80 00 00 ret
80000b10 vx_num_instrs: 80000b10 vx_num_instrs:
80000b10: 73 25 20 b0 csrr a0, minstret 80000b10: 73 25 20 c0 rdinstret a0
80000b14: 67 80 00 00 ret 80000b14: 67 80 00 00 ret
80000b18 atexit: 80000b18 atexit:
@@ -1345,7 +1345,7 @@ Disassembly of section .symtab:
210: 33 01 00 00 add sp, zero, zero 210: 33 01 00 00 add sp, zero, zero
214: 34 14 <unknown> 214: 34 14 <unknown>
216: 00 80 <unknown> 216: 00 80 <unknown>
218: 40 00 <unknown> 218: 80 00 <unknown>
21a: 00 00 <unknown> 21a: 00 00 <unknown>
21c: 11 00 <unknown> 21c: 11 00 <unknown>
21e: 06 00 <unknown> 21e: 06 00 <unknown>
@@ -1518,7 +1518,7 @@ Disassembly of section .symtab:
37c: 12 00 <unknown> 37c: 12 00 <unknown>
37e: 02 00 <unknown> 37e: 02 00 <unknown>
380: 8b 02 00 00 <unknown> 380: 8b 02 00 00 <unknown>
384: 74 14 <unknown> 384: b4 14 <unknown>
386: 00 80 <unknown> 386: 00 80 <unknown>
388: 00 00 <unknown> 388: 00 00 <unknown>
38a: 00 00 <unknown> 38a: 00 00 <unknown>
@@ -1601,7 +1601,7 @@ Disassembly of section .symtab:
42e: 05 00 <unknown> 42e: 05 00 <unknown>
430: 9d 00 <unknown> 430: 9d 00 <unknown>
432: 00 00 <unknown> 432: 00 00 <unknown>
434: 74 14 <unknown> 434: b4 14 <unknown>
436: 00 80 <unknown> 436: 00 80 <unknown>
438: 00 00 <unknown> 438: 00 00 <unknown>
43a: 00 00 <unknown> 43a: 00 00 <unknown>
@@ -1687,13 +1687,11 @@ Disassembly of section .strtab:
3e: 5f 6b 65 72 <unknown> 3e: 5f 6b 65 72 <unknown>
42: 6e 65 <unknown> 42: 6e 65 <unknown>
44: 6c 2d <unknown> 44: 6c 2d <unknown>
46: 39 34 <unknown> 46: 39 62 <unknown>
48: 2d 62 <unknown> 48: 2d 36 <unknown>
4a: 61 2d <unknown> 4a: 33 2d 34 32 <unknown>
4c: 36 30 <unknown> 4e: 2d 33 <unknown>
4e: 2d 35 <unknown> 50: 37 2d 34 65 lui s10, 414530
50: 65 2d <unknown>
52: 31 38 <unknown>
54: 2e 63 <unknown> 54: 2e 63 <unknown>
56: 00 70 <unknown> 56: 00 70 <unknown>
58: 61 72 <unknown> 58: 61 72 <unknown>

View File

@@ -1,5 +1,5 @@
/tmp/pocl_vortex_kernel-1e-61-ae-14-72.elf: file format ELF32-riscv /tmp/pocl_vortex_kernel-c8-d5-36-ec-11.elf: file format ELF32-riscv
Disassembly of section .init: Disassembly of section .init:
@@ -15,7 +15,7 @@ Disassembly of section .init:
8000001c: 17 15 00 00 auipc a0, 1 8000001c: 17 15 00 00 auipc a0, 1
80000020: 13 05 c5 41 addi a0, a0, 1052 80000020: 13 05 c5 41 addi a0, a0, 1052
80000024: 17 16 00 00 auipc a2, 1 80000024: 17 16 00 00 auipc a2, 1
80000028: 13 06 86 45 addi a2, a2, 1112 80000028: 13 06 86 49 addi a2, a2, 1176
8000002c: 33 06 a6 40 sub a2, a2, a0 8000002c: 33 06 a6 40 sub a2, a2, a0
80000030: 93 05 00 00 mv a1, zero 80000030: 93 05 00 00 mv a1, zero
80000034: ef 00 90 3d jal 3032 80000034: ef 00 90 3d jal 3032
@@ -185,7 +185,7 @@ Disassembly of section .text:
8000029c: ef 00 c0 67 jal 1660 8000029c: ef 00 c0 67 jal 1660
800002a0: 93 0a 05 00 mv s5, a0 800002a0: 93 0a 05 00 mv s5, a0
800002a4: ef 00 c0 66 jal 1644 800002a4: ef 00 c0 66 jal 1644
800002a8: 93 05 f0 00 addi a1, zero, 15 800002a8: 93 05 f0 01 addi a1, zero, 31
800002ac: 63 cc a5 16 blt a1, a0, 376 800002ac: 63 cc a5 16 blt a1, a0, 376
800002b0: b3 05 74 03 mul a1, s0, s7 800002b0: b3 05 74 03 mul a1, s0, s7
800002b4: 33 86 85 03 mul a2, a1, s8 800002b4: 33 86 85 03 mul a2, a1, s8
@@ -205,39 +205,39 @@ Disassembly of section .text:
800002ec: 13 06 00 00 mv a2, zero 800002ec: 13 06 00 00 mv a2, zero
800002f0: b3 06 b6 00 add a3, a2, a1 800002f0: b3 06 b6 00 add a3, a2, a1
800002f4: 33 c6 56 03 div a2, a3, s5 800002f4: 33 c6 56 03 div a2, a3, s5
800002f8: 13 07 00 00 mv a4, zero 800002f8: 93 07 00 00 mv a5, zero
800002fc: 63 50 46 03 bge a2, s4, 32 800002fc: 63 50 46 03 bge a2, s4, 32
80000300: 6f 00 00 02 j 32 80000300: 6f 00 00 02 j 32
80000304: b3 86 d5 02 mul a3, a1, a3 80000304: b3 86 d5 02 mul a3, a1, a3
80000308: 33 06 d6 40 sub a2, a2, a3 80000308: 33 06 d6 40 sub a2, a2, a3
8000030c: b3 06 b6 00 add a3, a2, a1 8000030c: b3 06 b6 00 add a3, a2, a1
80000310: 33 c6 56 03 div a2, a3, s5 80000310: 33 c6 56 03 div a2, a3, s5
80000314: 13 07 00 00 mv a4, zero 80000314: 93 07 00 00 mv a5, zero
80000318: 63 44 46 01 blt a2, s4, 8 80000318: 63 44 46 01 blt a2, s4, 8
8000031c: 33 47 46 03 div a4, a2, s4 8000031c: b3 47 46 03 div a5, a2, s4
80000320: 93 07 00 00 mv a5, zero 80000320: 13 07 00 00 mv a4, zero
80000324: b3 0a 56 03 mul s5, a2, s5 80000324: b3 0a 56 03 mul s5, a2, s5
80000328: 13 04 10 00 addi s0, zero, 1 80000328: 13 08 10 00 addi a6, zero, 1
8000032c: 63 08 07 00 beqz a4, 16 8000032c: 13 04 10 00 addi s0, zero, 1
80000330: b3 07 47 03 mul a5, a4, s4 80000330: 63 88 07 00 beqz a5, 16
80000334: b3 07 f6 40 sub a5, a2, a5 80000334: 33 87 47 03 mul a4, a5, s4
80000338: 13 04 07 00 mv s0, a4 80000338: 33 07 e6 40 sub a4, a2, a4
8000033c: 33 8b 56 41 sub s6, a3, s5 8000033c: 13 84 07 00 mv s0, a5
80000340: 23 20 91 00 sw s1, 0(sp) 80000340: 33 8b 56 41 sub s6, a3, s5
80000344: 23 22 31 01 sw s3, 4(sp) 80000344: 23 20 91 00 sw s1, 0(sp)
80000348: 23 24 21 01 sw s2, 8(sp) 80000348: 23 22 31 01 sw s3, 4(sp)
8000034c: b3 85 a5 02 mul a1, a1, a0 8000034c: 23 24 21 01 sw s2, 8(sp)
80000350: 23 26 b1 00 sw a1, 12(sp) 80000350: b3 85 a5 02 mul a1, a1, a0
80000354: 23 28 81 00 sw s0, 16(sp) 80000354: 23 26 b1 00 sw a1, 12(sp)
80000358: 23 2a f1 00 sw a5, 20(sp) 80000358: 23 28 81 00 sw s0, 16(sp)
8000035c: b7 15 00 80 lui a1, 524289 8000035c: 23 2a e1 00 sw a4, 20(sp)
80000360: 93 85 c5 43 addi a1, a1, 1084 80000360: b7 15 00 80 lui a1, 524289
80000364: 13 15 25 00 slli a0, a0, 2 80000364: 93 85 c5 43 addi a1, a1, 1084
80000368: 33 05 b5 00 add a0, a0, a1 80000368: 13 15 25 00 slli a0, a0, 2
8000036c: 93 05 01 00 mv a1, sp 8000036c: 33 05 b5 00 add a0, a0, a1
80000370: 93 06 20 00 addi a3, zero, 2 80000370: 93 05 01 00 mv a1, sp
80000374: 23 20 b5 00 sw a1, 0(a0) 80000374: 23 20 b5 00 sw a1, 0(a0)
80000378: 63 40 d6 02 blt a2, a3, 32 80000378: 63 40 06 03 blt a2, a6, 32
8000037c: 63 44 46 01 blt a2, s4, 8 8000037c: 63 44 46 01 blt a2, s4, 8
80000380: 13 06 0a 00 mv a2, s4 80000380: 13 06 0a 00 mv a2, s4
80000384: 37 05 00 80 lui a0, 524288 80000384: 37 05 00 80 lui a0, 524288
@@ -649,11 +649,11 @@ Disassembly of section .text:
8000092c: 67 80 00 00 ret 8000092c: 67 80 00 00 ret
80000930 vx_num_cycles: 80000930 vx_num_cycles:
80000930: 73 25 00 b0 csrr a0, mcycle 80000930: 73 25 00 c0 rdcycle a0
80000934: 67 80 00 00 ret 80000934: 67 80 00 00 ret
80000938 vx_num_instrs: 80000938 vx_num_instrs:
80000938: 73 25 20 b0 csrr a0, minstret 80000938: 73 25 20 c0 rdinstret a0
8000093c: 67 80 00 00 ret 8000093c: 67 80 00 00 ret
80000940 sqrtf: 80000940 sqrtf:
@@ -1379,7 +1379,7 @@ Disassembly of section .symtab:
272: 00 00 <unknown> 272: 00 00 <unknown>
274: 3c 14 <unknown> 274: 3c 14 <unknown>
276: 00 80 <unknown> 276: 00 80 <unknown>
278: 40 00 <unknown> 278: 80 00 <unknown>
27a: 00 00 <unknown> 27a: 00 00 <unknown>
27c: 11 00 <unknown> 27c: 11 00 <unknown>
27e: 07 00 72 01 <unknown> 27e: 07 00 72 01 <unknown>
@@ -1552,7 +1552,7 @@ Disassembly of section .symtab:
3dc: 12 00 <unknown> 3dc: 12 00 <unknown>
3de: 02 00 <unknown> 3de: 02 00 <unknown>
3e0: 8f 02 00 00 <unknown> 3e0: 8f 02 00 00 <unknown>
3e4: 7c 14 <unknown> 3e4: bc 14 <unknown>
3e6: 00 80 <unknown> 3e6: 00 80 <unknown>
3e8: 00 00 <unknown> 3e8: 00 00 <unknown>
3ea: 00 00 <unknown> 3ea: 00 00 <unknown>
@@ -1666,7 +1666,7 @@ Disassembly of section .symtab:
4ce: 05 00 <unknown> 4ce: 05 00 <unknown>
4d0: c6 00 <unknown> 4d0: c6 00 <unknown>
4d2: 00 00 <unknown> 4d2: 00 00 <unknown>
4d4: 7c 14 <unknown> 4d4: bc 14 <unknown>
4d6: 00 80 <unknown> 4d6: 00 80 <unknown>
4d8: 00 00 <unknown> 4d8: 00 00 <unknown>
4da: 00 00 <unknown> 4da: 00 00 <unknown>
@@ -1752,13 +1752,13 @@ Disassembly of section .strtab:
3e: 5f 6b 65 72 <unknown> 3e: 5f 6b 65 72 <unknown>
42: 6e 65 <unknown> 42: 6e 65 <unknown>
44: 6c 2d <unknown> 44: 6c 2d <unknown>
46: 36 35 <unknown> 46: 30 65 <unknown>
48: 2d 62 <unknown> 48: 2d 31 <unknown>
4a: 62 2d <unknown> 4a: 36 2d <unknown>
4c: 30 66 <unknown> 4c: 65 36 <unknown>
4e: 2d 37 <unknown> 4e: 2d 61 <unknown>
50: 34 2d <unknown> 50: 66 2d <unknown>
52: 62 31 <unknown> 52: 66 63 <unknown>
54: 2e 63 <unknown> 54: 2e 63 <unknown>
56: 00 70 <unknown> 56: 00 70 <unknown>
58: 61 72 <unknown> 58: 61 72 <unknown>

Binary file not shown.

Binary file not shown.

View File

@@ -1,5 +1,5 @@
/tmp/pocl_vortex_kernel-cd-81-06-70-1c.elf: file format ELF32-riscv /tmp/pocl_vortex_kernel-4b-52-a6-ca-24.elf: file format ELF32-riscv
Disassembly of section .init: Disassembly of section .init:
@@ -15,7 +15,7 @@ Disassembly of section .init:
8000001c: 17 25 00 00 auipc a0, 2 8000001c: 17 25 00 00 auipc a0, 2
80000020: 13 05 85 ed addi a0, a0, -296 80000020: 13 05 85 ed addi a0, a0, -296
80000024: 17 26 00 00 auipc a2, 2 80000024: 17 26 00 00 auipc a2, 2
80000028: 13 06 06 f1 addi a2, a2, -240 80000028: 13 06 06 f5 addi a2, a2, -176
8000002c: 33 06 a6 40 sub a2, a2, a0 8000002c: 33 06 a6 40 sub a2, a2, a0
80000030: 93 05 00 00 mv a1, zero 80000030: 93 05 00 00 mv a1, zero
80000034: ef 00 00 7f jal 2032 80000034: ef 00 00 7f jal 2032
@@ -185,7 +185,7 @@ Disassembly of section .text:
8000029c: ef 00 00 42 jal 1056 8000029c: ef 00 00 42 jal 1056
800002a0: 93 0a 05 00 mv s5, a0 800002a0: 93 0a 05 00 mv s5, a0
800002a4: ef 00 00 41 jal 1040 800002a4: ef 00 00 41 jal 1040
800002a8: 93 05 f0 00 addi a1, zero, 15 800002a8: 93 05 f0 01 addi a1, zero, 31
800002ac: 63 cc a5 16 blt a1, a0, 376 800002ac: 63 cc a5 16 blt a1, a0, 376
800002b0: b3 05 74 03 mul a1, s0, s7 800002b0: b3 05 74 03 mul a1, s0, s7
800002b4: 33 86 85 03 mul a2, a1, s8 800002b4: 33 86 85 03 mul a2, a1, s8
@@ -205,39 +205,39 @@ Disassembly of section .text:
800002ec: 13 06 00 00 mv a2, zero 800002ec: 13 06 00 00 mv a2, zero
800002f0: b3 06 b6 00 add a3, a2, a1 800002f0: b3 06 b6 00 add a3, a2, a1
800002f4: 33 c6 56 03 div a2, a3, s5 800002f4: 33 c6 56 03 div a2, a3, s5
800002f8: 13 07 00 00 mv a4, zero 800002f8: 93 07 00 00 mv a5, zero
800002fc: 63 50 46 03 bge a2, s4, 32 800002fc: 63 50 46 03 bge a2, s4, 32
80000300: 6f 00 00 02 j 32 80000300: 6f 00 00 02 j 32
80000304: b3 86 d5 02 mul a3, a1, a3 80000304: b3 86 d5 02 mul a3, a1, a3
80000308: 33 06 d6 40 sub a2, a2, a3 80000308: 33 06 d6 40 sub a2, a2, a3
8000030c: b3 06 b6 00 add a3, a2, a1 8000030c: b3 06 b6 00 add a3, a2, a1
80000310: 33 c6 56 03 div a2, a3, s5 80000310: 33 c6 56 03 div a2, a3, s5
80000314: 13 07 00 00 mv a4, zero 80000314: 93 07 00 00 mv a5, zero
80000318: 63 44 46 01 blt a2, s4, 8 80000318: 63 44 46 01 blt a2, s4, 8
8000031c: 33 47 46 03 div a4, a2, s4 8000031c: b3 47 46 03 div a5, a2, s4
80000320: 93 07 00 00 mv a5, zero 80000320: 13 07 00 00 mv a4, zero
80000324: b3 0a 56 03 mul s5, a2, s5 80000324: b3 0a 56 03 mul s5, a2, s5
80000328: 13 04 10 00 addi s0, zero, 1 80000328: 13 08 10 00 addi a6, zero, 1
8000032c: 63 08 07 00 beqz a4, 16 8000032c: 13 04 10 00 addi s0, zero, 1
80000330: b3 07 47 03 mul a5, a4, s4 80000330: 63 88 07 00 beqz a5, 16
80000334: b3 07 f6 40 sub a5, a2, a5 80000334: 33 87 47 03 mul a4, a5, s4
80000338: 13 04 07 00 mv s0, a4 80000338: 33 07 e6 40 sub a4, a2, a4
8000033c: 33 8b 56 41 sub s6, a3, s5 8000033c: 13 84 07 00 mv s0, a5
80000340: 23 20 91 00 sw s1, 0(sp) 80000340: 33 8b 56 41 sub s6, a3, s5
80000344: 23 22 31 01 sw s3, 4(sp) 80000344: 23 20 91 00 sw s1, 0(sp)
80000348: 23 24 21 01 sw s2, 8(sp) 80000348: 23 22 31 01 sw s3, 4(sp)
8000034c: b3 85 a5 02 mul a1, a1, a0 8000034c: 23 24 21 01 sw s2, 8(sp)
80000350: 23 26 b1 00 sw a1, 12(sp) 80000350: b3 85 a5 02 mul a1, a1, a0
80000354: 23 28 81 00 sw s0, 16(sp) 80000354: 23 26 b1 00 sw a1, 12(sp)
80000358: 23 2a f1 00 sw a5, 20(sp) 80000358: 23 28 81 00 sw s0, 16(sp)
8000035c: b7 25 00 80 lui a1, 524290 8000035c: 23 2a e1 00 sw a4, 20(sp)
80000360: 93 85 45 ef addi a1, a1, -268 80000360: b7 25 00 80 lui a1, 524290
80000364: 13 15 25 00 slli a0, a0, 2 80000364: 93 85 45 ef addi a1, a1, -268
80000368: 33 05 b5 00 add a0, a0, a1 80000368: 13 15 25 00 slli a0, a0, 2
8000036c: 93 05 01 00 mv a1, sp 8000036c: 33 05 b5 00 add a0, a0, a1
80000370: 93 06 20 00 addi a3, zero, 2 80000370: 93 05 01 00 mv a1, sp
80000374: 23 20 b5 00 sw a1, 0(a0) 80000374: 23 20 b5 00 sw a1, 0(a0)
80000378: 63 40 d6 02 blt a2, a3, 32 80000378: 63 40 06 03 blt a2, a6, 32
8000037c: 63 44 46 01 blt a2, s4, 8 8000037c: 63 44 46 01 blt a2, s4, 8
80000380: 13 06 0a 00 mv a2, s4 80000380: 13 06 0a 00 mv a2, s4
80000384: 37 05 00 80 lui a0, 524288 80000384: 37 05 00 80 lui a0, 524288
@@ -496,11 +496,11 @@ Disassembly of section .text:
800006d0: 67 80 00 00 ret 800006d0: 67 80 00 00 ret
800006d4 vx_num_cycles: 800006d4 vx_num_cycles:
800006d4: 73 25 00 b0 csrr a0, mcycle 800006d4: 73 25 00 c0 rdcycle a0
800006d8: 67 80 00 00 ret 800006d8: 67 80 00 00 ret
800006dc vx_num_instrs: 800006dc vx_num_instrs:
800006dc: 73 25 20 b0 csrr a0, minstret 800006dc: 73 25 20 c0 rdinstret a0
800006e0: 67 80 00 00 ret 800006e0: 67 80 00 00 ret
800006e4 atexit: 800006e4 atexit:
@@ -1076,7 +1076,7 @@ Disassembly of section .symtab:
210: 33 01 00 00 add sp, zero, zero 210: 33 01 00 00 add sp, zero, zero
214: f4 1e <unknown> 214: f4 1e <unknown>
216: 00 80 <unknown> 216: 00 80 <unknown>
218: 40 00 <unknown> 218: 80 00 <unknown>
21a: 00 00 <unknown> 21a: 00 00 <unknown>
21c: 11 00 <unknown> 21c: 11 00 <unknown>
21e: 06 00 <unknown> 21e: 06 00 <unknown>
@@ -1245,7 +1245,7 @@ Disassembly of section .symtab:
36e: 02 00 <unknown> 36e: 02 00 <unknown>
370: 61 02 <unknown> 370: 61 02 <unknown>
372: 00 00 <unknown> 372: 00 00 <unknown>
374: 34 1f <unknown> 374: 74 1f <unknown>
376: 00 80 <unknown> 376: 00 80 <unknown>
378: 00 00 <unknown> 378: 00 00 <unknown>
37a: 00 00 <unknown> 37a: 00 00 <unknown>
@@ -1338,7 +1338,7 @@ Disassembly of section .symtab:
42e: 05 00 <unknown> 42e: 05 00 <unknown>
430: 9d 00 <unknown> 430: 9d 00 <unknown>
432: 00 00 <unknown> 432: 00 00 <unknown>
434: 34 1f <unknown> 434: 74 1f <unknown>
436: 00 80 <unknown> 436: 00 80 <unknown>
438: 00 00 <unknown> 438: 00 00 <unknown>
43a: 00 00 <unknown> 43a: 00 00 <unknown>
@@ -1425,14 +1425,12 @@ Disassembly of section .strtab:
3e: 5f 6b 65 72 <unknown> 3e: 5f 6b 65 72 <unknown>
42: 6e 65 <unknown> 42: 6e 65 <unknown>
44: 6c 2d <unknown> 44: 6c 2d <unknown>
46: 61 30 <unknown> 46: 35 35 <unknown>
48: 2d 38 <unknown> 48: 2d 36 <unknown>
4a: 65 2d <unknown> 4a: 63 2d 39 32 <unknown>
4c: 38 62 <unknown> 4e: 2d 61 <unknown>
4e: 2d 64 <unknown> 50: 65 2d <unknown>
50: 39 2d <unknown> 52: 63 35 2e 63 <unknown>
52: 32 66 <unknown>
54: 2e 63 <unknown>
56: 00 70 <unknown> 56: 00 70 <unknown>
58: 61 72 <unknown> 58: 61 72 <unknown>
5a: 61 6c <unknown> 5a: 61 6c <unknown>

View File

@@ -1,5 +1,5 @@
/tmp/pocl_vortex_kernel-10-e3-85-d7-4f.elf: file format ELF32-riscv /tmp/pocl_vortex_kernel-fa-f1-cf-55-d5.elf: file format ELF32-riscv
Disassembly of section .init: Disassembly of section .init:
@@ -15,7 +15,7 @@ Disassembly of section .init:
8000001c: 17 25 00 00 auipc a0, 2 8000001c: 17 25 00 00 auipc a0, 2
80000020: 13 05 85 46 addi a0, a0, 1128 80000020: 13 05 85 46 addi a0, a0, 1128
80000024: 17 26 00 00 auipc a2, 2 80000024: 17 26 00 00 auipc a2, 2
80000028: 13 06 06 4a addi a2, a2, 1184 80000028: 13 06 06 4e addi a2, a2, 1248
8000002c: 33 06 a6 40 sub a2, a2, a0 8000002c: 33 06 a6 40 sub a2, a2, a0
80000030: 93 05 00 00 mv a1, zero 80000030: 93 05 00 00 mv a1, zero
80000034: ef 00 10 58 jal 3456 80000034: ef 00 10 58 jal 3456
@@ -185,7 +185,7 @@ Disassembly of section .text:
8000029c: ef 00 10 1b jal 2480 8000029c: ef 00 10 1b jal 2480
800002a0: 93 0a 05 00 mv s5, a0 800002a0: 93 0a 05 00 mv s5, a0
800002a4: ef 00 10 1a jal 2464 800002a4: ef 00 10 1a jal 2464
800002a8: 93 05 f0 00 addi a1, zero, 15 800002a8: 93 05 f0 01 addi a1, zero, 31
800002ac: 63 cc a5 16 blt a1, a0, 376 800002ac: 63 cc a5 16 blt a1, a0, 376
800002b0: b3 05 74 03 mul a1, s0, s7 800002b0: b3 05 74 03 mul a1, s0, s7
800002b4: 33 86 85 03 mul a2, a1, s8 800002b4: 33 86 85 03 mul a2, a1, s8
@@ -205,39 +205,39 @@ Disassembly of section .text:
800002ec: 13 06 00 00 mv a2, zero 800002ec: 13 06 00 00 mv a2, zero
800002f0: b3 06 b6 00 add a3, a2, a1 800002f0: b3 06 b6 00 add a3, a2, a1
800002f4: 33 c6 56 03 div a2, a3, s5 800002f4: 33 c6 56 03 div a2, a3, s5
800002f8: 13 07 00 00 mv a4, zero 800002f8: 93 07 00 00 mv a5, zero
800002fc: 63 50 46 03 bge a2, s4, 32 800002fc: 63 50 46 03 bge a2, s4, 32
80000300: 6f 00 00 02 j 32 80000300: 6f 00 00 02 j 32
80000304: b3 86 d5 02 mul a3, a1, a3 80000304: b3 86 d5 02 mul a3, a1, a3
80000308: 33 06 d6 40 sub a2, a2, a3 80000308: 33 06 d6 40 sub a2, a2, a3
8000030c: b3 06 b6 00 add a3, a2, a1 8000030c: b3 06 b6 00 add a3, a2, a1
80000310: 33 c6 56 03 div a2, a3, s5 80000310: 33 c6 56 03 div a2, a3, s5
80000314: 13 07 00 00 mv a4, zero 80000314: 93 07 00 00 mv a5, zero
80000318: 63 44 46 01 blt a2, s4, 8 80000318: 63 44 46 01 blt a2, s4, 8
8000031c: 33 47 46 03 div a4, a2, s4 8000031c: b3 47 46 03 div a5, a2, s4
80000320: 93 07 00 00 mv a5, zero 80000320: 13 07 00 00 mv a4, zero
80000324: b3 0a 56 03 mul s5, a2, s5 80000324: b3 0a 56 03 mul s5, a2, s5
80000328: 13 04 10 00 addi s0, zero, 1 80000328: 13 08 10 00 addi a6, zero, 1
8000032c: 63 08 07 00 beqz a4, 16 8000032c: 13 04 10 00 addi s0, zero, 1
80000330: b3 07 47 03 mul a5, a4, s4 80000330: 63 88 07 00 beqz a5, 16
80000334: b3 07 f6 40 sub a5, a2, a5 80000334: 33 87 47 03 mul a4, a5, s4
80000338: 13 04 07 00 mv s0, a4 80000338: 33 07 e6 40 sub a4, a2, a4
8000033c: 33 8b 56 41 sub s6, a3, s5 8000033c: 13 84 07 00 mv s0, a5
80000340: 23 20 91 00 sw s1, 0(sp) 80000340: 33 8b 56 41 sub s6, a3, s5
80000344: 23 22 31 01 sw s3, 4(sp) 80000344: 23 20 91 00 sw s1, 0(sp)
80000348: 23 24 21 01 sw s2, 8(sp) 80000348: 23 22 31 01 sw s3, 4(sp)
8000034c: b3 85 a5 02 mul a1, a1, a0 8000034c: 23 24 21 01 sw s2, 8(sp)
80000350: 23 26 b1 00 sw a1, 12(sp) 80000350: b3 85 a5 02 mul a1, a1, a0
80000354: 23 28 81 00 sw s0, 16(sp) 80000354: 23 26 b1 00 sw a1, 12(sp)
80000358: 23 2a f1 00 sw a5, 20(sp) 80000358: 23 28 81 00 sw s0, 16(sp)
8000035c: b7 25 00 80 lui a1, 524290 8000035c: 23 2a e1 00 sw a4, 20(sp)
80000360: 93 85 45 48 addi a1, a1, 1156 80000360: b7 25 00 80 lui a1, 524290
80000364: 13 15 25 00 slli a0, a0, 2 80000364: 93 85 45 48 addi a1, a1, 1156
80000368: 33 05 b5 00 add a0, a0, a1 80000368: 13 15 25 00 slli a0, a0, 2
8000036c: 93 05 01 00 mv a1, sp 8000036c: 33 05 b5 00 add a0, a0, a1
80000370: 93 06 20 00 addi a3, zero, 2 80000370: 93 05 01 00 mv a1, sp
80000374: 23 20 b5 00 sw a1, 0(a0) 80000374: 23 20 b5 00 sw a1, 0(a0)
80000378: 63 40 d6 02 blt a2, a3, 32 80000378: 63 40 06 03 blt a2, a6, 32
8000037c: 63 44 46 01 blt a2, s4, 8 8000037c: 63 44 46 01 blt a2, s4, 8
80000380: 13 06 0a 00 mv a2, s4 80000380: 13 06 0a 00 mv a2, s4
80000384: 37 05 00 80 lui a0, 524288 80000384: 37 05 00 80 lui a0, 524288
@@ -852,11 +852,11 @@ Disassembly of section .text:
80000c60: 67 80 00 00 ret 80000c60: 67 80 00 00 ret
80000c64 vx_num_cycles: 80000c64 vx_num_cycles:
80000c64: 73 25 00 b0 csrr a0, mcycle 80000c64: 73 25 00 c0 rdcycle a0
80000c68: 67 80 00 00 ret 80000c68: 67 80 00 00 ret
80000c6c vx_num_instrs: 80000c6c vx_num_instrs:
80000c6c: 73 25 20 b0 csrr a0, minstret 80000c6c: 73 25 20 c0 rdinstret a0
80000c70: 67 80 00 00 ret 80000c70: 67 80 00 00 ret
80000c74 atexit: 80000c74 atexit:
@@ -1432,7 +1432,7 @@ Disassembly of section .symtab:
210: 33 01 00 00 add sp, zero, zero 210: 33 01 00 00 add sp, zero, zero
214: 84 24 <unknown> 214: 84 24 <unknown>
216: 00 80 <unknown> 216: 00 80 <unknown>
218: 40 00 <unknown> 218: 80 00 <unknown>
21a: 00 00 <unknown> 21a: 00 00 <unknown>
21c: 11 00 <unknown> 21c: 11 00 <unknown>
21e: 06 00 <unknown> 21e: 06 00 <unknown>
@@ -1602,7 +1602,7 @@ Disassembly of section .symtab:
36c: 12 00 <unknown> 36c: 12 00 <unknown>
36e: 02 00 <unknown> 36e: 02 00 <unknown>
370: 63 02 00 00 beqz zero, 4 370: 63 02 00 00 beqz zero, 4
374: c4 24 <unknown> 374: 04 25 <unknown>
376: 00 80 <unknown> 376: 00 80 <unknown>
378: 00 00 <unknown> 378: 00 00 <unknown>
37a: 00 00 <unknown> 37a: 00 00 <unknown>
@@ -1694,7 +1694,7 @@ Disassembly of section .symtab:
42e: 05 00 <unknown> 42e: 05 00 <unknown>
430: 9d 00 <unknown> 430: 9d 00 <unknown>
432: 00 00 <unknown> 432: 00 00 <unknown>
434: c4 24 <unknown> 434: 04 25 <unknown>
436: 00 80 <unknown> 436: 00 80 <unknown>
438: 00 00 <unknown> 438: 00 00 <unknown>
43a: 00 00 <unknown> 43a: 00 00 <unknown>
@@ -1781,12 +1781,14 @@ Disassembly of section .strtab:
3e: 5f 6b 65 72 <unknown> 3e: 5f 6b 65 72 <unknown>
42: 6e 65 <unknown> 42: 6e 65 <unknown>
44: 6c 2d <unknown> 44: 6c 2d <unknown>
46: 36 31 <unknown> 46: 65 63 <unknown>
48: 2d 64 <unknown> 48: 2d 61 <unknown>
4a: 61 2d <unknown> 4a: 31 2d <unknown>
4c: 63 34 2d 64 <unknown> 4c: 64 38 <unknown>
50: 34 2d <unknown> 4e: 2d 32 <unknown>
52: 37 63 2e 63 lui t1, 406246 50: 65 2d <unknown>
52: 36 32 <unknown>
54: 2e 63 <unknown>
56: 00 70 <unknown> 56: 00 70 <unknown>
58: 61 72 <unknown> 58: 61 72 <unknown>
5a: 61 6c <unknown> 5a: 61 6c <unknown>

Binary file not shown.

View File

@@ -1,5 +1,5 @@
/tmp/pocl_vortex_kernel-58-c3-55-9d-28.elf: file format ELF32-riscv /tmp/pocl_vortex_kernel-63-9f-11-80-f5.elf: file format ELF32-riscv
Disassembly of section .init: Disassembly of section .init:
@@ -15,7 +15,7 @@ Disassembly of section .init:
8000001c: 17 15 00 00 auipc a0, 1 8000001c: 17 15 00 00 auipc a0, 1
80000020: 13 05 45 42 addi a0, a0, 1060 80000020: 13 05 45 42 addi a0, a0, 1060
80000024: 17 16 00 00 auipc a2, 1 80000024: 17 16 00 00 auipc a2, 1
80000028: 13 06 c6 45 addi a2, a2, 1116 80000028: 13 06 c6 49 addi a2, a2, 1180
8000002c: 33 06 a6 40 sub a2, a2, a0 8000002c: 33 06 a6 40 sub a2, a2, a0
80000030: 93 05 00 00 mv a1, zero 80000030: 93 05 00 00 mv a1, zero
80000034: ef 00 90 28 jal 2696 80000034: ef 00 90 28 jal 2696
@@ -185,7 +185,7 @@ Disassembly of section .text:
8000029c: ef 00 80 6b jal 1720 8000029c: ef 00 80 6b jal 1720
800002a0: 93 0a 05 00 mv s5, a0 800002a0: 93 0a 05 00 mv s5, a0
800002a4: ef 00 80 6a jal 1704 800002a4: ef 00 80 6a jal 1704
800002a8: 93 05 f0 00 addi a1, zero, 15 800002a8: 93 05 f0 01 addi a1, zero, 31
800002ac: 63 cc a5 16 blt a1, a0, 376 800002ac: 63 cc a5 16 blt a1, a0, 376
800002b0: b3 05 74 03 mul a1, s0, s7 800002b0: b3 05 74 03 mul a1, s0, s7
800002b4: 33 86 85 03 mul a2, a1, s8 800002b4: 33 86 85 03 mul a2, a1, s8
@@ -205,39 +205,39 @@ Disassembly of section .text:
800002ec: 13 06 00 00 mv a2, zero 800002ec: 13 06 00 00 mv a2, zero
800002f0: b3 06 b6 00 add a3, a2, a1 800002f0: b3 06 b6 00 add a3, a2, a1
800002f4: 33 c6 56 03 div a2, a3, s5 800002f4: 33 c6 56 03 div a2, a3, s5
800002f8: 13 07 00 00 mv a4, zero 800002f8: 93 07 00 00 mv a5, zero
800002fc: 63 50 46 03 bge a2, s4, 32 800002fc: 63 50 46 03 bge a2, s4, 32
80000300: 6f 00 00 02 j 32 80000300: 6f 00 00 02 j 32
80000304: b3 86 d5 02 mul a3, a1, a3 80000304: b3 86 d5 02 mul a3, a1, a3
80000308: 33 06 d6 40 sub a2, a2, a3 80000308: 33 06 d6 40 sub a2, a2, a3
8000030c: b3 06 b6 00 add a3, a2, a1 8000030c: b3 06 b6 00 add a3, a2, a1
80000310: 33 c6 56 03 div a2, a3, s5 80000310: 33 c6 56 03 div a2, a3, s5
80000314: 13 07 00 00 mv a4, zero 80000314: 93 07 00 00 mv a5, zero
80000318: 63 44 46 01 blt a2, s4, 8 80000318: 63 44 46 01 blt a2, s4, 8
8000031c: 33 47 46 03 div a4, a2, s4 8000031c: b3 47 46 03 div a5, a2, s4
80000320: 93 07 00 00 mv a5, zero 80000320: 13 07 00 00 mv a4, zero
80000324: b3 0a 56 03 mul s5, a2, s5 80000324: b3 0a 56 03 mul s5, a2, s5
80000328: 13 04 10 00 addi s0, zero, 1 80000328: 13 08 10 00 addi a6, zero, 1
8000032c: 63 08 07 00 beqz a4, 16 8000032c: 13 04 10 00 addi s0, zero, 1
80000330: b3 07 47 03 mul a5, a4, s4 80000330: 63 88 07 00 beqz a5, 16
80000334: b3 07 f6 40 sub a5, a2, a5 80000334: 33 87 47 03 mul a4, a5, s4
80000338: 13 04 07 00 mv s0, a4 80000338: 33 07 e6 40 sub a4, a2, a4
8000033c: 33 8b 56 41 sub s6, a3, s5 8000033c: 13 84 07 00 mv s0, a5
80000340: 23 20 91 00 sw s1, 0(sp) 80000340: 33 8b 56 41 sub s6, a3, s5
80000344: 23 22 31 01 sw s3, 4(sp) 80000344: 23 20 91 00 sw s1, 0(sp)
80000348: 23 24 21 01 sw s2, 8(sp) 80000348: 23 22 31 01 sw s3, 4(sp)
8000034c: b3 85 a5 02 mul a1, a1, a0 8000034c: 23 24 21 01 sw s2, 8(sp)
80000350: 23 26 b1 00 sw a1, 12(sp) 80000350: b3 85 a5 02 mul a1, a1, a0
80000354: 23 28 81 00 sw s0, 16(sp) 80000354: 23 26 b1 00 sw a1, 12(sp)
80000358: 23 2a f1 00 sw a5, 20(sp) 80000358: 23 28 81 00 sw s0, 16(sp)
8000035c: b7 15 00 80 lui a1, 524289 8000035c: 23 2a e1 00 sw a4, 20(sp)
80000360: 93 85 05 44 addi a1, a1, 1088 80000360: b7 15 00 80 lui a1, 524289
80000364: 13 15 25 00 slli a0, a0, 2 80000364: 93 85 05 44 addi a1, a1, 1088
80000368: 33 05 b5 00 add a0, a0, a1 80000368: 13 15 25 00 slli a0, a0, 2
8000036c: 93 05 01 00 mv a1, sp 8000036c: 33 05 b5 00 add a0, a0, a1
80000370: 93 06 20 00 addi a3, zero, 2 80000370: 93 05 01 00 mv a1, sp
80000374: 23 20 b5 00 sw a1, 0(a0) 80000374: 23 20 b5 00 sw a1, 0(a0)
80000378: 63 40 d6 02 blt a2, a3, 32 80000378: 63 40 06 03 blt a2, a6, 32
8000037c: 63 44 46 01 blt a2, s4, 8 8000037c: 63 44 46 01 blt a2, s4, 8
80000380: 13 06 0a 00 mv a2, s4 80000380: 13 06 0a 00 mv a2, s4
80000384: 37 05 00 80 lui a0, 524288 80000384: 37 05 00 80 lui a0, 524288
@@ -662,11 +662,11 @@ Disassembly of section .text:
80000968: 67 80 00 00 ret 80000968: 67 80 00 00 ret
8000096c vx_num_cycles: 8000096c vx_num_cycles:
8000096c: 73 25 00 b0 csrr a0, mcycle 8000096c: 73 25 00 c0 rdcycle a0
80000970: 67 80 00 00 ret 80000970: 67 80 00 00 ret
80000974 vx_num_instrs: 80000974 vx_num_instrs:
80000974: 73 25 20 b0 csrr a0, minstret 80000974: 73 25 20 c0 rdinstret a0
80000978: 67 80 00 00 ret 80000978: 67 80 00 00 ret
8000097c atexit: 8000097c atexit:
@@ -1243,7 +1243,7 @@ Disassembly of section .symtab:
210: 33 01 00 00 add sp, zero, zero 210: 33 01 00 00 add sp, zero, zero
214: 40 14 <unknown> 214: 40 14 <unknown>
216: 00 80 <unknown> 216: 00 80 <unknown>
218: 40 00 <unknown> 218: 80 00 <unknown>
21a: 00 00 <unknown> 21a: 00 00 <unknown>
21c: 11 00 <unknown> 21c: 11 00 <unknown>
21e: 06 00 <unknown> 21e: 06 00 <unknown>
@@ -1410,7 +1410,7 @@ Disassembly of section .symtab:
36c: 12 00 <unknown> 36c: 12 00 <unknown>
36e: 02 00 <unknown> 36e: 02 00 <unknown>
370: 6b 02 00 00 <unknown> 370: 6b 02 00 00 <unknown>
374: 80 14 <unknown> 374: c0 14 <unknown>
376: 00 80 <unknown> 376: 00 80 <unknown>
378: 00 00 <unknown> 378: 00 00 <unknown>
37a: 00 00 <unknown> 37a: 00 00 <unknown>
@@ -1503,7 +1503,7 @@ Disassembly of section .symtab:
42e: 05 00 <unknown> 42e: 05 00 <unknown>
430: 9d 00 <unknown> 430: 9d 00 <unknown>
432: 00 00 <unknown> 432: 00 00 <unknown>
434: 80 14 <unknown> 434: c0 14 <unknown>
436: 00 80 <unknown> 436: 00 80 <unknown>
438: 00 00 <unknown> 438: 00 00 <unknown>
43a: 00 00 <unknown> 43a: 00 00 <unknown>
@@ -1589,12 +1589,13 @@ Disassembly of section .strtab:
3e: 5f 6b 65 72 <unknown> 3e: 5f 6b 65 72 <unknown>
42: 6e 65 <unknown> 42: 6e 65 <unknown>
44: 6c 2d <unknown> 44: 6c 2d <unknown>
46: 64 62 <unknown> 46: 35 35 <unknown>
48: 2d 33 <unknown> 48: 2d 39 <unknown>
4a: 65 2d <unknown> 4a: 32 2d <unknown>
4c: 33 61 2d 63 <unknown> 4c: 30 30 <unknown>
50: 62 2d <unknown> 4e: 2d 36 <unknown>
52: 33 30 2e 63 <unknown> 50: 39 2d <unknown>
52: 33 35 2e 63 <unknown>
56: 00 70 <unknown> 56: 00 70 <unknown>
58: 61 72 <unknown> 58: 61 72 <unknown>
5a: 61 6c <unknown> 5a: 61 6c <unknown>

Binary file not shown.

View File

@@ -1,5 +1,5 @@
/tmp/pocl_vortex_kernel-10-e6-f3-c4-7d.elf: file format ELF32-riscv /tmp/pocl_vortex_kernel-a9-aa-28-a4-7a.elf: file format ELF32-riscv
Disassembly of section .init: Disassembly of section .init:
@@ -15,7 +15,7 @@ Disassembly of section .init:
8000001c: 17 25 00 00 auipc a0, 2 8000001c: 17 25 00 00 auipc a0, 2
80000020: 13 05 85 ee addi a0, a0, -280 80000020: 13 05 85 ee addi a0, a0, -280
80000024: 17 26 00 00 auipc a2, 2 80000024: 17 26 00 00 auipc a2, 2
80000028: 13 06 06 f2 addi a2, a2, -224 80000028: 13 06 06 f6 addi a2, a2, -160
8000002c: 33 06 a6 40 sub a2, a2, a0 8000002c: 33 06 a6 40 sub a2, a2, a0
80000030: 93 05 00 00 mv a1, zero 80000030: 93 05 00 00 mv a1, zero
80000034: ef 00 50 00 jal 2052 80000034: ef 00 50 00 jal 2052
@@ -185,7 +185,7 @@ Disassembly of section .text:
8000029c: ef 00 40 43 jal 1076 8000029c: ef 00 40 43 jal 1076
800002a0: 93 0a 05 00 mv s5, a0 800002a0: 93 0a 05 00 mv s5, a0
800002a4: ef 00 40 42 jal 1060 800002a4: ef 00 40 42 jal 1060
800002a8: 93 05 f0 00 addi a1, zero, 15 800002a8: 93 05 f0 01 addi a1, zero, 31
800002ac: 63 cc a5 16 blt a1, a0, 376 800002ac: 63 cc a5 16 blt a1, a0, 376
800002b0: b3 05 74 03 mul a1, s0, s7 800002b0: b3 05 74 03 mul a1, s0, s7
800002b4: 33 86 85 03 mul a2, a1, s8 800002b4: 33 86 85 03 mul a2, a1, s8
@@ -205,39 +205,39 @@ Disassembly of section .text:
800002ec: 13 06 00 00 mv a2, zero 800002ec: 13 06 00 00 mv a2, zero
800002f0: b3 06 b6 00 add a3, a2, a1 800002f0: b3 06 b6 00 add a3, a2, a1
800002f4: 33 c6 56 03 div a2, a3, s5 800002f4: 33 c6 56 03 div a2, a3, s5
800002f8: 13 07 00 00 mv a4, zero 800002f8: 93 07 00 00 mv a5, zero
800002fc: 63 50 46 03 bge a2, s4, 32 800002fc: 63 50 46 03 bge a2, s4, 32
80000300: 6f 00 00 02 j 32 80000300: 6f 00 00 02 j 32
80000304: b3 86 d5 02 mul a3, a1, a3 80000304: b3 86 d5 02 mul a3, a1, a3
80000308: 33 06 d6 40 sub a2, a2, a3 80000308: 33 06 d6 40 sub a2, a2, a3
8000030c: b3 06 b6 00 add a3, a2, a1 8000030c: b3 06 b6 00 add a3, a2, a1
80000310: 33 c6 56 03 div a2, a3, s5 80000310: 33 c6 56 03 div a2, a3, s5
80000314: 13 07 00 00 mv a4, zero 80000314: 93 07 00 00 mv a5, zero
80000318: 63 44 46 01 blt a2, s4, 8 80000318: 63 44 46 01 blt a2, s4, 8
8000031c: 33 47 46 03 div a4, a2, s4 8000031c: b3 47 46 03 div a5, a2, s4
80000320: 93 07 00 00 mv a5, zero 80000320: 13 07 00 00 mv a4, zero
80000324: b3 0a 56 03 mul s5, a2, s5 80000324: b3 0a 56 03 mul s5, a2, s5
80000328: 13 04 10 00 addi s0, zero, 1 80000328: 13 08 10 00 addi a6, zero, 1
8000032c: 63 08 07 00 beqz a4, 16 8000032c: 13 04 10 00 addi s0, zero, 1
80000330: b3 07 47 03 mul a5, a4, s4 80000330: 63 88 07 00 beqz a5, 16
80000334: b3 07 f6 40 sub a5, a2, a5 80000334: 33 87 47 03 mul a4, a5, s4
80000338: 13 04 07 00 mv s0, a4 80000338: 33 07 e6 40 sub a4, a2, a4
8000033c: 33 8b 56 41 sub s6, a3, s5 8000033c: 13 84 07 00 mv s0, a5
80000340: 23 20 91 00 sw s1, 0(sp) 80000340: 33 8b 56 41 sub s6, a3, s5
80000344: 23 22 31 01 sw s3, 4(sp) 80000344: 23 20 91 00 sw s1, 0(sp)
80000348: 23 24 21 01 sw s2, 8(sp) 80000348: 23 22 31 01 sw s3, 4(sp)
8000034c: b3 85 a5 02 mul a1, a1, a0 8000034c: 23 24 21 01 sw s2, 8(sp)
80000350: 23 26 b1 00 sw a1, 12(sp) 80000350: b3 85 a5 02 mul a1, a1, a0
80000354: 23 28 81 00 sw s0, 16(sp) 80000354: 23 26 b1 00 sw a1, 12(sp)
80000358: 23 2a f1 00 sw a5, 20(sp) 80000358: 23 28 81 00 sw s0, 16(sp)
8000035c: b7 25 00 80 lui a1, 524290 8000035c: 23 2a e1 00 sw a4, 20(sp)
80000360: 93 85 45 f0 addi a1, a1, -252 80000360: b7 25 00 80 lui a1, 524290
80000364: 13 15 25 00 slli a0, a0, 2 80000364: 93 85 45 f0 addi a1, a1, -252
80000368: 33 05 b5 00 add a0, a0, a1 80000368: 13 15 25 00 slli a0, a0, 2
8000036c: 93 05 01 00 mv a1, sp 8000036c: 33 05 b5 00 add a0, a0, a1
80000370: 93 06 20 00 addi a3, zero, 2 80000370: 93 05 01 00 mv a1, sp
80000374: 23 20 b5 00 sw a1, 0(a0) 80000374: 23 20 b5 00 sw a1, 0(a0)
80000378: 63 40 d6 02 blt a2, a3, 32 80000378: 63 40 06 03 blt a2, a6, 32
8000037c: 63 44 46 01 blt a2, s4, 8 8000037c: 63 44 46 01 blt a2, s4, 8
80000380: 13 06 0a 00 mv a2, s4 80000380: 13 06 0a 00 mv a2, s4
80000384: 37 05 00 80 lui a0, 524288 80000384: 37 05 00 80 lui a0, 524288
@@ -501,11 +501,11 @@ Disassembly of section .text:
800006e4: 67 80 00 00 ret 800006e4: 67 80 00 00 ret
800006e8 vx_num_cycles: 800006e8 vx_num_cycles:
800006e8: 73 25 00 b0 csrr a0, mcycle 800006e8: 73 25 00 c0 rdcycle a0
800006ec: 67 80 00 00 ret 800006ec: 67 80 00 00 ret
800006f0 vx_num_instrs: 800006f0 vx_num_instrs:
800006f0: 73 25 20 b0 csrr a0, minstret 800006f0: 73 25 20 c0 rdinstret a0
800006f4: 67 80 00 00 ret 800006f4: 67 80 00 00 ret
800006f8 atexit: 800006f8 atexit:
@@ -1091,7 +1091,7 @@ Disassembly of section .symtab:
220: 47 01 00 00 fmsub.s ft2, ft0, ft0, ft0, rne 220: 47 01 00 00 fmsub.s ft2, ft0, ft0, ft0, rne
224: 04 1f <unknown> 224: 04 1f <unknown>
226: 00 80 <unknown> 226: 00 80 <unknown>
228: 40 00 <unknown> 228: 80 00 <unknown>
22a: 00 00 <unknown> 22a: 00 00 <unknown>
22c: 11 00 <unknown> 22c: 11 00 <unknown>
22e: 06 00 <unknown> 22e: 06 00 <unknown>
@@ -1253,7 +1253,7 @@ Disassembly of section .symtab:
36e: 02 00 <unknown> 36e: 02 00 <unknown>
370: 62 02 <unknown> 370: 62 02 <unknown>
372: 00 00 <unknown> 372: 00 00 <unknown>
374: 44 1f <unknown> 374: 84 1f <unknown>
376: 00 80 <unknown> 376: 00 80 <unknown>
378: 00 00 <unknown> 378: 00 00 <unknown>
37a: 00 00 <unknown> 37a: 00 00 <unknown>
@@ -1354,7 +1354,7 @@ Disassembly of section .symtab:
43e: 05 00 <unknown> 43e: 05 00 <unknown>
440: 9d 00 <unknown> 440: 9d 00 <unknown>
442: 00 00 <unknown> 442: 00 00 <unknown>
444: 44 1f <unknown> 444: 84 1f <unknown>
446: 00 80 <unknown> 446: 00 80 <unknown>
448: 00 00 <unknown> 448: 00 00 <unknown>
44a: 00 00 <unknown> 44a: 00 00 <unknown>
@@ -1433,12 +1433,11 @@ Disassembly of section .strtab:
3e: 5f 6b 65 72 <unknown> 3e: 5f 6b 65 72 <unknown>
42: 6e 65 <unknown> 42: 6e 65 <unknown>
44: 6c 2d <unknown> 44: 6c 2d <unknown>
46: 31 62 <unknown> 46: 63 38 2d 36 <unknown>
48: 2d 37 <unknown> 4a: 63 2d 65 36 <unknown>
4a: 31 2d <unknown> 4e: 2d 33 <unknown>
4c: 63 66 2d 66 bltu s10, sp, 1644 50: 35 2d <unknown>
50: 66 2d <unknown> 52: 61 63 <unknown>
52: 34 32 <unknown>
54: 2e 63 <unknown> 54: 2e 63 <unknown>
56: 00 70 <unknown> 56: 00 70 <unknown>
58: 61 72 <unknown> 58: 61 72 <unknown>

View File

@@ -82,7 +82,7 @@ VL_FLAGS += -DNOPAE
CFLAGS += -DNOPAE CFLAGS += -DNOPAE
# use DPI FPU # use DPI FPU
#VL_FLAGS += -DFPU_DPI VL_FLAGS += -DFPU_DPI
PROJECT = libopae-c-vlsim.so PROJECT = libopae-c-vlsim.so

Binary file not shown.

View File

@@ -147,11 +147,11 @@ Disassembly of section .text:
8000018c: 00008067 ret 8000018c: 00008067 ret
80000190 <vx_num_cycles>: 80000190 <vx_num_cycles>:
80000190: b0002573 csrr a0,mcycle 80000190: c0002573 rdcycle a0
80000194: 00008067 ret 80000194: 00008067 ret
80000198 <vx_num_instrs>: 80000198 <vx_num_instrs>:
80000198: b0202573 csrr a0,minstret 80000198: c0202573 rdinstret a0
8000019c: 00008067 ret 8000019c: 00008067 ret
800001a0 <atexit>: 800001a0 <atexit>:

Binary file not shown.

Binary file not shown.

View File

@@ -15,16 +15,16 @@ Disassembly of section .init:
8000001c: 00002517 auipc a0,0x2 8000001c: 00002517 auipc a0,0x2
80000020: c4050513 addi a0,a0,-960 # 80001c5c <g_wspawn_args> 80000020: c4050513 addi a0,a0,-960 # 80001c5c <g_wspawn_args>
80000024: 00002617 auipc a2,0x2 80000024: 00002617 auipc a2,0x2
80000028: c7860613 addi a2,a2,-904 # 80001c9c <__BSS_END__> 80000028: cb860613 addi a2,a2,-840 # 80001cdc <__BSS_END__>
8000002c: 40a60633 sub a2,a2,a0 8000002c: 40a60633 sub a2,a2,a0
80000030: 00000593 li a1,0 80000030: 00000593 li a1,0
80000034: 55c000ef jal ra,80000590 <memset> 80000034: 558000ef jal ra,8000058c <memset>
80000038: 00000517 auipc a0,0x0 80000038: 00000517 auipc a0,0x0
8000003c: 46050513 addi a0,a0,1120 # 80000498 <__libc_fini_array> 8000003c: 45c50513 addi a0,a0,1116 # 80000494 <__libc_fini_array>
80000040: 410000ef jal ra,80000450 <atexit> 80000040: 40c000ef jal ra,8000044c <atexit>
80000044: 4b0000ef jal ra,800004f4 <__libc_init_array> 80000044: 4ac000ef jal ra,800004f0 <__libc_init_array>
80000048: 008000ef jal ra,80000050 <main> 80000048: 008000ef jal ra,80000050 <main>
8000004c: 4180006f j 80000464 <exit> 8000004c: 4140006f j 80000460 <exit>
Disassembly of section .text: Disassembly of section .text:
@@ -40,8 +40,8 @@ Disassembly of section .text:
80000068: 00000793 li a5,0 80000068: 00000793 li a5,0
8000006c: 00078863 beqz a5,8000007c <register_fini+0x14> 8000006c: 00078863 beqz a5,8000007c <register_fini+0x14>
80000070: 80000537 lui a0,0x80000 80000070: 80000537 lui a0,0x80000
80000074: 49850513 addi a0,a0,1176 # 80000498 <__stack_top+0x81000498> 80000074: 49450513 addi a0,a0,1172 # 80000494 <__stack_top+0x81000494>
80000078: 3d80006f j 80000450 <atexit> 80000078: 3d40006f j 8000044c <atexit>
8000007c: 00008067 ret 8000007c: 00008067 ret
80000080 <kernel_body>: 80000080 <kernel_body>:
@@ -99,15 +99,15 @@ Disassembly of section .text:
8000012c: 01212823 sw s2,16(sp) 8000012c: 01212823 sw s2,16(sp)
80000130: 01312623 sw s3,12(sp) 80000130: 01312623 sw s3,12(sp)
80000134: 01412423 sw s4,8(sp) 80000134: 01412423 sw s4,8(sp)
80000138: 2f0000ef jal ra,80000428 <vx_num_threads> 80000138: 2ec000ef jal ra,80000424 <vx_num_threads>
8000013c: 29c000ef jal ra,800003d8 <vx_tmc> 8000013c: 298000ef jal ra,800003d4 <vx_tmc>
80000140: 2e0000ef jal ra,80000420 <vx_core_id> 80000140: 2dc000ef jal ra,8000041c <vx_core_id>
80000144: 00050493 mv s1,a0 80000144: 00050493 mv s1,a0
80000148: 2b0000ef jal ra,800003f8 <vx_warp_id> 80000148: 2ac000ef jal ra,800003f4 <vx_warp_id>
8000014c: 00050993 mv s3,a0 8000014c: 00050993 mv s3,a0
80000150: 2b8000ef jal ra,80000408 <vx_thread_id> 80000150: 2b4000ef jal ra,80000404 <vx_thread_id>
80000154: 00050a13 mv s4,a0 80000154: 00050a13 mv s4,a0
80000158: 2d0000ef jal ra,80000428 <vx_num_threads> 80000158: 2cc000ef jal ra,80000424 <vx_num_threads>
8000015c: 800027b7 lui a5,0x80002 8000015c: 800027b7 lui a5,0x80002
80000160: 00249493 slli s1,s1,0x2 80000160: 00249493 slli s1,s1,0x2
80000164: c5c78793 addi a5,a5,-932 # 80001c5c <__stack_top+0x81001c5c> 80000164: c5c78793 addi a5,a5,-932 # 80001c5c <__stack_top+0x81001c5c>
@@ -143,16 +143,16 @@ Disassembly of section .text:
800001dc: 0019b513 seqz a0,s3 800001dc: 0019b513 seqz a0,s3
800001e0: 00c12983 lw s3,12(sp) 800001e0: 00c12983 lw s3,12(sp)
800001e4: 02010113 addi sp,sp,32 800001e4: 02010113 addi sp,sp,32
800001e8: 1f00006f j 800003d8 <vx_tmc> 800001e8: 1ec0006f j 800003d4 <vx_tmc>
800001ec <spawn_remaining_tasks_callback>: 800001ec <spawn_remaining_tasks_callback>:
800001ec: ff010113 addi sp,sp,-16 800001ec: ff010113 addi sp,sp,-16
800001f0: 00112623 sw ra,12(sp) 800001f0: 00112623 sw ra,12(sp)
800001f4: 00812423 sw s0,8(sp) 800001f4: 00812423 sw s0,8(sp)
800001f8: 1e0000ef jal ra,800003d8 <vx_tmc> 800001f8: 1dc000ef jal ra,800003d4 <vx_tmc>
800001fc: 224000ef jal ra,80000420 <vx_core_id> 800001fc: 220000ef jal ra,8000041c <vx_core_id>
80000200: 00050413 mv s0,a0 80000200: 00050413 mv s0,a0
80000204: 214000ef jal ra,80000418 <vx_thread_gid> 80000204: 210000ef jal ra,80000414 <vx_thread_gid>
80000208: 800027b7 lui a5,0x80002 80000208: 800027b7 lui a5,0x80002
8000020c: 00241413 slli s0,s0,0x2 8000020c: 00241413 slli s0,s0,0x2
80000210: c5c78793 addi a5,a5,-932 # 80001c5c <__stack_top+0x81001c5c> 80000210: c5c78793 addi a5,a5,-932 # 80001c5c <__stack_top+0x81001c5c>
@@ -167,7 +167,7 @@ Disassembly of section .text:
80000234: 00c12083 lw ra,12(sp) 80000234: 00c12083 lw ra,12(sp)
80000238: 00100513 li a0,1 80000238: 00100513 li a0,1
8000023c: 01010113 addi sp,sp,16 8000023c: 01010113 addi sp,sp,16
80000240: 1980006f j 800003d8 <vx_tmc> 80000240: 1940006f j 800003d4 <vx_tmc>
80000244 <vx_spawn_tasks>: 80000244 <vx_spawn_tasks>:
80000244: fc010113 addi sp,sp,-64 80000244: fc010113 addi sp,sp,-64
@@ -182,22 +182,22 @@ Disassembly of section .text:
80000268: 03612023 sw s6,32(sp) 80000268: 03612023 sw s6,32(sp)
8000026c: 03512223 sw s5,36(sp) 8000026c: 03512223 sw s5,36(sp)
80000270: 00050913 mv s2,a0 80000270: 00050913 mv s2,a0
80000274: 1c4000ef jal ra,80000438 <vx_num_cores> 80000274: 1c0000ef jal ra,80000434 <vx_num_cores>
80000278: 00050413 mv s0,a0 80000278: 00050413 mv s0,a0
8000027c: 1b4000ef jal ra,80000430 <vx_num_warps> 8000027c: 1b0000ef jal ra,8000042c <vx_num_warps>
80000280: 00050493 mv s1,a0 80000280: 00050493 mv s1,a0
80000284: 1a4000ef jal ra,80000428 <vx_num_threads> 80000284: 1a0000ef jal ra,80000424 <vx_num_threads>
80000288: 00050b13 mv s6,a0 80000288: 00050b13 mv s6,a0
8000028c: 194000ef jal ra,80000420 <vx_core_id> 8000028c: 190000ef jal ra,8000041c <vx_core_id>
80000290: 00f00713 li a4,15 80000290: 01f00713 li a4,31
80000294: 08a74a63 blt a4,a0,80000328 <vx_spawn_tasks+0xe4> 80000294: 08a74863 blt a4,a0,80000324 <vx_spawn_tasks+0xe0>
80000298: 036486b3 mul a3,s1,s6 80000298: 036486b3 mul a3,s1,s6
8000029c: 00050793 mv a5,a0 8000029c: 00050793 mv a5,a0
800002a0: 00100713 li a4,1 800002a0: 00100713 li a4,1
800002a4: 0126d463 bge a3,s2,800002ac <vx_spawn_tasks+0x68> 800002a4: 0126d463 bge a3,s2,800002ac <vx_spawn_tasks+0x68>
800002a8: 02d94733 div a4,s2,a3 800002a8: 02d94733 div a4,s2,a3
800002ac: 0ae44263 blt s0,a4,80000350 <vx_spawn_tasks+0x10c> 800002ac: 0ae44063 blt s0,a4,8000034c <vx_spawn_tasks+0x108>
800002b0: 06e7dc63 bge a5,a4,80000328 <vx_spawn_tasks+0xe4> 800002b0: 06e7da63 bge a5,a4,80000324 <vx_spawn_tasks+0xe0>
800002b4: fff40413 addi s0,s0,-1 800002b4: fff40413 addi s0,s0,-1
800002b8: 02e94633 div a2,s2,a4 800002b8: 02e94633 div a2,s2,a4
800002bc: 00060693 mv a3,a2 800002bc: 00060693 mv a3,a2
@@ -206,7 +206,7 @@ Disassembly of section .text:
800002c8: 00c906b3 add a3,s2,a2 800002c8: 00c906b3 add a3,s2,a2
800002cc: 0366cab3 div s5,a3,s6 800002cc: 0366cab3 div s5,a3,s6
800002d0: 0366e933 rem s2,a3,s6 800002d0: 0366e933 rem s2,a3,s6
800002d4: 089ac463 blt s5,s1,8000035c <vx_spawn_tasks+0x118> 800002d4: 089ac263 blt s5,s1,80000358 <vx_spawn_tasks+0x114>
800002d8: 00100693 li a3,1 800002d8: 00100693 li a3,1
800002dc: 029ac733 div a4,s5,s1 800002dc: 029ac733 div a4,s5,s1
800002e0: 00070663 beqz a4,800002ec <vx_spawn_tasks+0xa8> 800002e0: 00070663 beqz a4,800002ec <vx_spawn_tasks+0xa8>
@@ -223,383 +223,382 @@ Disassembly of section .text:
8000030c: 00279793 slli a5,a5,0x2 8000030c: 00279793 slli a5,a5,0x2
80000310: 00f407b3 add a5,s0,a5 80000310: 00f407b3 add a5,s0,a5
80000314: 00e7a023 sw a4,0(a5) 80000314: 00e7a023 sw a4,0(a5)
80000318: 00100793 li a5,1 80000318: 00c12a23 sw a2,20(sp)
8000031c: 00c12a23 sw a2,20(sp) 8000031c: 05504463 bgtz s5,80000364 <vx_spawn_tasks+0x120>
80000320: 0557c463 blt a5,s5,80000368 <vx_spawn_tasks+0x124> 80000320: 06091263 bnez s2,80000384 <vx_spawn_tasks+0x140>
80000324: 06091263 bnez s2,80000388 <vx_spawn_tasks+0x144> 80000324: 03c12083 lw ra,60(sp)
80000328: 03c12083 lw ra,60(sp) 80000328: 03812403 lw s0,56(sp)
8000032c: 03812403 lw s0,56(sp) 8000032c: 03412483 lw s1,52(sp)
80000330: 03412483 lw s1,52(sp) 80000330: 03012903 lw s2,48(sp)
80000334: 03012903 lw s2,48(sp) 80000334: 02c12983 lw s3,44(sp)
80000338: 02c12983 lw s3,44(sp) 80000338: 02812a03 lw s4,40(sp)
8000033c: 02812a03 lw s4,40(sp) 8000033c: 02412a83 lw s5,36(sp)
80000340: 02412a83 lw s5,36(sp) 80000340: 02012b03 lw s6,32(sp)
80000344: 02012b03 lw s6,32(sp) 80000344: 04010113 addi sp,sp,64
80000348: 04010113 addi sp,sp,64 80000348: 00008067 ret
8000034c: 00008067 ret 8000034c: 00040713 mv a4,s0
80000350: 00040713 mv a4,s0 80000350: f6e7c2e3 blt a5,a4,800002b4 <vx_spawn_tasks+0x70>
80000354: f6e7c0e3 blt a5,a4,800002b4 <vx_spawn_tasks+0x70> 80000354: fd1ff06f j 80000324 <vx_spawn_tasks+0xe0>
80000358: fd1ff06f j 80000328 <vx_spawn_tasks+0xe4> 80000358: 00000713 li a4,0
8000035c: 00000713 li a4,0 8000035c: 00100693 li a3,1
80000360: 00100693 li a3,1 80000360: f8dff06f j 800002ec <vx_spawn_tasks+0xa8>
80000364: f89ff06f j 800002ec <vx_spawn_tasks+0xa8> 80000364: 00048513 mv a0,s1
80000368: 00048513 mv a0,s1 80000368: 009ad463 bge s5,s1,80000370 <vx_spawn_tasks+0x12c>
8000036c: 009ad463 bge s5,s1,80000374 <vx_spawn_tasks+0x130> 8000036c: 000a8513 mv a0,s5
80000370: 000a8513 mv a0,s5 80000370: 800005b7 lui a1,0x80000
80000374: 800005b7 lui a1,0x80000 80000374: 11c58593 addi a1,a1,284 # 8000011c <__stack_top+0x8100011c>
80000378: 11c58593 addi a1,a1,284 # 8000011c <__stack_top+0x8100011c> 80000378: 054000ef jal ra,800003cc <vx_wspawn>
8000037c: 054000ef jal ra,800003d0 <vx_wspawn> 8000037c: da1ff0ef jal ra,8000011c <spawn_tasks_callback>
80000380: d9dff0ef jal ra,8000011c <spawn_tasks_callback> 80000380: fa0902e3 beqz s2,80000324 <vx_spawn_tasks+0xe0>
80000384: fa0902e3 beqz s2,80000328 <vx_spawn_tasks+0xe4> 80000384: 035b07b3 mul a5,s6,s5
80000388: 035b07b3 mul a5,s6,s5 80000388: 00090513 mv a0,s2
8000038c: 00090513 mv a0,s2 8000038c: 00f12a23 sw a5,20(sp)
80000390: 00f12a23 sw a5,20(sp) 80000390: 044000ef jal ra,800003d4 <vx_tmc>
80000394: 044000ef jal ra,800003d8 <vx_tmc> 80000394: 088000ef jal ra,8000041c <vx_core_id>
80000398: 088000ef jal ra,80000420 <vx_core_id> 80000398: 00050493 mv s1,a0
8000039c: 00050493 mv s1,a0 8000039c: 00249493 slli s1,s1,0x2
800003a0: 00249493 slli s1,s1,0x2 800003a0: 074000ef jal ra,80000414 <vx_thread_gid>
800003a4: 074000ef jal ra,80000418 <vx_thread_gid> 800003a4: 00940433 add s0,s0,s1
800003a8: 00940433 add s0,s0,s1 800003a8: 00042783 lw a5,0(s0)
800003ac: 00042783 lw a5,0(s0) 800003ac: 0087a683 lw a3,8(a5)
800003b0: 0087a683 lw a3,8(a5) 800003b0: 0007a703 lw a4,0(a5)
800003b4: 0007a703 lw a4,0(a5) 800003b4: 0047a583 lw a1,4(a5)
800003b8: 0047a583 lw a1,4(a5) 800003b8: 00d50533 add a0,a0,a3
800003bc: 00d50533 add a0,a0,a3 800003bc: 000700e7 jalr a4
800003c0: 000700e7 jalr a4 800003c0: 00100513 li a0,1
800003c4: 00100513 li a0,1 800003c4: 010000ef jal ra,800003d4 <vx_tmc>
800003c8: 010000ef jal ra,800003d8 <vx_tmc> 800003c8: f5dff06f j 80000324 <vx_spawn_tasks+0xe0>
800003cc: f5dff06f j 80000328 <vx_spawn_tasks+0xe4>
800003d0 <vx_wspawn>: 800003cc <vx_wspawn>:
800003d0: 00b5106b 0xb5106b 800003cc: 00b5106b 0xb5106b
800003d4: 00008067 ret 800003d0: 00008067 ret
800003d8 <vx_tmc>: 800003d4 <vx_tmc>:
800003d8: 0005006b 0x5006b 800003d4: 0005006b 0x5006b
800003dc: 00008067 ret 800003d8: 00008067 ret
800003e0 <vx_barrier>: 800003dc <vx_barrier>:
800003e0: 00b5406b 0xb5406b 800003dc: 00b5406b 0xb5406b
800003e4: 00008067 ret 800003e0: 00008067 ret
800003e8 <vx_split>: 800003e4 <vx_split>:
800003e8: 0005206b 0x5206b 800003e4: 0005206b 0x5206b
800003ec: 00008067 ret 800003e8: 00008067 ret
800003f0 <vx_join>: 800003ec <vx_join>:
800003f0: 0000306b 0x306b 800003ec: 0000306b 0x306b
800003f4: 00008067 ret 800003f0: 00008067 ret
800003f8 <vx_warp_id>: 800003f4 <vx_warp_id>:
800003f8: cc302573 csrr a0,0xcc3 800003f4: cc302573 csrr a0,0xcc3
800003fc: 00008067 ret 800003f8: 00008067 ret
80000400 <vx_warp_gid>: 800003fc <vx_warp_gid>:
80000400: f1402573 csrr a0,mhartid 800003fc: f1402573 csrr a0,mhartid
80000404: 00008067 ret 80000400: 00008067 ret
80000408 <vx_thread_id>: 80000404 <vx_thread_id>:
80000408: cc002573 csrr a0,0xcc0 80000404: cc002573 csrr a0,0xcc0
8000040c: 00008067 ret 80000408: 00008067 ret
80000410 <vx_thread_lid>: 8000040c <vx_thread_lid>:
80000410: cc102573 csrr a0,0xcc1 8000040c: cc102573 csrr a0,0xcc1
80000414: 00008067 ret 80000410: 00008067 ret
80000418 <vx_thread_gid>: 80000414 <vx_thread_gid>:
80000418: cc202573 csrr a0,0xcc2 80000414: cc202573 csrr a0,0xcc2
8000041c: 00008067 ret 80000418: 00008067 ret
80000420 <vx_core_id>: 8000041c <vx_core_id>:
80000420: cc502573 csrr a0,0xcc5 8000041c: cc502573 csrr a0,0xcc5
80000424: 00008067 ret 80000420: 00008067 ret
80000428 <vx_num_threads>: 80000424 <vx_num_threads>:
80000428: fc002573 csrr a0,0xfc0 80000424: fc002573 csrr a0,0xfc0
8000042c: 00008067 ret 80000428: 00008067 ret
80000430 <vx_num_warps>: 8000042c <vx_num_warps>:
80000430: fc102573 csrr a0,0xfc1 8000042c: fc102573 csrr a0,0xfc1
80000434: 00008067 ret 80000430: 00008067 ret
80000438 <vx_num_cores>: 80000434 <vx_num_cores>:
80000438: fc202573 csrr a0,0xfc2 80000434: fc202573 csrr a0,0xfc2
8000043c: 00008067 ret 80000438: 00008067 ret
80000440 <vx_num_cycles>: 8000043c <vx_num_cycles>:
80000440: b0002573 csrr a0,mcycle 8000043c: c0002573 rdcycle a0
80000444: 00008067 ret 80000440: 00008067 ret
80000448 <vx_num_instrs>: 80000444 <vx_num_instrs>:
80000448: b0202573 csrr a0,minstret 80000444: c0202573 rdinstret a0
8000044c: 00008067 ret 80000448: 00008067 ret
80000450 <atexit>: 8000044c <atexit>:
80000450: 00050593 mv a1,a0 8000044c: 00050593 mv a1,a0
80000454: 00000693 li a3,0 80000450: 00000693 li a3,0
80000458: 00000613 li a2,0 80000454: 00000613 li a2,0
8000045c: 00000513 li a0,0 80000458: 00000513 li a0,0
80000460: 20c0006f j 8000066c <__register_exitproc> 8000045c: 20c0006f j 80000668 <__register_exitproc>
80000464 <exit>: 80000460 <exit>:
80000464: ff010113 addi sp,sp,-16 80000460: ff010113 addi sp,sp,-16
80000468: 00000593 li a1,0 80000464: 00000593 li a1,0
8000046c: 00812423 sw s0,8(sp) 80000468: 00812423 sw s0,8(sp)
80000470: 00112623 sw ra,12(sp) 8000046c: 00112623 sw ra,12(sp)
80000474: 00050413 mv s0,a0 80000470: 00050413 mv s0,a0
80000478: 290000ef jal ra,80000708 <__call_exitprocs> 80000474: 290000ef jal ra,80000704 <__call_exitprocs>
8000047c: 800027b7 lui a5,0x80002 80000478: 800027b7 lui a5,0x80002
80000480: c587a503 lw a0,-936(a5) # 80001c58 <__stack_top+0x81001c58> 8000047c: c587a503 lw a0,-936(a5) # 80001c58 <__stack_top+0x81001c58>
80000484: 03c52783 lw a5,60(a0) 80000480: 03c52783 lw a5,60(a0)
80000488: 00078463 beqz a5,80000490 <exit+0x2c> 80000484: 00078463 beqz a5,8000048c <exit+0x2c>
8000048c: 000780e7 jalr a5 80000488: 000780e7 jalr a5
80000490: 00040513 mv a0,s0 8000048c: 00040513 mv a0,s0
80000494: c45ff0ef jal ra,800000d8 <_exit> 80000490: c49ff0ef jal ra,800000d8 <_exit>
80000498 <__libc_fini_array>: 80000494 <__libc_fini_array>:
80000498: ff010113 addi sp,sp,-16 80000494: ff010113 addi sp,sp,-16
8000049c: 00812423 sw s0,8(sp) 80000498: 00812423 sw s0,8(sp)
800004a0: 800027b7 lui a5,0x80002 8000049c: 800027b7 lui a5,0x80002
800004a4: 80002437 lui s0,0x80002 800004a0: 80002437 lui s0,0x80002
800004a8: 83040413 addi s0,s0,-2000 # 80001830 <__stack_top+0x81001830> 800004a4: 82c40413 addi s0,s0,-2004 # 8000182c <__stack_top+0x8100182c>
800004ac: 83078793 addi a5,a5,-2000 # 80001830 <__stack_top+0x81001830> 800004a8: 82c78793 addi a5,a5,-2004 # 8000182c <__stack_top+0x8100182c>
800004b0: 408787b3 sub a5,a5,s0 800004ac: 408787b3 sub a5,a5,s0
800004b4: 00912223 sw s1,4(sp) 800004b0: 00912223 sw s1,4(sp)
800004b8: 00112623 sw ra,12(sp) 800004b4: 00112623 sw ra,12(sp)
800004bc: 4027d493 srai s1,a5,0x2 800004b8: 4027d493 srai s1,a5,0x2
800004c0: 02048063 beqz s1,800004e0 <__libc_fini_array+0x48> 800004bc: 02048063 beqz s1,800004dc <__libc_fini_array+0x48>
800004c4: ffc78793 addi a5,a5,-4 800004c0: ffc78793 addi a5,a5,-4
800004c8: 00878433 add s0,a5,s0 800004c4: 00878433 add s0,a5,s0
800004cc: 00042783 lw a5,0(s0) 800004c8: 00042783 lw a5,0(s0)
800004d0: fff48493 addi s1,s1,-1 800004cc: fff48493 addi s1,s1,-1
800004d4: ffc40413 addi s0,s0,-4 800004d0: ffc40413 addi s0,s0,-4
800004d8: 000780e7 jalr a5 800004d4: 000780e7 jalr a5
800004dc: fe0498e3 bnez s1,800004cc <__libc_fini_array+0x34> 800004d8: fe0498e3 bnez s1,800004c8 <__libc_fini_array+0x34>
800004e0: 00c12083 lw ra,12(sp) 800004dc: 00c12083 lw ra,12(sp)
800004e4: 00812403 lw s0,8(sp) 800004e0: 00812403 lw s0,8(sp)
800004e8: 00412483 lw s1,4(sp) 800004e4: 00412483 lw s1,4(sp)
800004ec: 01010113 addi sp,sp,16 800004e8: 01010113 addi sp,sp,16
800004f0: 00008067 ret 800004ec: 00008067 ret
800004f4 <__libc_init_array>: 800004f0 <__libc_init_array>:
800004f4: ff010113 addi sp,sp,-16 800004f0: ff010113 addi sp,sp,-16
800004f8: 00812423 sw s0,8(sp) 800004f4: 00812423 sw s0,8(sp)
800004fc: 01212023 sw s2,0(sp) 800004f8: 01212023 sw s2,0(sp)
80000500: 80002437 lui s0,0x80002 800004fc: 80002437 lui s0,0x80002
80000504: 80002937 lui s2,0x80002 80000500: 80002937 lui s2,0x80002
80000508: 82c40793 addi a5,s0,-2004 # 8000182c <__stack_top+0x8100182c> 80000504: 82840793 addi a5,s0,-2008 # 80001828 <__stack_top+0x81001828>
8000050c: 82c90913 addi s2,s2,-2004 # 8000182c <__stack_top+0x8100182c> 80000508: 82890913 addi s2,s2,-2008 # 80001828 <__stack_top+0x81001828>
80000510: 40f90933 sub s2,s2,a5 8000050c: 40f90933 sub s2,s2,a5
80000514: 00112623 sw ra,12(sp) 80000510: 00112623 sw ra,12(sp)
80000518: 00912223 sw s1,4(sp) 80000514: 00912223 sw s1,4(sp)
8000051c: 40295913 srai s2,s2,0x2 80000518: 40295913 srai s2,s2,0x2
80000520: 02090063 beqz s2,80000540 <__libc_init_array+0x4c> 8000051c: 02090063 beqz s2,8000053c <__libc_init_array+0x4c>
80000524: 82c40413 addi s0,s0,-2004 80000520: 82840413 addi s0,s0,-2008
80000528: 00000493 li s1,0 80000524: 00000493 li s1,0
8000052c: 00042783 lw a5,0(s0) 80000528: 00042783 lw a5,0(s0)
80000530: 00148493 addi s1,s1,1 8000052c: 00148493 addi s1,s1,1
80000534: 00440413 addi s0,s0,4 80000530: 00440413 addi s0,s0,4
80000538: 000780e7 jalr a5 80000534: 000780e7 jalr a5
8000053c: fe9918e3 bne s2,s1,8000052c <__libc_init_array+0x38> 80000538: fe9918e3 bne s2,s1,80000528 <__libc_init_array+0x38>
80000540: 80002437 lui s0,0x80002 8000053c: 80002437 lui s0,0x80002
80000544: 80002937 lui s2,0x80002 80000540: 80002937 lui s2,0x80002
80000548: 82c40793 addi a5,s0,-2004 # 8000182c <__stack_top+0x8100182c> 80000544: 82840793 addi a5,s0,-2008 # 80001828 <__stack_top+0x81001828>
8000054c: 83090913 addi s2,s2,-2000 # 80001830 <__stack_top+0x81001830> 80000548: 82c90913 addi s2,s2,-2004 # 8000182c <__stack_top+0x8100182c>
80000550: 40f90933 sub s2,s2,a5 8000054c: 40f90933 sub s2,s2,a5
80000554: 40295913 srai s2,s2,0x2 80000550: 40295913 srai s2,s2,0x2
80000558: 02090063 beqz s2,80000578 <__libc_init_array+0x84> 80000554: 02090063 beqz s2,80000574 <__libc_init_array+0x84>
8000055c: 82c40413 addi s0,s0,-2004 80000558: 82840413 addi s0,s0,-2008
80000560: 00000493 li s1,0 8000055c: 00000493 li s1,0
80000564: 00042783 lw a5,0(s0) 80000560: 00042783 lw a5,0(s0)
80000568: 00148493 addi s1,s1,1 80000564: 00148493 addi s1,s1,1
8000056c: 00440413 addi s0,s0,4 80000568: 00440413 addi s0,s0,4
80000570: 000780e7 jalr a5 8000056c: 000780e7 jalr a5
80000574: fe9918e3 bne s2,s1,80000564 <__libc_init_array+0x70> 80000570: fe9918e3 bne s2,s1,80000560 <__libc_init_array+0x70>
80000578: 00c12083 lw ra,12(sp) 80000574: 00c12083 lw ra,12(sp)
8000057c: 00812403 lw s0,8(sp) 80000578: 00812403 lw s0,8(sp)
80000580: 00412483 lw s1,4(sp) 8000057c: 00412483 lw s1,4(sp)
80000584: 00012903 lw s2,0(sp) 80000580: 00012903 lw s2,0(sp)
80000588: 01010113 addi sp,sp,16 80000584: 01010113 addi sp,sp,16
8000058c: 00008067 ret 80000588: 00008067 ret
80000590 <memset>: 8000058c <memset>:
80000590: 00f00313 li t1,15 8000058c: 00f00313 li t1,15
80000594: 00050713 mv a4,a0 80000590: 00050713 mv a4,a0
80000598: 02c37e63 bgeu t1,a2,800005d4 <memset+0x44> 80000594: 02c37e63 bgeu t1,a2,800005d0 <memset+0x44>
8000059c: 00f77793 andi a5,a4,15 80000598: 00f77793 andi a5,a4,15
800005a0: 0a079063 bnez a5,80000640 <memset+0xb0> 8000059c: 0a079063 bnez a5,8000063c <memset+0xb0>
800005a4: 08059263 bnez a1,80000628 <memset+0x98> 800005a0: 08059263 bnez a1,80000624 <memset+0x98>
800005a8: ff067693 andi a3,a2,-16 800005a4: ff067693 andi a3,a2,-16
800005ac: 00f67613 andi a2,a2,15 800005a8: 00f67613 andi a2,a2,15
800005b0: 00e686b3 add a3,a3,a4 800005ac: 00e686b3 add a3,a3,a4
800005b4: 00b72023 sw a1,0(a4) 800005b0: 00b72023 sw a1,0(a4)
800005b8: 00b72223 sw a1,4(a4) 800005b4: 00b72223 sw a1,4(a4)
800005bc: 00b72423 sw a1,8(a4) 800005b8: 00b72423 sw a1,8(a4)
800005c0: 00b72623 sw a1,12(a4) 800005bc: 00b72623 sw a1,12(a4)
800005c4: 01070713 addi a4,a4,16 800005c0: 01070713 addi a4,a4,16
800005c8: fed766e3 bltu a4,a3,800005b4 <memset+0x24> 800005c4: fed766e3 bltu a4,a3,800005b0 <memset+0x24>
800005cc: 00061463 bnez a2,800005d4 <memset+0x44> 800005c8: 00061463 bnez a2,800005d0 <memset+0x44>
800005d0: 00008067 ret 800005cc: 00008067 ret
800005d4: 40c306b3 sub a3,t1,a2 800005d0: 40c306b3 sub a3,t1,a2
800005d8: 00269693 slli a3,a3,0x2 800005d4: 00269693 slli a3,a3,0x2
800005dc: 00000297 auipc t0,0x0 800005d8: 00000297 auipc t0,0x0
800005e0: 005686b3 add a3,a3,t0 800005dc: 005686b3 add a3,a3,t0
800005e4: 00c68067 jr 12(a3) 800005e0: 00c68067 jr 12(a3)
800005e8: 00b70723 sb a1,14(a4) 800005e4: 00b70723 sb a1,14(a4)
800005ec: 00b706a3 sb a1,13(a4) 800005e8: 00b706a3 sb a1,13(a4)
800005f0: 00b70623 sb a1,12(a4) 800005ec: 00b70623 sb a1,12(a4)
800005f4: 00b705a3 sb a1,11(a4) 800005f0: 00b705a3 sb a1,11(a4)
800005f8: 00b70523 sb a1,10(a4) 800005f4: 00b70523 sb a1,10(a4)
800005fc: 00b704a3 sb a1,9(a4) 800005f8: 00b704a3 sb a1,9(a4)
80000600: 00b70423 sb a1,8(a4) 800005fc: 00b70423 sb a1,8(a4)
80000604: 00b703a3 sb a1,7(a4) 80000600: 00b703a3 sb a1,7(a4)
80000608: 00b70323 sb a1,6(a4) 80000604: 00b70323 sb a1,6(a4)
8000060c: 00b702a3 sb a1,5(a4) 80000608: 00b702a3 sb a1,5(a4)
80000610: 00b70223 sb a1,4(a4) 8000060c: 00b70223 sb a1,4(a4)
80000614: 00b701a3 sb a1,3(a4) 80000610: 00b701a3 sb a1,3(a4)
80000618: 00b70123 sb a1,2(a4) 80000614: 00b70123 sb a1,2(a4)
8000061c: 00b700a3 sb a1,1(a4) 80000618: 00b700a3 sb a1,1(a4)
80000620: 00b70023 sb a1,0(a4) 8000061c: 00b70023 sb a1,0(a4)
80000624: 00008067 ret 80000620: 00008067 ret
80000628: 0ff5f593 andi a1,a1,255 80000624: 0ff5f593 andi a1,a1,255
8000062c: 00859693 slli a3,a1,0x8 80000628: 00859693 slli a3,a1,0x8
80000630: 00d5e5b3 or a1,a1,a3 8000062c: 00d5e5b3 or a1,a1,a3
80000634: 01059693 slli a3,a1,0x10 80000630: 01059693 slli a3,a1,0x10
80000638: 00d5e5b3 or a1,a1,a3 80000634: 00d5e5b3 or a1,a1,a3
8000063c: f6dff06f j 800005a8 <memset+0x18> 80000638: f6dff06f j 800005a4 <memset+0x18>
80000640: 00279693 slli a3,a5,0x2 8000063c: 00279693 slli a3,a5,0x2
80000644: 00000297 auipc t0,0x0 80000640: 00000297 auipc t0,0x0
80000648: 005686b3 add a3,a3,t0 80000644: 005686b3 add a3,a3,t0
8000064c: 00008293 mv t0,ra 80000648: 00008293 mv t0,ra
80000650: fa0680e7 jalr -96(a3) 8000064c: fa0680e7 jalr -96(a3)
80000654: 00028093 mv ra,t0 80000650: 00028093 mv ra,t0
80000658: ff078793 addi a5,a5,-16 80000654: ff078793 addi a5,a5,-16
8000065c: 40f70733 sub a4,a4,a5 80000658: 40f70733 sub a4,a4,a5
80000660: 00f60633 add a2,a2,a5 8000065c: 00f60633 add a2,a2,a5
80000664: f6c378e3 bgeu t1,a2,800005d4 <memset+0x44> 80000660: f6c378e3 bgeu t1,a2,800005d0 <memset+0x44>
80000668: f3dff06f j 800005a4 <memset+0x14> 80000664: f3dff06f j 800005a0 <memset+0x14>
8000066c <__register_exitproc>: 80000668 <__register_exitproc>:
8000066c: 800027b7 lui a5,0x80002 80000668: 800027b7 lui a5,0x80002
80000670: c587a703 lw a4,-936(a5) # 80001c58 <__stack_top+0x81001c58> 8000066c: c587a703 lw a4,-936(a5) # 80001c58 <__stack_top+0x81001c58>
80000674: 14872783 lw a5,328(a4) 80000670: 14872783 lw a5,328(a4)
80000678: 04078c63 beqz a5,800006d0 <__register_exitproc+0x64> 80000674: 04078c63 beqz a5,800006cc <__register_exitproc+0x64>
8000067c: 0047a703 lw a4,4(a5) 80000678: 0047a703 lw a4,4(a5)
80000680: 01f00813 li a6,31 8000067c: 01f00813 li a6,31
80000684: 06e84e63 blt a6,a4,80000700 <__register_exitproc+0x94> 80000680: 06e84e63 blt a6,a4,800006fc <__register_exitproc+0x94>
80000688: 00271813 slli a6,a4,0x2 80000684: 00271813 slli a6,a4,0x2
8000068c: 02050663 beqz a0,800006b8 <__register_exitproc+0x4c> 80000688: 02050663 beqz a0,800006b4 <__register_exitproc+0x4c>
80000690: 01078333 add t1,a5,a6 8000068c: 01078333 add t1,a5,a6
80000694: 08c32423 sw a2,136(t1) 80000690: 08c32423 sw a2,136(t1)
80000698: 1887a883 lw a7,392(a5) 80000694: 1887a883 lw a7,392(a5)
8000069c: 00100613 li a2,1 80000698: 00100613 li a2,1
800006a0: 00e61633 sll a2,a2,a4 8000069c: 00e61633 sll a2,a2,a4
800006a4: 00c8e8b3 or a7,a7,a2 800006a0: 00c8e8b3 or a7,a7,a2
800006a8: 1917a423 sw a7,392(a5) 800006a4: 1917a423 sw a7,392(a5)
800006ac: 10d32423 sw a3,264(t1) 800006a8: 10d32423 sw a3,264(t1)
800006b0: 00200693 li a3,2 800006ac: 00200693 li a3,2
800006b4: 02d50463 beq a0,a3,800006dc <__register_exitproc+0x70> 800006b0: 02d50463 beq a0,a3,800006d8 <__register_exitproc+0x70>
800006b8: 00170713 addi a4,a4,1 800006b4: 00170713 addi a4,a4,1
800006bc: 00e7a223 sw a4,4(a5) 800006b8: 00e7a223 sw a4,4(a5)
800006c0: 010787b3 add a5,a5,a6 800006bc: 010787b3 add a5,a5,a6
800006c4: 00b7a423 sw a1,8(a5) 800006c0: 00b7a423 sw a1,8(a5)
800006c8: 00000513 li a0,0 800006c4: 00000513 li a0,0
800006cc: 00008067 ret 800006c8: 00008067 ret
800006d0: 14c70793 addi a5,a4,332 800006cc: 14c70793 addi a5,a4,332
800006d4: 14f72423 sw a5,328(a4) 800006d0: 14f72423 sw a5,328(a4)
800006d8: fa5ff06f j 8000067c <__register_exitproc+0x10> 800006d4: fa5ff06f j 80000678 <__register_exitproc+0x10>
800006dc: 18c7a683 lw a3,396(a5) 800006d8: 18c7a683 lw a3,396(a5)
800006e0: 00170713 addi a4,a4,1 800006dc: 00170713 addi a4,a4,1
800006e4: 00e7a223 sw a4,4(a5) 800006e0: 00e7a223 sw a4,4(a5)
800006e8: 00c6e633 or a2,a3,a2 800006e4: 00c6e633 or a2,a3,a2
800006ec: 18c7a623 sw a2,396(a5) 800006e8: 18c7a623 sw a2,396(a5)
800006f0: 010787b3 add a5,a5,a6 800006ec: 010787b3 add a5,a5,a6
800006f4: 00b7a423 sw a1,8(a5) 800006f0: 00b7a423 sw a1,8(a5)
800006f8: 00000513 li a0,0 800006f4: 00000513 li a0,0
800006fc: 00008067 ret 800006f8: 00008067 ret
80000700: fff00513 li a0,-1 800006fc: fff00513 li a0,-1
80000704: 00008067 ret 80000700: 00008067 ret
80000708 <__call_exitprocs>: 80000704 <__call_exitprocs>:
80000708: fd010113 addi sp,sp,-48 80000704: fd010113 addi sp,sp,-48
8000070c: 800027b7 lui a5,0x80002 80000708: 800027b7 lui a5,0x80002
80000710: 01412c23 sw s4,24(sp) 8000070c: 01412c23 sw s4,24(sp)
80000714: c587aa03 lw s4,-936(a5) # 80001c58 <__stack_top+0x81001c58> 80000710: c587aa03 lw s4,-936(a5) # 80001c58 <__stack_top+0x81001c58>
80000718: 03212023 sw s2,32(sp) 80000714: 03212023 sw s2,32(sp)
8000071c: 02112623 sw ra,44(sp) 80000718: 02112623 sw ra,44(sp)
80000720: 148a2903 lw s2,328(s4) 8000071c: 148a2903 lw s2,328(s4)
80000724: 02812423 sw s0,40(sp) 80000720: 02812423 sw s0,40(sp)
80000728: 02912223 sw s1,36(sp) 80000724: 02912223 sw s1,36(sp)
8000072c: 01312e23 sw s3,28(sp) 80000728: 01312e23 sw s3,28(sp)
80000730: 01512a23 sw s5,20(sp) 8000072c: 01512a23 sw s5,20(sp)
80000734: 01612823 sw s6,16(sp) 80000730: 01612823 sw s6,16(sp)
80000738: 01712623 sw s7,12(sp) 80000734: 01712623 sw s7,12(sp)
8000073c: 01812423 sw s8,8(sp) 80000738: 01812423 sw s8,8(sp)
80000740: 04090063 beqz s2,80000780 <__call_exitprocs+0x78> 8000073c: 04090063 beqz s2,8000077c <__call_exitprocs+0x78>
80000744: 00050b13 mv s6,a0 80000740: 00050b13 mv s6,a0
80000748: 00058b93 mv s7,a1 80000744: 00058b93 mv s7,a1
8000074c: 00100a93 li s5,1 80000748: 00100a93 li s5,1
80000750: fff00993 li s3,-1 8000074c: fff00993 li s3,-1
80000754: 00492483 lw s1,4(s2) 80000750: 00492483 lw s1,4(s2)
80000758: fff48413 addi s0,s1,-1 80000754: fff48413 addi s0,s1,-1
8000075c: 02044263 bltz s0,80000780 <__call_exitprocs+0x78> 80000758: 02044263 bltz s0,8000077c <__call_exitprocs+0x78>
80000760: 00249493 slli s1,s1,0x2 8000075c: 00249493 slli s1,s1,0x2
80000764: 009904b3 add s1,s2,s1 80000760: 009904b3 add s1,s2,s1
80000768: 040b8463 beqz s7,800007b0 <__call_exitprocs+0xa8> 80000764: 040b8463 beqz s7,800007ac <__call_exitprocs+0xa8>
8000076c: 1044a783 lw a5,260(s1) 80000768: 1044a783 lw a5,260(s1)
80000770: 05778063 beq a5,s7,800007b0 <__call_exitprocs+0xa8> 8000076c: 05778063 beq a5,s7,800007ac <__call_exitprocs+0xa8>
80000774: fff40413 addi s0,s0,-1 80000770: fff40413 addi s0,s0,-1
80000778: ffc48493 addi s1,s1,-4 80000774: ffc48493 addi s1,s1,-4
8000077c: ff3416e3 bne s0,s3,80000768 <__call_exitprocs+0x60> 80000778: ff3416e3 bne s0,s3,80000764 <__call_exitprocs+0x60>
80000780: 02c12083 lw ra,44(sp) 8000077c: 02c12083 lw ra,44(sp)
80000784: 02812403 lw s0,40(sp) 80000780: 02812403 lw s0,40(sp)
80000788: 02412483 lw s1,36(sp) 80000784: 02412483 lw s1,36(sp)
8000078c: 02012903 lw s2,32(sp) 80000788: 02012903 lw s2,32(sp)
80000790: 01c12983 lw s3,28(sp) 8000078c: 01c12983 lw s3,28(sp)
80000794: 01812a03 lw s4,24(sp) 80000790: 01812a03 lw s4,24(sp)
80000798: 01412a83 lw s5,20(sp) 80000794: 01412a83 lw s5,20(sp)
8000079c: 01012b03 lw s6,16(sp) 80000798: 01012b03 lw s6,16(sp)
800007a0: 00c12b83 lw s7,12(sp) 8000079c: 00c12b83 lw s7,12(sp)
800007a4: 00812c03 lw s8,8(sp) 800007a0: 00812c03 lw s8,8(sp)
800007a8: 03010113 addi sp,sp,48 800007a4: 03010113 addi sp,sp,48
800007ac: 00008067 ret 800007a8: 00008067 ret
800007b0: 00492783 lw a5,4(s2) 800007ac: 00492783 lw a5,4(s2)
800007b4: 0044a683 lw a3,4(s1) 800007b0: 0044a683 lw a3,4(s1)
800007b8: fff78793 addi a5,a5,-1 800007b4: fff78793 addi a5,a5,-1
800007bc: 04878e63 beq a5,s0,80000818 <__call_exitprocs+0x110> 800007b8: 04878e63 beq a5,s0,80000814 <__call_exitprocs+0x110>
800007c0: 0004a223 sw zero,4(s1) 800007bc: 0004a223 sw zero,4(s1)
800007c4: fa0688e3 beqz a3,80000774 <__call_exitprocs+0x6c> 800007c0: fa0688e3 beqz a3,80000770 <__call_exitprocs+0x6c>
800007c8: 18892783 lw a5,392(s2) 800007c4: 18892783 lw a5,392(s2)
800007cc: 008a9733 sll a4,s5,s0 800007c8: 008a9733 sll a4,s5,s0
800007d0: 00492c03 lw s8,4(s2) 800007cc: 00492c03 lw s8,4(s2)
800007d4: 00f777b3 and a5,a4,a5 800007d0: 00f777b3 and a5,a4,a5
800007d8: 02079263 bnez a5,800007fc <__call_exitprocs+0xf4> 800007d4: 02079263 bnez a5,800007f8 <__call_exitprocs+0xf4>
800007dc: 000680e7 jalr a3 800007d8: 000680e7 jalr a3
800007e0: 00492703 lw a4,4(s2) 800007dc: 00492703 lw a4,4(s2)
800007e4: 148a2783 lw a5,328(s4) 800007e0: 148a2783 lw a5,328(s4)
800007e8: 01871463 bne a4,s8,800007f0 <__call_exitprocs+0xe8> 800007e4: 01871463 bne a4,s8,800007ec <__call_exitprocs+0xe8>
800007ec: f8f904e3 beq s2,a5,80000774 <__call_exitprocs+0x6c> 800007e8: f8f904e3 beq s2,a5,80000770 <__call_exitprocs+0x6c>
800007f0: f80788e3 beqz a5,80000780 <__call_exitprocs+0x78> 800007ec: f80788e3 beqz a5,8000077c <__call_exitprocs+0x78>
800007f4: 00078913 mv s2,a5 800007f0: 00078913 mv s2,a5
800007f8: f5dff06f j 80000754 <__call_exitprocs+0x4c> 800007f4: f5dff06f j 80000750 <__call_exitprocs+0x4c>
800007fc: 18c92783 lw a5,396(s2) 800007f8: 18c92783 lw a5,396(s2)
80000800: 0844a583 lw a1,132(s1) 800007fc: 0844a583 lw a1,132(s1)
80000804: 00f77733 and a4,a4,a5 80000800: 00f77733 and a4,a4,a5
80000808: 00071c63 bnez a4,80000820 <__call_exitprocs+0x118> 80000804: 00071c63 bnez a4,8000081c <__call_exitprocs+0x118>
8000080c: 000b0513 mv a0,s6 80000808: 000b0513 mv a0,s6
80000810: 000680e7 jalr a3 8000080c: 000680e7 jalr a3
80000814: fcdff06f j 800007e0 <__call_exitprocs+0xd8> 80000810: fcdff06f j 800007dc <__call_exitprocs+0xd8>
80000818: 00892223 sw s0,4(s2) 80000814: 00892223 sw s0,4(s2)
8000081c: fa9ff06f j 800007c4 <__call_exitprocs+0xbc> 80000818: fa9ff06f j 800007c0 <__call_exitprocs+0xbc>
80000820: 00058513 mv a0,a1 8000081c: 00058513 mv a0,a1
80000824: 000680e7 jalr a3 80000820: 000680e7 jalr a3
80000828: fb9ff06f j 800007e0 <__call_exitprocs+0xd8> 80000824: fb9ff06f j 800007dc <__call_exitprocs+0xd8>
Disassembly of section .init_array: Disassembly of section .init_array:
8000182c <__init_array_start>: 80001828 <__init_array_start>:
8000182c: 0068 addi a0,sp,12 80001828: 0068 addi a0,sp,12
8000182e: 8000 0x8000 8000182a: 8000 0x8000
Disassembly of section .data: Disassembly of section .data:
@@ -618,7 +617,7 @@ Disassembly of section .data:
800018dc: 0000 unimp 800018dc: 0000 unimp
800018de: 0000 unimp 800018de: 0000 unimp
800018e0: 330e fld ft6,224(sp) 800018e0: 330e fld ft6,224(sp)
800018e2: abcd j 80001ed4 <__BSS_END__+0x238> 800018e2: abcd j 80001ed4 <__BSS_END__+0x1f8>
800018e4: 1234 addi a3,sp,296 800018e4: 1234 addi a3,sp,296
800018e6: e66d bnez a2,800019d0 <impure_data+0x1a0> 800018e6: e66d bnez a2,800019d0 <impure_data+0x1a0>
800018e8: deec sw a1,124(a3) 800018e8: deec sw a1,124(a3)

Binary file not shown.

Binary file not shown.

File diff suppressed because it is too large Load Diff

Binary file not shown.

File diff suppressed because it is too large Load Diff

Binary file not shown.

File diff suppressed because it is too large Load Diff

View File

@@ -137,11 +137,11 @@ Disassembly of section .text:
80000164: 00008067 ret 80000164: 00008067 ret
80000168 <vx_num_cycles>: 80000168 <vx_num_cycles>:
80000168: b0002573 csrr a0,mcycle 80000168: c0002573 rdcycle a0
8000016c: 00008067 ret 8000016c: 00008067 ret
80000170 <vx_num_instrs>: 80000170 <vx_num_instrs>:
80000170: b0202573 csrr a0,minstret 80000170: c0202573 rdinstret a0
80000174: 00008067 ret 80000174: 00008067 ret
80000178 <vx_vprintf>: 80000178 <vx_vprintf>:

Binary file not shown.

View File

@@ -21,8 +21,8 @@
:10013000732500CC67800000732510CC6780000019 :10013000732500CC67800000732510CC6780000019
:10014000732520CC67800000732550CC67800000A9 :10014000732520CC67800000732550CC67800000A9
:10015000732500FC67800000732510FC6780000099 :10015000732500FC67800000732510FC6780000099
:10016000732520FC67800000732500B067800000C5 :10016000732520FC67800000732500C067800000B5
:10017000732520B06780000063060520130101F598 :10017000732520C06780000063060520130101F588
:100180002324810A232E31092326110A2322910ACE :100180002324810A232E31092326110A2322910ACE
:100190002320210B232C4109232A510923286109FB :100190002320210B232C4109232A510923286109FB
:1001A00023267109930905000345050013841900EE :1001A00023267109930905000345050013841900EE

File diff suppressed because it is too large Load Diff

Binary file not shown.

File diff suppressed because it is too large Load Diff