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Tex CSRs write support added

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This commit is contained in:
Krishna Yalamarthy
2021-03-13 22:01:25 -05:00
parent f3f62e9e7b
commit a953fe4e1e
14 changed files with 166 additions and 7 deletions
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29
hw/VX_config.h
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@@ -1,5 +1,5 @@
// auto-generated by gen_config.py. DO NOT EDIT
// Generated at 2021-03-12 17:51:37.263369
// Generated at 2021-03-13 13:57:30.622905
#ifndef VX_USER_CONFIG
#define VX_USER_CONFIG
@@ -7,7 +7,7 @@
#endif
// auto-generated by gen_config.py. DO NOT EDIT
// Generated at 2021-03-12 17:51:37.265050
// Generated at 2021-03-13 13:57:30.624676
// Translated from VX_config.vh:
@@ -246,6 +246,31 @@
#define CSR_NW 0xFC1
#define CSR_NC 0xFC2
////////// Texture Unit CSRs /////////////
#define CSR_TEX_BEGIN 0xFD0
// Unit 1
#define CSR_TEX0_ADDR CSR_TEX_BEGIN
#define CSR_TEX0_FORMAT CSR_TEX_BEGIN + 0x1
#define CSR_TEX0_WIDTH CSR_TEX_BEGIN + 0x2
#define CSR_TEX0_HEIGHT CSR_TEX_BEGIN + 0x3
#define CSR_TEX0_STRIDE CSR_TEX_BEGIN + 0x4
#define CSR_TEX0_WRAP_U CSR_TEX_BEGIN + 0x5
#define CSR_TEX0_WRAP_V CSR_TEX_BEGIN + 0x6
#define CSR_TEX0_MIN_FILTER CSR_TEX_BEGIN + 0x7
#define CSR_TEX0_MAX_FILTER CSR_TEX_BEGIN + 0x8
// Unit 2
#define CSR_TEX1_ADDR CSR_TEX_BEGIN + 0x9
#define CSR_TEX1_FORMAT CSR_TEX_BEGIN + 0xA
#define CSR_TEX1_WIDTH CSR_TEX_BEGIN + 0xB
#define CSR_TEX1_HEIGHT CSR_TEX_BEGIN + 0xC
#define CSR_TEX1_STRIDE CSR_TEX_BEGIN + 0xD
#define CSR_TEX1_WRAP_U CSR_TEX_BEGIN + 0xE
#define CSR_TEX1_WRAP_V CSR_TEX_BEGIN + 0xF
#define CSR_TEX1_MIN_FILTER CSR_TEX_BEGIN + 0x10
#define CSR_TEX1_MAX_FILTER CSR_TEX_BEGIN + 0x11
#define CSR_TEX_END CSR_TEX1_MAX_FILTER
// Pipeline Queues ////////////////////////////////////////////////////////////
// Size of LSU Request Queue