New Cache Design Passing All Tests

This commit is contained in:
felsabbagh3
2020-03-04 23:24:32 -08:00
parent aa1a0ee376
commit a86a403ca9
12 changed files with 194 additions and 103 deletions

View File

@@ -69,6 +69,7 @@ module VX_cache_req_queue (
wire push_qual = reqq_push && !reqq_full;
wire pop_qual = reqq_pop && use_empty && !out_empty && !reqq_empty;
VX_generic_queue #(.DATAW( (`NUMBER_REQUESTS * (1+32+32)) + 5 + 2 + (`NW_M1+1) + 3 + 3 ), .SIZE(`REQQ_SIZE)) reqq_queue(
.clk (clk),
.reset (reset),
@@ -81,15 +82,16 @@ module VX_cache_req_queue (
);
wire[`NUMBER_REQUESTS-1:0] real_out_per_valids = out_per_valids & {`NUMBER_REQUESTS{~reqq_empty}};
assign qual_valids = use_empty ? out_per_valids : out_empty ? 0 : use_per_valids;
assign qual_addr = use_empty ? out_per_addr : use_per_addr;
assign qual_writedata = use_empty ? out_per_writedata : use_per_writedata;
assign qual_rd = use_empty ? out_per_rd : use_per_rd;
assign qual_wb = use_empty ? out_per_wb : use_per_wb;
assign qual_warp_num = use_empty ? out_per_warp_num : use_per_warp_num;
assign qual_mem_read = use_empty ? out_per_mem_read : use_per_mem_read;
assign qual_mem_write = use_empty ? out_per_mem_write : use_per_mem_write;
assign qual_valids = use_empty ? real_out_per_valids : out_empty ? 0 : use_per_valids;
assign qual_addr = use_empty ? out_per_addr : use_per_addr;
assign qual_writedata = use_empty ? out_per_writedata : use_per_writedata;
assign qual_rd = use_empty ? out_per_rd : use_per_rd;
assign qual_wb = use_empty ? out_per_wb : use_per_wb;
assign qual_warp_num = use_empty ? out_per_warp_num : use_per_warp_num;
assign qual_mem_read = use_empty ? out_per_mem_read : use_per_mem_read;
assign qual_mem_write = use_empty ? out_per_mem_write : use_per_mem_write;
wire[`vx_clog2(`NUMBER_REQUESTS)-1:0] qual_request_index;
wire qual_has_request;