refactoring RTL simulator and Makefile
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@@ -1,4 +1,4 @@
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#include "multi_test_bench.h"
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#include "Vortex_SOC.h"
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#define NUM_TESTS 46
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@@ -65,13 +65,16 @@ int main(int argc, char **argv)
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};
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for (std::string s : tests) {
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Vortex v;
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std::cerr << DEFAULT << "\n---------------------------------------\n";
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std::cerr << DEFAULT << "\n---------------------------------------\n";
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std::cerr << s << std::endl;
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bool curr = v.simulate(s);
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RAM ram;
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loadHexImpl(s.c_str(), &ram);
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Vortex_SOC v(&ram);
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bool curr = v.simulate();
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if ( curr) std::cerr << GREEN << "Test Passed: " << s << std::endl;
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if (!curr) std::cerr << RED << "Test Failed: " << s << std::endl;
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std::cerr << DEFAULT;
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@@ -90,7 +93,7 @@ int main(int argc, char **argv)
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char testing[] = "../../runtime/mains/simple/vx_simple_main.hex";
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// char testing[] = "../../emulator/riscv_tests/rv32ui-p-lw.hex";
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// char testing[] = "../../emulator/riscv_tests/rv32ui-p-sw.hex";
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Vortex v;
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// const char *testing;
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// if (argc >= 2) {
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@@ -99,14 +102,18 @@ int main(int argc, char **argv)
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// testing = "../../kernel/vortex_test.hex";
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// }
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std::cerr << testing << std::endl;
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std::cerr << testing << std::endl;
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RAM ram;
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loadHexImpl(testing, &ram);
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Vortex_SOC v(&ram);
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bool curr = v.simulate();
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bool curr = v.simulate(testing);
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if ( curr) std::cerr << GREEN << "Test Passed: " << testing << std::endl;
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if (!curr) std::cerr << RED << "Test Failed: " << testing << std::endl;
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return !curr;
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#endif
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}
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}
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