reset networks optimization

hw/rtl/libs/VX_bypass_buffer.v

@@ -32,10 +32,13 @@ module VX_bypass_buffer #(
                 end
                 if (valid_in && ~ready_out) begin
                     assert(!buffer_valid);
-                    buffer <= data_in;
                     buffer_valid <= 1;
                 end
             end
+
+            if (valid_in && ~ready_out) begin
+                buffer <= data_in;
+            end
         end
 
         assign ready_in  = ready_out || !buffer_valid;