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code refactoring for Vivado, sv2v, and yosys compatibility

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This commit is contained in:
Blaise Tine
2021-09-27 08:55:10 -04:00
parent 9b04f3d9d6
commit 9f34b2944c
97 changed files with 1435 additions and 666 deletions
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11
hw/syn/yosys/Makefile
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@@ -3,15 +3,18 @@ TOP_LEVEL_ENTITY = Vortex
SRC_FILE = Vortex.v
RTL_DIR = ../../rtl
DEFINES = -DNDEBUG -DSYNTHESIS -DEXT_F_DISABLE -DNUM_CORES=1 -DNUM_THREADS=2 -DNUM_WARPS=2
DEFINES = -DNDEBUG -DSYNTHESIS -DEXT_F_DISABLE -DNUM_CORES=1 -DNUM_THREADS=2 -DNUM_WARPS=2 -DMEM_BLOCK_SIZE=64
RTL_INCLUDE = -I$(RTL_DIR) -I$(RTL_DIR)/libs -I$(RTL_DIR)/interfaces -I$(RTL_DIR)/cache
# Build targets
all: build
build:
./synth.sh -t$(TOP_LEVEL_ENTITY) -s$(SRC_FILE) $(DEFINES) $(RTL_INCLUDE)
output.v:
./sv2v.sh $(DEFINES) $(RTL_INCLUDE) -ooutput.v
build: output.v
./synth.sh -t$(TOP_LEVEL_ENTITY) -soutput.v
clean:
rm -rf sources.v *.ys *.log
rm -rf output.v *.ys *.log