code refactoring for Vivado, sv2v, and yosys compatibility

2021-09-27 08:55:10 -04:00
parent 9b04f3d9d6
commit 9f34b2944c
97 changed files with 1435 additions and 666 deletions
--- a/hw/rtl/libs/VX_sp_ram.v
+++ b/hw/rtl/libs/VX_sp_ram.v
@@ -27,7 +27,9 @@ module VX_sp_ram #(
        if (INIT_FILE != "") begin                \
            initial $readmemh(INIT_FILE, ram);    \
        end else begin                            \
-            initial ram = '{default: INIT_VALUE}; \
+            initial                               \
+                for (integer i = 0; i < SIZE; ++i)\
+                    ram[i] = INIT_VALUE;          \
        end                                       \
    end