diff --git a/driver/rtlsim/Makefile b/driver/rtlsim/Makefile
index ecd98d89..3b2295fc 100644
--- a/driver/rtlsim/Makefile
+++ b/driver/rtlsim/Makefile
@@ -1,7 +1,7 @@
 #CFLAGS += -std=c++11 -O2 -DNDEBUG -Wall -Wextra -Wfatal-errors
 CFLAGS += -std=c++11 -g -O0 -Wall -Wextra -Wfatal-errors
 
-CFLAGS += -I../../include -I../../../hw/simulate -I../../../runtime
+CFLAGS += -I../../include -I../../../hw/simulate -I../../../hw
 
 # control RTL debug print states
 DBG_PRINT_FLAGS = -DDBG_PRINT_CORE_ICACHE \
@@ -19,7 +19,7 @@ DBG_PRINT_FLAGS = -DDBG_PRINT_CORE_ICACHE \
 MULTICORE += -DNUM_CLUSTERS=1 -DNUM_CORES=2
 
 #DEBUG = 1
-AFU=1
+#AFU=1
 
 CFLAGS += -fPIC
 
diff --git a/driver/rtlsim/vortex.cpp b/driver/rtlsim/vortex.cpp
index f751d4c2..95314f62 100644
--- a/driver/rtlsim/vortex.cpp
+++ b/driver/rtlsim/vortex.cpp
@@ -7,6 +7,7 @@
 #include <chrono>
 
 #include <vortex.h>
+#include <ram.h>
 #include <simulator.h>
 
 ///////////////////////////////////////////////////////////////////////////////
@@ -59,6 +60,7 @@ class vx_device {
 public:
     vx_device() {        
         mem_allocation_ = vx_dev_caps(VX_CAPS_ALLOC_BASE_ADDR);
+        simulator_.attach_ram(&ram_);
     } 
 
     ~vx_device() {     
@@ -144,6 +146,7 @@ public:
 private:
 
     size_t mem_allocation_;     
+    RAM ram_;
     Simulator simulator_;
     std::future<void> future_;
 };
diff --git a/driver/tests/demo/kernel.elf b/driver/tests/demo/kernel.elf
index 1cc2eecc..f996721b 100755
Binary files a/driver/tests/demo/kernel.elf and b/driver/tests/demo/kernel.elf differ
diff --git a/hw/opae/vortex_afu.sv b/hw/opae/vortex_afu.sv
index e86dd071..81ca5b9f 100644
--- a/hw/opae/vortex_afu.sv
+++ b/hw/opae/vortex_afu.sv
@@ -436,7 +436,7 @@ begin
     end
 
     if (cci_dram_wr_req_fire) begin                
-      cci_dram_wr_req_addr <= cci_dram_wr_req_addr + ((t_cci_rdq_tag'(cci_dram_wr_req_ctr) == (DRAM_ADDR_WIDTH)'(CCI_RD_WINDOW_SIZE-1)) ? (DRAM_ADDR_WIDTH)'(CCI_RD_WINDOW_SIZE)  : 0);
+      cci_dram_wr_req_addr <= cci_dram_wr_req_addr + ((t_cci_rdq_tag'(cci_dram_wr_req_ctr) == t_cci_rdq_tag'(CCI_RD_WINDOW_SIZE-1)) ? (DRAM_ADDR_WIDTH)'(CCI_RD_WINDOW_SIZE)  : 0);
       cci_dram_wr_req_ctr  <= cci_dram_wr_req_ctr + 1;
     `ifdef DBG_PRINT_OPAE
       $display("%t: AVS Wr Req: addr=%0h, data=%0h, rem=%0d", $time, `DRAM_TO_BYTE_ADDR(avs_address), avs_writedata, (cci_dram_wr_req_ctr + 1));
diff --git a/hw/rtl/libs/VX_generic_queue.v b/hw/rtl/libs/VX_generic_queue.v
index 5176685c..c92e7297 100644
--- a/hw/rtl/libs/VX_generic_queue.v
+++ b/hw/rtl/libs/VX_generic_queue.v
@@ -121,7 +121,7 @@ module VX_generic_queue #(
 
                         if (!reading) begin                                
                             empty_r <= 0;
-                            if (size_r == SIZE-1) begin
+                            if (size_r == ($bits(size_r)'(SIZE-1))) begin
                                 full_r <= 1;
                             end
                             size_r <= size_r + 1;