minor update

hw/rtl/tex_unit/VX_tex_addr.v

@@ -131,6 +131,7 @@ module VX_tex_addr #(
     end
 
     wire [`NUM_THREADS-1:0][`FIXED_FRAC-1:0] u0, v0;
+    
     for (genvar i = 0; i < `NUM_THREADS; ++i) begin
         assign u0[i] = clamped_u[i][0];
         assign v0[i] = clamped_v[i][0];

hw/rtl/tex_unit/VX_tex_define.vh

@@ -28,8 +28,8 @@
 `define TEX_LOD_BITS        4
 `define TEX_MIP_BITS        (`NTEX_BITS + `TEX_LOD_BITS)
 
-`define TEX_WRAP_REPEAT     0
-`define TEX_WRAP_CLAMP      1
+`define TEX_WRAP_CLAMP      0
+`define TEX_WRAP_REPEAT     1
 `define TEX_WRAP_MIRROR     2
 
 `define MAX_COLOR_WIDTH     8