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feat: add scalar fexp support

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This commit is contained in:
Zhongdi LUO
2026-07-02 07:24:59 +00:00
parent 97a1eff701
commit 9251ba0a24
12 changed files with 327 additions and 14 deletions
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44
hw/rtl/fpu/VX_fpu_dpi.sv
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@@ -31,6 +31,7 @@ module VX_fpu_dpi import VX_fpu_pkg::*; #(
input wire [TAGW-1:0] tag_in,
input wire [`INST_FPU_BITS-1:0] op_type,
input wire [`INST_MOD_BITS-1:0] op_mod,
input wire [`INST_FMT_BITS-1:0] fmt,
input wire [`INST_FRM_BITS-1:0] frm,
@@ -51,7 +52,8 @@ module VX_fpu_dpi import VX_fpu_pkg::*; #(
localparam FPU_DIVSQRT = 1;
localparam FPU_CVT = 2;
localparam FPU_NCP = 3;
localparam NUM_FPC = 4;
localparam FPU_EXP = 4;
localparam NUM_FPC = 5;
localparam FPC_BITS = `LOG2UP(NUM_FPC);
localparam RSP_DATAW = (NUM_LANES * `XLEN) + 1 + $bits(fflags_t) + TAGW;
@@ -133,6 +135,7 @@ module VX_fpu_dpi import VX_fpu_pkg::*; #(
`INST_FPU_I2F: begin core_select = FPU_CVT; is_itof = 1; end
`INST_FPU_U2F: begin core_select = FPU_CVT; is_utof = 1; end
`INST_FPU_F2F: begin core_select = FPU_CVT; is_f2f = 1; end
`INST_FPU_MISC: begin core_select = `INST_FPU_IS_EXP(op_type, op_mod) ? FPU_EXP : FPU_NCP; end
default: begin core_select = FPU_NCP; end
endcase
end
@@ -437,6 +440,45 @@ module VX_fpu_dpi import VX_fpu_pkg::*; #(
end
endgenerate
generate
begin : fexp
reg [NUM_LANES-1:0][`XLEN-1:0] result_fexp_r;
reg [NUM_LANES-1:0][63:0] result_fexp;
fflags_t [NUM_LANES-1:0] fflags_fexp;
wire fexp_valid = (valid_in && core_select == FPU_EXP);
wire fexp_ready = per_core_ready_out[FPU_EXP] || ~per_core_valid_out[FPU_EXP];
wire fexp_fire = fexp_valid && fexp_ready;
always @(*) begin
for (integer i = 0; i < NUM_LANES; ++i) begin
dpi_fexp(fexp_fire, int'(dst_fmt), operands[0][i], result_fexp[i], fflags_fexp[i]);
result_fexp_r[i] = result_fexp[i][`XLEN-1:0];
end
end
fflags_t fflags_merged;
`FPU_MERGE_FFLAGS(fflags_merged, fflags_fexp, lane_mask, NUM_LANES);
VX_shift_register #(
.DATAW (1 + TAGW + NUM_LANES * `XLEN + $bits(fflags_t)),
.DEPTH (`LATENCY_FEXP),
.RESETW (1)
) shift_reg (
.clk (clk),
.reset (reset),
.enable (fexp_ready),
.data_in ({fexp_valid, tag_in, result_fexp_r, fflags_merged}),
.data_out ({per_core_valid_out[FPU_EXP], per_core_tag_out[FPU_EXP], per_core_result[FPU_EXP], per_core_fflags[FPU_EXP]})
);
assign per_core_has_fflags[FPU_EXP] = 1;
assign per_core_ready_in[FPU_EXP] = fexp_ready;
end
endgenerate
///////////////////////////////////////////////////////////////////////////
assign per_core_ready_in[FPU_DIVSQRT] = is_div ? div_ready_in : sqrt_ready_in;