simx refactoring, fixed simple.hex, compatibility with rtlsim and vlsim complete, added to regression suite

2021-03-08 23:58:33 -08:00
parent 71e9745e68
commit 907e6868cd
19 changed files with 88376 additions and 95959 deletions
--- a/runtime/tests/dev/vx_dev_main.dump
+++ b/runtime/tests/dev/vx_dev_main.dump
@@ -20689,7 +20689,7 @@ Disassembly of section .rodata:
 80013654:	6c69                	lui	s8,0x1a
 80013656:	2065                	jal	800136fe <zeroes.4448+0xe2>
 80013658:	2522                	fld	fa0,8(sp)
-8001365a:	202c2273          	csrrs	tp,hedeleg,s8
+8001365a:	202c2273          	csrrs	tp,0x202,s8
 8001365e:	696c                	flw	fa1,84(a0)
 80013660:	656e                	flw	fa0,216(sp)
 80013662:	2520                	fld	fs0,72(a0)
--- a/runtime/tests/hello/hello.dump
+++ b/runtime/tests/hello/hello.dump
@@ -22939,7 +22939,7 @@ Disassembly of section .rodata:
 80015918:	6c69                	lui	s8,0x1a
 8001591a:	2065                	jal	800159c2 <zeroes.4462+0xe2>
 8001591c:	2522                	fld	fa0,8(sp)
-8001591e:	202c2273          	csrrs	tp,hedeleg,s8
+8001591e:	202c2273          	csrrs	tp,0x202,s8
 80015922:	696c                	flw	fa1,84(a0)
 80015924:	656e                	flw	fa0,216(sp)
 80015926:	2520                	fld	fs0,72(a0)
--- a/runtime/tests/simple/vx_simple.dump
+++ b/runtime/tests/simple/vx_simple.dump
--- a/runtime/tests/simple/vx_simple.elf
+++ b/runtime/tests/simple/vx_simple.elf
--- a/runtime/tests/simple/vx_simple.hex
+++ b/runtime/tests/simple/vx_simple.hex