diff --git a/.gitignore b/.gitignore index e69de29b..13751d2a 100644 --- a/.gitignore +++ b/.gitignore @@ -0,0 +1 @@ +./rtl/obj_dir/debug.txt diff --git a/kernel/vortex_test.dump b/kernel/vortex_test.dump index 868ca584..937cd462 100644 --- a/kernel/vortex_test.dump +++ b/kernel/vortex_test.dump @@ -7,7 +7,7 @@ Disassembly of section .text: 80000000 <_start>: 80000000: 00100513 li a0,1 80000004: 02051073 csrw 0x20,a0 -80000008: 00200513 li a0,2 +80000008: 00800513 li a0,8 8000000c: 02151073 csrw 0x21,a0 80000010: f1401073 csrw mhartid,zero 80000014: 30101073 csrw misa,zero diff --git a/kernel/vortex_test.elf b/kernel/vortex_test.elf index 6ba84256..d6718083 100755 Binary files a/kernel/vortex_test.elf and b/kernel/vortex_test.elf differ diff --git a/kernel/vortex_test.hex b/kernel/vortex_test.hex index ae209af9..4a008af1 100644 --- a/kernel/vortex_test.hex +++ b/kernel/vortex_test.hex @@ -1,5 +1,5 @@ :0200000480007A -:10000000130510007310050213052000731015026C +:10000000130510007310050213058000731015020C :10001000731040F17310103037F1FF7FEF0080193B :10002000EF10C06D73000000938B0600130D0700E6 :10003000130F01009303050013051000635C7500A6 diff --git a/kernel/vx_os/vx_back/vx_back.s b/kernel/vx_os/vx_back/vx_back.s index 546d309a..25d0a396 100644 --- a/kernel/vx_os/vx_back/vx_back.s +++ b/kernel/vx_os/vx_back/vx_back.s @@ -8,7 +8,7 @@ _start: li a0, 1 # Num Warps csrw 0x20, a0 # Setting the number of available warps - li a0, 2 # Num Threads + li a0, 8 # Num Threads csrw 0x21, a0 # Setting the number of available threads csrw mhartid,zero csrw misa,zero diff --git a/rtl/VX_decode.v b/rtl/VX_decode.v index 15a61255..a5370e38 100644 --- a/rtl/VX_decode.v +++ b/rtl/VX_decode.v @@ -139,9 +139,9 @@ module VX_decode( assign write_register = (in_wb != 2'h0) ? (1'b1) : (1'b0); - always @(*) begin - $display("DECODE PC: %h",in_curr_PC); - end + // always @(*) begin + // $display("DECODE PC: %h",in_curr_PC); + // end // always @(posedge clk) begin @@ -164,45 +164,46 @@ module VX_decode( ); - wire to_clone_1 = (1 == rd1_register[0]) && (state_stall == 1); + // wire to_clone_1 = (1 == rd1_register[0]) && (state_stall == 1); - VX_register_file_slave vx_register_file_slave( - .clk (clk), - .in_valid (in_wb_valid[1]), - .in_write_register (write_register), - .in_rd (in_rd), - .in_data (in_write_data[1]), - .in_src1 (out_rs1), - .in_src2 (out_rs2), - .in_clone (is_clone), - .in_to_clone (to_clone_1), - .in_regs (clone_regsiters), - .out_src1_data (rd1_register[1]), - .out_src2_data (rd2_register[1]) - ); - - // genvar index; - - // generate - // for (index=1; index < `NT; index=index+1) - // begin: gen_code_label // VX_register_file_slave vx_register_file_slave( // .clk (clk), - // .in_valid (in_wb_valid[index]), + // .in_valid (in_wb_valid[1]), // .in_write_register (write_register), // .in_rd (in_rd), - // .in_data (in_write_data[index]), + // .in_data (in_write_data[1]), // .in_src1 (out_rs1), // .in_src2 (out_rs2), // .in_clone (is_clone), - // .in_to_clone (index == rd1_register[0]), + // .in_to_clone (to_clone_1), // .in_regs (clone_regsiters), - // .out_src1_data (rd1_register[index]), - // .out_src2_data (rd2_register[index]) + // .out_src1_data (rd1_register[1]), + // .out_src2_data (rd2_register[1]) // ); - // end - // endgenerate + + genvar index; + generate + for (index=1; index < `NT; index=index+1) + begin: gen_code_label + wire to_clone; + assign to_clone = (index == rd1_register[0]) && (state_stall == 1); + VX_register_file_slave vx_register_file_slave( + .clk (clk), + .in_valid (in_wb_valid[index]), + .in_write_register (write_register), + .in_rd (in_rd), + .in_data (in_write_data[index]), + .in_src1 (out_rs1), + .in_src2 (out_rs2), + .in_clone (is_clone), + .in_to_clone (to_clone), + .in_regs (clone_regsiters), + .out_src1_data (rd1_register[index]), + .out_src2_data (rd2_register[index]) + ); + end + endgenerate assign curr_opcode = in_instruction[6:0]; @@ -237,11 +238,11 @@ module VX_decode( assign is_jalrs = is_gpgpu && (func3 == 6); assign is_jmprt = is_gpgpu && (func3 == 4); - always @(*) begin - if (is_jalrs) begin - $display("JALRS WOHOOO: rs2 - %h", out_b_reg_data[0]); - end - end + // always @(*) begin + // if (is_jalrs) begin + // $display("JALRS WOHOOO: rs2 - %h", out_b_reg_data[0]); + // end + // end wire jalrs_thread_mask[`NT_M1:0]; @@ -272,21 +273,21 @@ module VX_decode( // assign out_clone = is_clone; - always @(in_instruction) begin - $display("Decode inst: %h", in_instruction); - end + // always @(in_instruction) begin + // $display("Decode inst: %h", in_instruction); + // end reg[5:0] state_stall = 0; always @(posedge clk) begin if ((is_clone) && state_stall == 0) begin state_stall <= 10; - $display("CLONEEE BITCH %d, 1 =? %h = %h -- %d", state_stall, rd1_register[0], to_clone_1, is_clone); + // $display("CLONEEE BITCH %d, 1 =? %h = %h -- %d", state_stall, rd1_register[0], to_clone_1, is_clone); end else if (state_stall == 1) begin - $display("ENDING CLONE, 1 =? %h = %h -- %d", rd1_register[0], to_clone_1, is_clone); + // $display("ENDING CLONE, 1 =? %h = %h -- %d", rd1_register[0], to_clone_1, is_clone); state_stall <= 0; end else if (state_stall > 0) begin state_stall <= state_stall - 1; - $display("CLONEEE BITCH %d, 1 =? %h = %h -- %d", state_stall, rd1_register[0], to_clone_1, is_clone); + // $display("CLONEEE BITCH %d, 1 =? %h = %h -- %d", state_stall, rd1_register[0], to_clone_1, is_clone); end end diff --git a/rtl/VX_define.h b/rtl/VX_define.h index 2fd9f837..c56fe7cb 100644 --- a/rtl/VX_define.h +++ b/rtl/VX_define.h @@ -1,7 +1,7 @@ -#define NT 5 -#define NT_M1 4 +#define NT 8 +#define NT_M1 7 #define R_INST 51 #define L_INST 3 diff --git a/rtl/VX_define.v b/rtl/VX_define.v index 85629d04..2b89f27f 100644 --- a/rtl/VX_define.v +++ b/rtl/VX_define.v @@ -1,6 +1,6 @@ -`define NT 5 -`define NT_M1 4 +`define NT 8 +`define NT_M1 7 `define R_INST 7'd51 diff --git a/rtl/VX_fetch.v b/rtl/VX_fetch.v index 4eea201f..d76adbab 100644 --- a/rtl/VX_fetch.v +++ b/rtl/VX_fetch.v @@ -68,7 +68,7 @@ module VX_fetch ( always @(*) begin : proc_ if (in_change_mask) begin - $display("CHANGING MASK: [%d %d]",in_thread_mask[0], in_thread_mask[1]); + // $display("CHANGING MASK: [%d %d]",in_thread_mask[0], in_thread_mask[1]); assign valid = in_thread_mask; end end @@ -100,7 +100,7 @@ module VX_fetch ( PC_to_use = real_PC; end end else if (stall_reg == 1'b1) begin - $display("Using old cuz stall: PC: %h\treal_pc: %h",old, real_PC); + // $display("Using old cuz stall: PC: %h\treal_pc: %h",old, real_PC); PC_to_use = old; end else begin PC_to_use = PC_to_use_temp; @@ -125,7 +125,7 @@ module VX_fetch ( if ((in_jal == 1'b1) && (delay_reg == 1'b0)) begin temp_PC = in_jal_dest; - $display("in_jal_dest: %h",in_jal_dest); + // $display("in_jal_dest: %h",in_jal_dest); end else if ((in_branch_dir == 1'b1) && (delay_reg == 1'b0)) begin temp_PC = in_branch_dest; end else begin @@ -136,9 +136,9 @@ module VX_fetch ( assign out_PC = temp_PC; - always @(*) begin - $display("FETCH PC: %h (%h, %h, %h)",temp_PC, PC_to_use, in_jal_dest, in_branch_dest); - end + // always @(*) begin + // $display("FETCH PC: %h (%h, %h, %h)",temp_PC, PC_to_use, in_jal_dest, in_branch_dest); + // end always @(*) begin diff --git a/rtl/VX_register_file.v b/rtl/VX_register_file.v index 29871c24..0016e888 100644 --- a/rtl/VX_register_file.v +++ b/rtl/VX_register_file.v @@ -38,7 +38,7 @@ module VX_register_file ( always @(posedge clk) begin if(write_enable) begin - $display("RF: Writing %h to %d",write_data, write_register); + // $display("RF: Writing %h to %d",write_data, write_register); registers[write_register] <= write_data; end end diff --git a/rtl/VX_register_file_slave.v b/rtl/VX_register_file_slave.v index 627d35a5..3cc02a74 100644 --- a/rtl/VX_register_file_slave.v +++ b/rtl/VX_register_file_slave.v @@ -43,10 +43,10 @@ module VX_register_file_slave ( always @(posedge clk) begin if(write_enable && !in_clone) begin - $display("RF: Writing %h to %d",write_data, write_register); + // $display("RF: Writing %h to %d",write_data, write_register); registers[write_register] <= write_data; end else if (in_clone && in_to_clone) begin - $display("CLONING IN SLAVE"); + // $display("CLONING IN SLAVE"); registers <= in_regs; end end diff --git a/rtl/VX_writeback.v b/rtl/VX_writeback.v index 0135f24a..e4f2100d 100644 --- a/rtl/VX_writeback.v +++ b/rtl/VX_writeback.v @@ -3,13 +3,17 @@ module VX_writeback ( + /* verilator lint_off UNUSED */ input wire clk, + /* verilator lint_off UNUSED */ input wire[31:0] in_alu_result[`NT_M1:0], input wire[31:0] in_mem_result[`NT_M1:0], input wire[4:0] in_rd, input wire[1:0] in_wb, input wire[31:0] in_PC_next, + /* verilator lint_off UNUSED */ input wire in_valid[`NT_M1:0], + /* verilator lint_on UNUSED */ output wire[31:0] out_write_data[`NT_M1:0], output wire[4:0] out_rd, @@ -40,11 +44,11 @@ module VX_writeback ( in_mem_result; - always @(negedge clk) begin - if (in_wb != 0) begin - $display("[%h] WB Data: %h {%h}, to register: %d [%d %d]",in_PC_next - 4, out_write_data[0], in_mem_result[0], in_rd, in_valid[0], in_valid[1]); - end - end + // always @(negedge clk) begin + // if (in_wb != 0) begin + // $display("[%h] WB Data: %h {%h}, to register: %d [%d %d]",in_PC_next - 4, out_write_data[0], in_mem_result[0], in_rd, in_valid[0], in_valid[1]); + // end + // end assign out_rd = in_rd; assign out_wb = in_wb; diff --git a/rtl/obj_dir/VVortex b/rtl/obj_dir/VVortex index decc0521..2566dea1 100755 Binary files a/rtl/obj_dir/VVortex and b/rtl/obj_dir/VVortex differ diff --git a/rtl/obj_dir/VVortex.cpp b/rtl/obj_dir/VVortex.cpp index 3a0280f9..c705fccd 100644 --- a/rtl/obj_dir/VVortex.cpp +++ b/rtl/obj_dir/VVortex.cpp @@ -100,6 +100,15 @@ void VVortex::_settle__TOP__1(VVortex__Syms* __restrict vlSymsp) { vlTOPp->Vortex__DOT__vx_decode__DOT__jmprt_thread_mask[2U] = 0U; vlTOPp->Vortex__DOT__vx_decode__DOT__jmprt_thread_mask[3U] = 0U; vlTOPp->Vortex__DOT__vx_decode__DOT__jmprt_thread_mask[4U] = 0U; + vlTOPp->Vortex__DOT__vx_decode__DOT__jmprt_thread_mask[5U] = 0U; + vlTOPp->Vortex__DOT__vx_decode__DOT__jmprt_thread_mask[6U] = 0U; + vlTOPp->Vortex__DOT__vx_decode__DOT__jmprt_thread_mask[7U] = 0U; + vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data[7U] + = vlTOPp->in_cache_driver_out_data[7U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data[6U] + = vlTOPp->in_cache_driver_out_data[6U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data[5U] + = vlTOPp->in_cache_driver_out_data[5U]; vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data[4U] = vlTOPp->in_cache_driver_out_data[4U]; vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data[3U] @@ -110,6 +119,15 @@ void VVortex::_settle__TOP__1(VVortex__Syms* __restrict vlSymsp) { = vlTOPp->in_cache_driver_out_data[1U]; vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data[0U] = vlTOPp->in_cache_driver_out_data[0U]; + vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_valid[7U] + = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__valid + [7U]; + vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_valid[6U] + = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__valid + [6U]; + vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_valid[5U] + = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__valid + [5U]; vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_valid[4U] = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__valid [4U]; @@ -128,7 +146,19 @@ void VVortex::_settle__TOP__1(VVortex__Syms* __restrict vlSymsp) { vlTOPp->Vortex__DOT__vx_decode__DOT__rd1_register[0U] = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__vx_register_file_master__out_src1_data; vlTOPp->Vortex__DOT__vx_decode__DOT__rd1_register[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__vx_register_file_slave__out_src1_data; + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__out_src1_data; + vlTOPp->Vortex__DOT__vx_decode__DOT__rd1_register[2U] + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__out_src1_data; + vlTOPp->Vortex__DOT__vx_decode__DOT__rd1_register[3U] + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__out_src1_data; + vlTOPp->Vortex__DOT__vx_decode__DOT__rd1_register[4U] + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__out_src1_data; + vlTOPp->Vortex__DOT__vx_decode__DOT__rd1_register[5U] + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__out_src1_data; + vlTOPp->Vortex__DOT__vx_decode__DOT__rd1_register[6U] + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__out_src1_data; + vlTOPp->Vortex__DOT__vx_decode__DOT__rd1_register[7U] + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__out_src1_data; vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__vx_register_file_master__out_regs[0x1fU] = vlTOPp->Vortex__DOT__vx_decode__DOT__vx_register_file_master__DOT__registers [0x1fU]; @@ -228,7 +258,28 @@ void VVortex::_settle__TOP__1(VVortex__Syms* __restrict vlSymsp) { vlTOPp->Vortex__DOT__vx_decode__DOT__rd2_register[0U] = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__vx_register_file_master__out_src2_data; vlTOPp->Vortex__DOT__vx_decode__DOT__rd2_register[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__vx_register_file_slave__out_src2_data; + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__out_src2_data; + vlTOPp->Vortex__DOT__vx_decode__DOT__rd2_register[2U] + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__out_src2_data; + vlTOPp->Vortex__DOT__vx_decode__DOT__rd2_register[3U] + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__out_src2_data; + vlTOPp->Vortex__DOT__vx_decode__DOT__rd2_register[4U] + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__out_src2_data; + vlTOPp->Vortex__DOT__vx_decode__DOT__rd2_register[5U] + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__out_src2_data; + vlTOPp->Vortex__DOT__vx_decode__DOT__rd2_register[6U] + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__out_src2_data; + vlTOPp->Vortex__DOT__vx_decode__DOT__rd2_register[7U] + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__out_src2_data; + vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_alu_result[7U] + = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__alu_result + [7U]; + vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_alu_result[6U] + = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__alu_result + [6U]; + vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_alu_result[5U] + = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__alu_result + [5U]; vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_alu_result[4U] = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__alu_result [4U]; @@ -244,6 +295,15 @@ void VVortex::_settle__TOP__1(VVortex__Syms* __restrict vlSymsp) { vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_alu_result[0U] = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__alu_result [0U]; + vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_mem_result[7U] + = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__mem_result + [7U]; + vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_mem_result[6U] + = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__mem_result + [6U]; + vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_mem_result[5U] + = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__mem_result + [5U]; vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_mem_result[4U] = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__mem_result [4U]; @@ -259,10 +319,6 @@ void VVortex::_settle__TOP__1(VVortex__Syms* __restrict vlSymsp) { vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_mem_result[0U] = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__mem_result [0U]; - // ALWAYS at VX_decode.v:142 - VL_WRITEF("DECODE PC: %x\n",32,vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__curr_PC); - // ALWAYS at VX_decode.v:275 - VL_WRITEF("Decode inst: %x\n",32,vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction); vlTOPp->Vortex__DOT__vx_decode__DOT__is_itype = ((0x13U == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) | (3U == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction))); @@ -281,7 +337,7 @@ void VVortex::_settle__TOP__1(VVortex__Syms* __restrict vlSymsp) { (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction >> 0x14U) : 0x55U)); - // ALWAYS at VX_decode.v:490 + // ALWAYS at VX_decode.v:491 vlTOPp->__Vtableidx1 = (7U & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction >> 0xcU)); vlTOPp->Vortex__DOT__vx_decode__DOT__mul_alu = @@ -315,6 +371,15 @@ void VVortex::_settle__TOP__1(VVortex__Syms* __restrict vlSymsp) { ((0x6bU == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) & (4U == (7U & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction >> 0xcU)))); + vlTOPp->Vortex__DOT____Vcellout__vx_f_d_reg__out_valid[7U] + = vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__valid + [7U]; + vlTOPp->Vortex__DOT____Vcellout__vx_f_d_reg__out_valid[6U] + = vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__valid + [6U]; + vlTOPp->Vortex__DOT____Vcellout__vx_f_d_reg__out_valid[5U] + = vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__valid + [5U]; vlTOPp->Vortex__DOT____Vcellout__vx_f_d_reg__out_valid[4U] = vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__valid [4U]; @@ -341,6 +406,15 @@ void VVortex::_settle__TOP__1(VVortex__Syms* __restrict vlSymsp) { 32,vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data [0U]); } + vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_mem_result[7U] + = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data + [7U]; + vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_mem_result[6U] + = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data + [6U]; + vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_mem_result[5U] + = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data + [5U]; vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_mem_result[4U] = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data [4U]; @@ -356,6 +430,12 @@ void VVortex::_settle__TOP__1(VVortex__Syms* __restrict vlSymsp) { vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_mem_result[0U] = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data [0U]; + vlTOPp->Vortex__DOT__m_w_valid[7U] = vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_valid + [7U]; + vlTOPp->Vortex__DOT__m_w_valid[6U] = vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_valid + [6U]; + vlTOPp->Vortex__DOT__m_w_valid[5U] = vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_valid + [5U]; vlTOPp->Vortex__DOT__m_w_valid[4U] = vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_valid [4U]; vlTOPp->Vortex__DOT__m_w_valid[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_valid @@ -462,6 +542,12 @@ void VVortex::_settle__TOP__1(VVortex__Syms* __restrict vlSymsp) { vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters[0U] = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__vx_register_file_master__out_regs [0U]; + vlTOPp->Vortex__DOT__m_w_alu_result[7U] = vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_alu_result + [7U]; + vlTOPp->Vortex__DOT__m_w_alu_result[6U] = vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_alu_result + [6U]; + vlTOPp->Vortex__DOT__m_w_alu_result[5U] = vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_alu_result + [5U]; vlTOPp->Vortex__DOT__m_w_alu_result[4U] = vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_alu_result [4U]; vlTOPp->Vortex__DOT__m_w_alu_result[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_alu_result @@ -472,6 +558,12 @@ void VVortex::_settle__TOP__1(VVortex__Syms* __restrict vlSymsp) { [1U]; vlTOPp->Vortex__DOT__m_w_alu_result[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_alu_result [0U]; + vlTOPp->Vortex__DOT__m_w_mem_result[7U] = vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_mem_result + [7U]; + vlTOPp->Vortex__DOT__m_w_mem_result[6U] = vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_mem_result + [6U]; + vlTOPp->Vortex__DOT__m_w_mem_result[5U] = vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_mem_result + [5U]; vlTOPp->Vortex__DOT__m_w_mem_result[4U] = vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_mem_result [4U]; vlTOPp->Vortex__DOT__m_w_mem_result[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_mem_result @@ -482,7 +574,7 @@ void VVortex::_settle__TOP__1(VVortex__Syms* __restrict vlSymsp) { [1U]; vlTOPp->Vortex__DOT__m_w_mem_result[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_mem_result [0U]; - // ALWAYS at VX_decode.v:421 + // ALWAYS at VX_decode.v:422 vlTOPp->Vortex__DOT__decode_itype_immed = ((0x40U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) ? ( @@ -617,6 +709,12 @@ void VVortex::_settle__TOP__1(VVortex__Syms* __restrict vlSymsp) { >> 0x14U))) : 0xdeadbeefU) : 0xdeadbeefU)))))); + vlTOPp->Vortex__DOT__f_d_valid[7U] = vlTOPp->Vortex__DOT____Vcellout__vx_f_d_reg__out_valid + [7U]; + vlTOPp->Vortex__DOT__f_d_valid[6U] = vlTOPp->Vortex__DOT____Vcellout__vx_f_d_reg__out_valid + [6U]; + vlTOPp->Vortex__DOT__f_d_valid[5U] = vlTOPp->Vortex__DOT____Vcellout__vx_f_d_reg__out_valid + [5U]; vlTOPp->Vortex__DOT__f_d_valid[4U] = vlTOPp->Vortex__DOT____Vcellout__vx_f_d_reg__out_valid [4U]; vlTOPp->Vortex__DOT__f_d_valid[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_f_d_reg__out_valid @@ -627,7 +725,7 @@ void VVortex::_settle__TOP__1(VVortex__Syms* __restrict vlSymsp) { [1U]; vlTOPp->Vortex__DOT__f_d_valid[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_f_d_reg__out_valid [0U]; - // ALWAYS at VX_decode.v:373 + // ALWAYS at VX_decode.v:374 if ((0x40U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) { if ((0x20U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) { if ((0x10U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) { @@ -715,7 +813,7 @@ void VVortex::_settle__TOP__1(VVortex__Syms* __restrict vlSymsp) { } else { vlTOPp->Vortex__DOT__decode_jal_offset = 0xdeadbeefU; } - // ALWAYS at VX_decode.v:432 + // ALWAYS at VX_decode.v:433 if ((0x40U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) { if ((0x20U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) { if ((0x10U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) { @@ -776,6 +874,12 @@ void VVortex::_settle__TOP__1(VVortex__Syms* __restrict vlSymsp) { } vlTOPp->Vortex__DOT__decode_change_mask = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_jalrs) | (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_jmprt)); + vlTOPp->Vortex__DOT__memory_mem_result[7U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_mem_result + [7U]; + vlTOPp->Vortex__DOT__memory_mem_result[6U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_mem_result + [6U]; + vlTOPp->Vortex__DOT__memory_mem_result[5U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_mem_result + [5U]; vlTOPp->Vortex__DOT__memory_mem_result[4U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_mem_result [4U]; vlTOPp->Vortex__DOT__memory_mem_result[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_mem_result @@ -786,6 +890,12 @@ void VVortex::_settle__TOP__1(VVortex__Syms* __restrict vlSymsp) { [1U]; vlTOPp->Vortex__DOT__memory_mem_result[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_mem_result [0U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid[7U] + = vlTOPp->Vortex__DOT__m_w_valid[7U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid[6U] + = vlTOPp->Vortex__DOT__m_w_valid[6U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid[5U] + = vlTOPp->Vortex__DOT__m_w_valid[5U]; vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid[4U] = vlTOPp->Vortex__DOT__m_w_valid[4U]; vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid[3U] @@ -796,112 +906,684 @@ void VVortex::_settle__TOP__1(VVortex__Syms* __restrict vlSymsp) { = vlTOPp->Vortex__DOT__m_w_valid[1U]; vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid[0U] = vlTOPp->Vortex__DOT__m_w_valid[0U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_valid[4U] - = vlTOPp->Vortex__DOT__m_w_valid[4U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_valid[3U] - = vlTOPp->Vortex__DOT__m_w_valid[3U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_valid[2U] - = vlTOPp->Vortex__DOT__m_w_valid[2U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_valid[1U] - = vlTOPp->Vortex__DOT__m_w_valid[1U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_valid[0U] - = vlTOPp->Vortex__DOT__m_w_valid[0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs[0x1fU] + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1fU] = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters [0x1fU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs[0x1eU] + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1eU] = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters [0x1eU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs[0x1dU] + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1dU] = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters [0x1dU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs[0x1cU] + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1cU] = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters [0x1cU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs[0x1bU] + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1bU] = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters [0x1bU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs[0x1aU] + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1aU] = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters [0x1aU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs[0x19U] + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x19U] = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters [0x19U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs[0x18U] + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x18U] = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters [0x18U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs[0x17U] + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x17U] = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters [0x17U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs[0x16U] + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x16U] = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters [0x16U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs[0x15U] + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x15U] = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters [0x15U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs[0x14U] + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x14U] = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters [0x14U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs[0x13U] + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x13U] = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters [0x13U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs[0x12U] + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x12U] = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters [0x12U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs[0x11U] + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x11U] = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters [0x11U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs[0x10U] + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x10U] = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters [0x10U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs[0xfU] + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xfU] = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters [0xfU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs[0xeU] + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xeU] = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters [0xeU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs[0xdU] + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xdU] = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters [0xdU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs[0xcU] + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xcU] = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters [0xcU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs[0xbU] + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xbU] = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters [0xbU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs[0xaU] + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xaU] = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters [0xaU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs[9U] + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[9U] = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters [9U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs[8U] + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[8U] = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters [8U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs[7U] + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[7U] = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters [7U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs[6U] + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[6U] = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters [6U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs[5U] + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[5U] = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters [5U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs[4U] + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[4U] = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters [4U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs[3U] + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[3U] = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs[2U] + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[2U] = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs[1U] + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[1U] = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs[0U] + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0U] = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters [0U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x1fU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x1fU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x1eU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x1eU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x1dU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x1dU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x1cU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x1cU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x1bU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x1bU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x1aU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x1aU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x19U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x19U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x18U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x18U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x17U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x17U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x16U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x16U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x15U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x15U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x14U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x14U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x13U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x13U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x12U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x12U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x11U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x11U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x10U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x10U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0xfU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0xfU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0xeU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0xeU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0xdU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0xdU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0xcU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0xcU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0xbU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0xbU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0xaU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0xaU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[9U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [9U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[8U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [8U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[7U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [7U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[6U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [6U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[5U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [5U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[4U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [4U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[3U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [3U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[2U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [2U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[1U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [1U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x1fU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x1fU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x1eU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x1eU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x1dU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x1dU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x1cU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x1cU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x1bU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x1bU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x1aU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x1aU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x19U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x19U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x18U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x18U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x17U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x17U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x16U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x16U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x15U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x15U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x14U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x14U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x13U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x13U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x12U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x12U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x11U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x11U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x10U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x10U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0xfU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0xfU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0xeU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0xeU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0xdU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0xdU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0xcU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0xcU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0xbU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0xbU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0xaU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0xaU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[9U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [9U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[8U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [8U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[7U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [7U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[6U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [6U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[5U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [5U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[4U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [4U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[3U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [3U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[2U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [2U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[1U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [1U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs[0x1fU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x1fU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs[0x1eU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x1eU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs[0x1dU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x1dU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs[0x1cU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x1cU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs[0x1bU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x1bU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs[0x1aU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x1aU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs[0x19U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x19U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs[0x18U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x18U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs[0x17U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x17U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs[0x16U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x16U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs[0x15U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x15U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs[0x14U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x14U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs[0x13U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x13U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs[0x12U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x12U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs[0x11U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x11U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs[0x10U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x10U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs[0xfU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0xfU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs[0xeU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0xeU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs[0xdU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0xdU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs[0xcU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0xcU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs[0xbU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0xbU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs[0xaU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0xaU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs[9U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [9U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs[8U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [8U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs[7U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [7U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs[6U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [6U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs[5U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [5U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs[4U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [4U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs[3U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [3U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs[2U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [2U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs[1U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [1U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs[0U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs[0x1fU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x1fU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs[0x1eU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x1eU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs[0x1dU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x1dU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs[0x1cU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x1cU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs[0x1bU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x1bU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs[0x1aU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x1aU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs[0x19U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x19U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs[0x18U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x18U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs[0x17U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x17U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs[0x16U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x16U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs[0x15U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x15U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs[0x14U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x14U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs[0x13U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x13U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs[0x12U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x12U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs[0x11U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x11U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs[0x10U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x10U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs[0xfU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0xfU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs[0xeU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0xeU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs[0xdU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0xdU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs[0xcU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0xcU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs[0xbU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0xbU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs[0xaU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0xaU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs[9U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [9U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs[8U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [8U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs[7U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [7U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs[6U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [6U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs[5U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [5U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs[4U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [4U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs[3U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [3U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs[2U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [2U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs[1U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [1U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs[0U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs[0x1fU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x1fU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs[0x1eU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x1eU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs[0x1dU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x1dU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs[0x1cU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x1cU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs[0x1bU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x1bU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs[0x1aU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x1aU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs[0x19U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x19U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs[0x18U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x18U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs[0x17U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x17U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs[0x16U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x16U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs[0x15U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x15U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs[0x14U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x14U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs[0x13U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x13U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs[0x12U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x12U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs[0x11U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x11U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs[0x10U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x10U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs[0xfU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0xfU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs[0xeU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0xeU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs[0xdU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0xdU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs[0xcU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0xcU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs[0xbU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0xbU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs[0xaU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0xaU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs[9U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [9U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs[8U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [8U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs[7U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [7U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs[6U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [6U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs[5U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [5U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs[4U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [4U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs[3U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [3U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs[2U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [2U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs[1U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [1U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs[0U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs[0x1fU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x1fU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs[0x1eU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x1eU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs[0x1dU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x1dU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs[0x1cU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x1cU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs[0x1bU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x1bU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs[0x1aU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x1aU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs[0x19U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x19U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs[0x18U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x18U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs[0x17U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x17U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs[0x16U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x16U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs[0x15U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x15U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs[0x14U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x14U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs[0x13U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x13U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs[0x12U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x12U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs[0x11U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x11U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs[0x10U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x10U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs[0xfU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0xfU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs[0xeU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0xeU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs[0xdU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0xdU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs[0xcU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0xcU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs[0xbU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0xbU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs[0xaU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0xaU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs[9U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [9U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs[8U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [8U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs[7U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [7U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs[6U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [6U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs[5U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [5U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs[4U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [4U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs[3U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [3U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs[2U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [2U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs[1U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [1U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs[0U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_alu_result[7U] + = vlTOPp->Vortex__DOT__m_w_alu_result[7U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_alu_result[6U] + = vlTOPp->Vortex__DOT__m_w_alu_result[6U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_alu_result[5U] + = vlTOPp->Vortex__DOT__m_w_alu_result[5U]; vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_alu_result[4U] = vlTOPp->Vortex__DOT__m_w_alu_result[4U]; vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_alu_result[3U] @@ -912,6 +1594,12 @@ void VVortex::_settle__TOP__1(VVortex__Syms* __restrict vlSymsp) { = vlTOPp->Vortex__DOT__m_w_alu_result[1U]; vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_alu_result[0U] = vlTOPp->Vortex__DOT__m_w_alu_result[0U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_alu_result[7U] + = vlTOPp->Vortex__DOT__m_w_alu_result[7U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_alu_result[6U] + = vlTOPp->Vortex__DOT__m_w_alu_result[6U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_alu_result[5U] + = vlTOPp->Vortex__DOT__m_w_alu_result[5U]; vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_alu_result[4U] = vlTOPp->Vortex__DOT__m_w_alu_result[4U]; vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_alu_result[3U] @@ -922,6 +1610,12 @@ void VVortex::_settle__TOP__1(VVortex__Syms* __restrict vlSymsp) { = vlTOPp->Vortex__DOT__m_w_alu_result[1U]; vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_alu_result[0U] = vlTOPp->Vortex__DOT__m_w_alu_result[0U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_mem_result[7U] + = vlTOPp->Vortex__DOT__m_w_mem_result[7U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_mem_result[6U] + = vlTOPp->Vortex__DOT__m_w_mem_result[6U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_mem_result[5U] + = vlTOPp->Vortex__DOT__m_w_mem_result[5U]; vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_mem_result[4U] = vlTOPp->Vortex__DOT__m_w_mem_result[4U]; vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_mem_result[3U] @@ -932,6 +1626,12 @@ void VVortex::_settle__TOP__1(VVortex__Syms* __restrict vlSymsp) { = vlTOPp->Vortex__DOT__m_w_mem_result[1U]; vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_mem_result[0U] = vlTOPp->Vortex__DOT__m_w_mem_result[0U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_mem_data[7U] + = vlTOPp->Vortex__DOT__m_w_mem_result[7U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_mem_data[6U] + = vlTOPp->Vortex__DOT__m_w_mem_result[6U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_mem_data[5U] + = vlTOPp->Vortex__DOT__m_w_mem_result[5U]; vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_mem_data[4U] = vlTOPp->Vortex__DOT__m_w_mem_result[4U]; vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_mem_data[3U] @@ -942,6 +1642,12 @@ void VVortex::_settle__TOP__1(VVortex__Syms* __restrict vlSymsp) { = vlTOPp->Vortex__DOT__m_w_mem_result[1U]; vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_mem_data[0U] = vlTOPp->Vortex__DOT__m_w_mem_result[0U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid[7U] + = vlTOPp->Vortex__DOT__f_d_valid[7U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid[6U] + = vlTOPp->Vortex__DOT__f_d_valid[6U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid[5U] + = vlTOPp->Vortex__DOT__f_d_valid[5U]; vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid[4U] = vlTOPp->Vortex__DOT__f_d_valid[4U]; vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid[3U] @@ -1033,6 +1739,12 @@ void VVortex::_settle__TOP__1(VVortex__Syms* __restrict vlSymsp) { >> 0x19U))) ? 0U : 1U)))))))))); + vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_mem_result[7U] + = vlTOPp->Vortex__DOT__memory_mem_result[7U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_mem_result[6U] + = vlTOPp->Vortex__DOT__memory_mem_result[6U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_mem_result[5U] + = vlTOPp->Vortex__DOT__memory_mem_result[5U]; vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_mem_result[4U] = vlTOPp->Vortex__DOT__memory_mem_result[4U]; vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_mem_result[3U] @@ -1043,6 +1755,12 @@ void VVortex::_settle__TOP__1(VVortex__Syms* __restrict vlSymsp) { = vlTOPp->Vortex__DOT__memory_mem_result[1U]; vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_mem_result[0U] = vlTOPp->Vortex__DOT__memory_mem_result[0U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_mem_data[7U] + = vlTOPp->Vortex__DOT__memory_mem_result[7U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_mem_data[6U] + = vlTOPp->Vortex__DOT__memory_mem_result[6U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_mem_data[5U] + = vlTOPp->Vortex__DOT__memory_mem_result[5U]; vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_mem_data[4U] = vlTOPp->Vortex__DOT__memory_mem_result[4U]; vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_mem_data[3U] @@ -1053,7 +1771,7 @@ void VVortex::_settle__TOP__1(VVortex__Syms* __restrict vlSymsp) { = vlTOPp->Vortex__DOT__memory_mem_result[1U]; vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_mem_data[0U] = vlTOPp->Vortex__DOT__memory_mem_result[0U]; - // ALWAYS at VX_decode.v:373 + // ALWAYS at VX_decode.v:374 if ((0x40U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) { if ((0x20U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) { if ((0x10U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) { @@ -1118,6 +1836,15 @@ void VVortex::_settle__TOP__1(VVortex__Syms* __restrict vlSymsp) { } else { vlTOPp->Vortex__DOT__decode_jal = 0U; } + vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_valid[7U] + = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid + [7U]; + vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_valid[6U] + = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid + [6U]; + vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_valid[5U] + = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid + [5U]; vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_valid[4U] = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid [4U]; @@ -1133,7 +1860,7 @@ void VVortex::_settle__TOP__1(VVortex__Syms* __restrict vlSymsp) { vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_valid[0U] = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid [0U]; - // ALWAYS at VX_decode.v:432 + // ALWAYS at VX_decode.v:433 if ((0x40U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) { if ((0x20U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) { if ((0x10U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) { @@ -1181,6 +1908,12 @@ void VVortex::_settle__TOP__1(VVortex__Syms* __restrict vlSymsp) { } else { vlTOPp->Vortex__DOT__decode_branch_stall = 0U; } + vlTOPp->Vortex__DOT__decode_valid[7U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_valid + [7U]; + vlTOPp->Vortex__DOT__decode_valid[6U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_valid + [6U]; + vlTOPp->Vortex__DOT__decode_valid[5U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_valid + [5U]; vlTOPp->Vortex__DOT__decode_valid[4U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_valid [4U]; vlTOPp->Vortex__DOT__decode_valid[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_valid @@ -1191,6 +1924,12 @@ void VVortex::_settle__TOP__1(VVortex__Syms* __restrict vlSymsp) { [1U]; vlTOPp->Vortex__DOT__decode_valid[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_valid [0U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_valid[7U] + = vlTOPp->Vortex__DOT__decode_valid[7U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_valid[6U] + = vlTOPp->Vortex__DOT__decode_valid[6U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_valid[5U] + = vlTOPp->Vortex__DOT__decode_valid[5U]; vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_valid[4U] = vlTOPp->Vortex__DOT__decode_valid[4U]; vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_valid[3U] @@ -1208,8 +1947,8 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__2(VVortex__Syms* __restrict vlSymsp) VVortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; // Body vlTOPp->__Vdlyvset__Vortex__DOT__vx_f_d_reg__DOT__valid__v0 = 0U; - vlTOPp->__Vdlyvset__Vortex__DOT__vx_f_d_reg__DOT__valid__v5 = 0U; - vlTOPp->__Vdlyvset__Vortex__DOT__vx_f_d_reg__DOT__valid__v6 = 0U; + vlTOPp->__Vdlyvset__Vortex__DOT__vx_f_d_reg__DOT__valid__v8 = 0U; + vlTOPp->__Vdlyvset__Vortex__DOT__vx_f_d_reg__DOT__valid__v9 = 0U; // ALWAYS at VX_fetch.v:163 vlTOPp->Vortex__DOT__vx_fetch__DOT__old = ((IData)(vlTOPp->reset) ? 0U @@ -1253,35 +1992,26 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__2(VVortex__Syms* __restrict vlSymsp) // ALWAYS at VX_fetch.v:163 vlTOPp->Vortex__DOT__vx_fetch__DOT__prev_debug = 0U; // ALWAYS at VX_fetch.v:92 - if (vlTOPp->Vortex__DOT__vx_fetch__DOT__delay_reg) { - vlTOPp->Vortex__DOT__vx_fetch__DOT__PC_to_use - = vlTOPp->Vortex__DOT__vx_fetch__DOT__old; - } else { - if (VL_UNLIKELY(vlTOPp->Vortex__DOT__vx_fetch__DOT__stall_reg)) { - VL_WRITEF("Using old cuz stall: PC: %x\treal_pc: %x\n", - 32,vlTOPp->Vortex__DOT__vx_fetch__DOT__old, - 32,vlTOPp->Vortex__DOT__vx_fetch__DOT__real_PC); - vlTOPp->Vortex__DOT__vx_fetch__DOT__PC_to_use - = vlTOPp->Vortex__DOT__vx_fetch__DOT__old; - } else { - vlTOPp->Vortex__DOT__vx_fetch__DOT__PC_to_use - = ((0x10U & (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__state)) - ? 0U : ((8U & (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__state)) - ? 0U : ((4U & (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__state)) - ? ((2U & (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__state)) - ? 0U : ((1U - & (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__state)) - ? 0U - : vlTOPp->Vortex__DOT__vx_fetch__DOT__old)) - : ((2U & (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__state)) - ? ((1U & (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__state)) - ? vlTOPp->Vortex__DOT__vx_fetch__DOT__real_PC - : vlTOPp->Vortex__DOT__vx_fetch__DOT__BR_reg) - : ((1U & (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__state)) - ? vlTOPp->Vortex__DOT__vx_fetch__DOT__JAL_reg - : vlTOPp->Vortex__DOT__vx_fetch__DOT__real_PC))))); - } - } + vlTOPp->Vortex__DOT__vx_fetch__DOT__PC_to_use = + ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__delay_reg) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT__old + : ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__stall_reg) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT__old + : ((0x10U & (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__state)) + ? 0U : ((8U & (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__state)) + ? 0U : ((4U & (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__state)) + ? ((2U & (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__state)) + ? 0U : ((1U + & (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__state)) + ? 0U + : vlTOPp->Vortex__DOT__vx_fetch__DOT__old)) + : ((2U & (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__state)) + ? ((1U & (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__state)) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT__real_PC + : vlTOPp->Vortex__DOT__vx_fetch__DOT__BR_reg) + : ((1U & (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__state)) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT__JAL_reg + : vlTOPp->Vortex__DOT__vx_fetch__DOT__real_PC))))))); } VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) { @@ -1292,173 +2022,441 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) VL_SIG8(__Vdly__Vortex__DOT__vx_decode__DOT__state_stall,5,0); VL_SIG8(__Vdlyvdim0__Vortex__DOT__vx_decode__DOT__vx_register_file_master__DOT__registers__v0,4,0); VL_SIG8(__Vdlyvset__Vortex__DOT__vx_decode__DOT__vx_register_file_master__DOT__registers__v0,0,0); - VL_SIG8(__Vdlyvdim0__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v0,4,0); - VL_SIG8(__Vdlyvset__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v0,0,0); - VL_SIG8(__Vdlyvset__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v1,0,0); + VL_SIG8(__Vdlyvdim0__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0,4,0); + VL_SIG8(__Vdlyvset__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0,0,0); + VL_SIG8(__Vdlyvset__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v1,0,0); + VL_SIG8(__Vdlyvdim0__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v0,4,0); + VL_SIG8(__Vdlyvset__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v0,0,0); + VL_SIG8(__Vdlyvset__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v1,0,0); + VL_SIG8(__Vdlyvdim0__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v0,4,0); + VL_SIG8(__Vdlyvset__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v0,0,0); + VL_SIG8(__Vdlyvset__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v1,0,0); + VL_SIG8(__Vdlyvdim0__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers__v0,4,0); + VL_SIG8(__Vdlyvset__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers__v0,0,0); + VL_SIG8(__Vdlyvset__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers__v1,0,0); + VL_SIG8(__Vdlyvdim0__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers__v0,4,0); + VL_SIG8(__Vdlyvset__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers__v0,0,0); + VL_SIG8(__Vdlyvset__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers__v1,0,0); + VL_SIG8(__Vdlyvdim0__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers__v0,4,0); + VL_SIG8(__Vdlyvset__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers__v0,0,0); + VL_SIG8(__Vdlyvset__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers__v1,0,0); + VL_SIG8(__Vdlyvdim0__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers__v0,4,0); + VL_SIG8(__Vdlyvset__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers__v0,0,0); + VL_SIG8(__Vdlyvset__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers__v1,0,0); VL_SIG8(__Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__valid__v0,0,0); VL_SIG8(__Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__valid__v1,0,0); VL_SIG8(__Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__valid__v2,0,0); VL_SIG8(__Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__valid__v3,0,0); VL_SIG8(__Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__valid__v4,0,0); + VL_SIG8(__Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__valid__v5,0,0); + VL_SIG8(__Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__valid__v6,0,0); + VL_SIG8(__Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__valid__v7,0,0); VL_SIG8(__Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__valid__v0,0,0); VL_SIG8(__Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__valid__v1,0,0); VL_SIG8(__Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__valid__v2,0,0); VL_SIG8(__Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__valid__v3,0,0); VL_SIG8(__Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__valid__v4,0,0); + VL_SIG8(__Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__valid__v5,0,0); + VL_SIG8(__Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__valid__v6,0,0); + VL_SIG8(__Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__valid__v7,0,0); VL_SIG8(__Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__valid__v0,0,0); VL_SIG8(__Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__valid__v1,0,0); VL_SIG8(__Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__valid__v2,0,0); VL_SIG8(__Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__valid__v3,0,0); VL_SIG8(__Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__valid__v4,0,0); + VL_SIG8(__Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__valid__v5,0,0); + VL_SIG8(__Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__valid__v6,0,0); + VL_SIG8(__Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__valid__v7,0,0); VL_SIG8(__Vdlyvset__Vortex__DOT__vx_csr_handler__DOT__csr__v0,0,0); VL_SIG16(__Vdlyvdim0__Vortex__DOT__vx_csr_handler__DOT__csr__v0,11,0); VL_SIG16(__Vdlyvval__Vortex__DOT__vx_csr_handler__DOT__csr__v0,11,0); VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_master__DOT__registers__v0,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v0,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v1,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v2,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v3,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v4,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v5,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v6,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v7,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v8,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v9,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v10,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v11,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v12,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v13,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v14,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v15,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v16,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v17,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v18,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v19,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v20,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v21,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v22,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v23,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v24,31,0); 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+ VL_SIG(__Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__a_reg_data__v5,31,0); + VL_SIG(__Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__a_reg_data__v6,31,0); + VL_SIG(__Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__a_reg_data__v7,31,0); VL_SIG(__Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__b_reg_data__v0,31,0); VL_SIG(__Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__b_reg_data__v1,31,0); VL_SIG(__Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__b_reg_data__v2,31,0); VL_SIG(__Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__b_reg_data__v3,31,0); VL_SIG(__Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__b_reg_data__v4,31,0); + VL_SIG(__Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__b_reg_data__v5,31,0); + VL_SIG(__Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__b_reg_data__v6,31,0); + VL_SIG(__Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__b_reg_data__v7,31,0); VL_SIG(__Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__alu_result__v0,31,0); VL_SIG(__Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__alu_result__v1,31,0); VL_SIG(__Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__alu_result__v2,31,0); VL_SIG(__Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__alu_result__v3,31,0); VL_SIG(__Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__alu_result__v4,31,0); + VL_SIG(__Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__alu_result__v5,31,0); + VL_SIG(__Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__alu_result__v6,31,0); + VL_SIG(__Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__alu_result__v7,31,0); VL_SIG(__Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__b_reg_data__v0,31,0); VL_SIG(__Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__b_reg_data__v1,31,0); VL_SIG(__Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__b_reg_data__v2,31,0); VL_SIG(__Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__b_reg_data__v3,31,0); VL_SIG(__Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__b_reg_data__v4,31,0); + VL_SIG(__Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__b_reg_data__v5,31,0); + VL_SIG(__Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__b_reg_data__v6,31,0); + VL_SIG(__Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__b_reg_data__v7,31,0); VL_SIG(__Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__alu_result__v0,31,0); VL_SIG(__Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__alu_result__v1,31,0); VL_SIG(__Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__alu_result__v2,31,0); VL_SIG(__Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__alu_result__v3,31,0); VL_SIG(__Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__alu_result__v4,31,0); + VL_SIG(__Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__alu_result__v5,31,0); + VL_SIG(__Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__alu_result__v6,31,0); + VL_SIG(__Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__alu_result__v7,31,0); VL_SIG(__Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__mem_result__v0,31,0); VL_SIG(__Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__mem_result__v1,31,0); VL_SIG(__Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__mem_result__v2,31,0); VL_SIG(__Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__mem_result__v3,31,0); VL_SIG(__Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__mem_result__v4,31,0); + VL_SIG(__Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__mem_result__v5,31,0); + VL_SIG(__Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__mem_result__v6,31,0); + VL_SIG(__Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__mem_result__v7,31,0); // Body __Vdly__Vortex__DOT__vx_decode__DOT__state_stall = vlTOPp->Vortex__DOT__vx_decode__DOT__state_stall; __Vdlyvset__Vortex__DOT__vx_decode__DOT__vx_register_file_master__DOT__registers__v0 = 0U; __Vdlyvset__Vortex__DOT__vx_csr_handler__DOT__csr__v0 = 0U; - __Vdlyvset__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v0 = 0U; - __Vdlyvset__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v1 = 0U; + __Vdlyvset__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers__v0 = 0U; + __Vdlyvset__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers__v1 = 0U; + __Vdlyvset__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers__v0 = 0U; + __Vdlyvset__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers__v1 = 0U; + __Vdlyvset__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers__v0 = 0U; + __Vdlyvset__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers__v1 = 0U; + __Vdlyvset__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers__v0 = 0U; + __Vdlyvset__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers__v1 = 0U; + __Vdlyvset__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v0 = 0U; + __Vdlyvset__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v1 = 0U; + __Vdlyvset__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v0 = 0U; + __Vdlyvset__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v1 = 0U; + __Vdlyvset__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0 = 0U; + __Vdlyvset__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v1 = 0U; // ALWAYS at VX_m_w_reg.v:60 __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__valid__v0 = vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_valid - [4U]; + [7U]; __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__valid__v1 = vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_valid - [3U]; + [6U]; __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__valid__v2 = vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_valid - [2U]; + [5U]; __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__valid__v3 = vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_valid - [1U]; + [4U]; __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__valid__v4 + = vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_valid + [3U]; + __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__valid__v5 + = vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_valid + [2U]; + __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__valid__v6 + = vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_valid + [1U]; + __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__valid__v7 = vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_valid [0U]; - // ALWAYS at VX_decode.v:280 - if (VL_UNLIKELY(((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_clone) - & (0U == (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__state_stall))))) { - VL_WRITEF("CLONEEE BITCH %2#, 1 =? %x = %x -- %1#\n", - 6,vlTOPp->Vortex__DOT__vx_decode__DOT__state_stall, - 32,vlTOPp->Vortex__DOT__vx_decode__DOT__rd1_register - [0U],1,vlTOPp->Vortex__DOT__vx_decode__DOT__to_clone_1, - 1,(IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_clone)); + // ALWAYS at VX_decode.v:281 + if (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_clone) + & (0U == (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__state_stall)))) { __Vdly__Vortex__DOT__vx_decode__DOT__state_stall = 0xaU; } else { - if (VL_UNLIKELY((1U == (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__state_stall)))) { - VL_WRITEF("ENDING CLONE, 1 =? %x = %x -- %1#\n", - 32,vlTOPp->Vortex__DOT__vx_decode__DOT__rd1_register - [0U],1,vlTOPp->Vortex__DOT__vx_decode__DOT__to_clone_1, - 1,(IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_clone)); + if ((1U == (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__state_stall))) { __Vdly__Vortex__DOT__vx_decode__DOT__state_stall = 0U; } else { - if (VL_UNLIKELY((0U < (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__state_stall)))) { + if ((0U < (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__state_stall))) { __Vdly__Vortex__DOT__vx_decode__DOT__state_stall = (0x3fU & ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__state_stall) - (IData)(1U))); - VL_WRITEF("CLONEEE BITCH %2#, 1 =? %x = %x -- %1#\n", - 6,vlTOPp->Vortex__DOT__vx_decode__DOT__state_stall, - 32,vlTOPp->Vortex__DOT__vx_decode__DOT__rd1_register - [0U],1,vlTOPp->Vortex__DOT__vx_decode__DOT__to_clone_1, - 1,(IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_clone)); } } } // ALWAYS at VX_e_m_reg.v:126 __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__b_reg_data__v0 = vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_b_reg_data - [4U]; + [7U]; __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__b_reg_data__v1 = vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_b_reg_data - [3U]; + [6U]; __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__b_reg_data__v2 = vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_b_reg_data - [2U]; + [5U]; __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__b_reg_data__v3 = vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_b_reg_data - [1U]; + [4U]; __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__b_reg_data__v4 + = vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_b_reg_data + [3U]; + __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__b_reg_data__v5 + = vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_b_reg_data + [2U]; + __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__b_reg_data__v6 + = vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_b_reg_data + [1U]; + __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__b_reg_data__v7 = vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_b_reg_data [0U]; // ALWAYS at VX_e_m_reg.v:126 __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__valid__v0 = vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_valid - [4U]; + [7U]; __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__valid__v1 = vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_valid - [3U]; + [6U]; __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__valid__v2 = vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_valid - [2U]; + [5U]; __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__valid__v3 = vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_valid - [1U]; + [4U]; __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__valid__v4 + = vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_valid + [3U]; + __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__valid__v5 + = vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_valid + [2U]; + __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__valid__v6 + = vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_valid + [1U]; + __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__valid__v7 = vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_valid [0U]; // ALWAYS at VX_d_e_reg.v:139 @@ -1477,46 +2475,64 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) // ALWAYS at VX_m_w_reg.v:60 __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__mem_result__v0 = vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_mem_result - [4U]; + [7U]; __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__mem_result__v1 = vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_mem_result - [3U]; + [6U]; __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__mem_result__v2 = vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_mem_result - [2U]; + [5U]; __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__mem_result__v3 = vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_mem_result - [1U]; + [4U]; __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__mem_result__v4 + = vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_mem_result + [3U]; + __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__mem_result__v5 + = vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_mem_result + [2U]; + __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__mem_result__v6 + = vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_mem_result + [1U]; + __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__mem_result__v7 = vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_mem_result [0U]; // ALWAYS at VX_m_w_reg.v:60 __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__alu_result__v0 = vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_alu_result - [4U]; + [7U]; __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__alu_result__v1 = vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_alu_result - [3U]; + [6U]; __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__alu_result__v2 = vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_alu_result - [2U]; + [5U]; __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__alu_result__v3 = vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_alu_result - [1U]; + [4U]; __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__alu_result__v4 + = vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_alu_result + [3U]; + __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__alu_result__v5 + = vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_alu_result + [2U]; + __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__alu_result__v6 + = vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_alu_result + [1U]; + __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__alu_result__v7 = vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_alu_result [0U]; // ALWAYS at VX_csr_handler.v:34 vlTOPp->Vortex__DOT__vx_csr_handler__DOT__decode_csr_address = vlTOPp->Vortex__DOT__decode_csr_address; // ALWAYS at VX_csr_handler.v:34 - vlTOPp->Vortex__DOT__vx_csr_handler__DOT__cycle - = (VL_ULL(1) + vlTOPp->Vortex__DOT__vx_csr_handler__DOT__cycle); - // ALWAYS at VX_csr_handler.v:34 if (vlTOPp->Vortex__DOT__m_w_valid[0U]) { vlTOPp->Vortex__DOT__vx_csr_handler__DOT__instret = (VL_ULL(1) + vlTOPp->Vortex__DOT__vx_csr_handler__DOT__instret); } + // ALWAYS at VX_csr_handler.v:34 + vlTOPp->Vortex__DOT__vx_csr_handler__DOT__cycle + = (VL_ULL(1) + vlTOPp->Vortex__DOT__vx_csr_handler__DOT__cycle); // ALWAYS at VX_d_e_reg.v:139 vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rs2_src = (1U & ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling) @@ -1526,46 +2542,70 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) // ALWAYS at VX_e_m_reg.v:126 __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__alu_result__v0 = vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_alu_result - [4U]; + [7U]; __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__alu_result__v1 = vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_alu_result - [3U]; + [6U]; __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__alu_result__v2 = vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_alu_result - [2U]; + [5U]; __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__alu_result__v3 = vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_alu_result - [1U]; + [4U]; __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__alu_result__v4 + = vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_alu_result + [3U]; + __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__alu_result__v5 + = vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_alu_result + [2U]; + __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__alu_result__v6 + = vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_alu_result + [1U]; + __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__alu_result__v7 = vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_alu_result [0U]; // ALWAYS at VX_e_m_reg.v:126 + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__jal; + // ALWAYS at VX_e_m_reg.v:126 vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_type = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__branch_type; - // ALWAYS at VX_e_m_reg.v:126 - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__jal; // ALWAYS at VX_d_e_reg.v:139 __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__valid__v0 + = ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling) + ? vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__valid_z + [7U] : vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_valid + [7U]); + __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__valid__v1 + = ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling) + ? vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__valid_z + [6U] : vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_valid + [6U]); + __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__valid__v2 + = ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling) + ? vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__valid_z + [5U] : vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_valid + [5U]); + __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__valid__v3 = ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling) ? vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__valid_z [4U] : vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_valid [4U]); - __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__valid__v1 + __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__valid__v4 = ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling) ? vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__valid_z [3U] : vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_valid [3U]); - __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__valid__v2 + __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__valid__v5 = ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling) ? vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__valid_z [2U] : vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_valid [2U]); - __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__valid__v3 + __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__valid__v6 = ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling) ? vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__valid_z [1U] : vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_valid [1U]); - __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__valid__v4 + __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__valid__v7 = ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling) ? vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__valid_z [0U] : vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_valid @@ -1588,12 +2628,10 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) // ALWAYS at VX_m_w_reg.v:60 vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__PC_next = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__PC_next; // ALWAYS at VX_register_file.v:39 - if (VL_UNLIKELY((((0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - & (0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd))) - & vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid - [0U]))) { - VL_WRITEF("RF: Writing %x to %2#\n",32,vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data - [0U],5,vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd); + if ((((0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) + & (0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd))) + & vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid + [0U])) { __Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_master__DOT__registers__v0 = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data [0U]; @@ -1601,32 +2639,6 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) __Vdlyvdim0__Vortex__DOT__vx_decode__DOT__vx_register_file_master__DOT__registers__v0 = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd; } - // ALWAYS at VX_d_e_reg.v:139 - __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__a_reg_data__v0 - = ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling) - ? vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__reg_data_z - [4U] : vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_a_reg_data - [4U]); - __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__a_reg_data__v1 - = ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling) - ? vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__reg_data_z - [3U] : vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_a_reg_data - [3U]); - __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__a_reg_data__v2 - = ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling) - ? vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__reg_data_z - [2U] : vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_a_reg_data - [2U]); - __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__a_reg_data__v3 - = ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling) - ? vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__reg_data_z - [1U] : vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_a_reg_data - [1U]); - __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__a_reg_data__v4 - = ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling) - ? vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__reg_data_z - [0U] : vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_a_reg_data - [0U]); // ALWAYS at VX_csr_handler.v:43 if (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__is_csr) { __Vdlyvval__Vortex__DOT__vx_csr_handler__DOT__csr__v0 @@ -1636,329 +2648,1556 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__csr_address; } // ALWAYS at VX_register_file_slave.v:44 - if (VL_UNLIKELY(((((0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - & (0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd))) - & vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid - [1U]) & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_clone))))) { - VL_WRITEF("RF: Writing %x to %2#\n",32,vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data - [1U],5,vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd); - __Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v0 + if (((((0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) + & (0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd))) + & vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid + [7U]) & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_clone)))) { + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers__v0 = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data - [1U]; - __Vdlyvset__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v0 = 1U; - __Vdlyvdim0__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v0 + [7U]; + __Vdlyvset__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers__v0 = 1U; + __Vdlyvdim0__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers__v0 = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd; } else { - if (VL_UNLIKELY(((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_clone) - & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__to_clone_1)))) { - VL_WRITEF("CLONING IN SLAVE\n"); - __Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v1 - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs + if (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_clone) + & ((7U == vlTOPp->Vortex__DOT__vx_decode__DOT__rd1_register + [0U]) & (1U == (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__state_stall))))) { + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers__v1 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs [0x1fU]; - __Vdlyvset__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v1 = 1U; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v2 - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs + __Vdlyvset__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers__v1 = 1U; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers__v2 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs [0x1eU]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v3 - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers__v3 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs [0x1dU]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v4 - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers__v4 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs [0x1cU]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v5 - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers__v5 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs [0x1bU]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v6 - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers__v6 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs [0x1aU]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v7 - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers__v7 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs [0x19U]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v8 - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers__v8 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs [0x18U]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v9 - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers__v9 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs [0x17U]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v10 - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers__v10 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs [0x16U]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v11 - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers__v11 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs [0x15U]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v12 - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers__v12 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs [0x14U]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v13 - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers__v13 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs [0x13U]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v14 - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers__v14 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs [0x12U]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v15 - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers__v15 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs [0x11U]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v16 - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers__v16 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs [0x10U]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v17 - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers__v17 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs [0xfU]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v18 - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers__v18 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs [0xeU]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v19 - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers__v19 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs [0xdU]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v20 - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers__v20 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs [0xcU]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v21 - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers__v21 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs [0xbU]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v22 - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers__v22 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs [0xaU]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v23 - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers__v23 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs [9U]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v24 - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers__v24 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs [8U]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v25 - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers__v25 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs [7U]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v26 - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers__v26 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs [6U]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v27 - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers__v27 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs [5U]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v28 - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers__v28 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs [4U]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v29 - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers__v29 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs [3U]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v30 - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers__v30 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs [2U]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v31 - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers__v31 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs [1U]; - __Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v32 - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers__v32 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs + [0U]; + } + } + // ALWAYS at VX_register_file_slave.v:44 + if (((((0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) + & (0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd))) + & vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid + [6U]) & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_clone)))) { + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers__v0 + = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data + [6U]; + __Vdlyvset__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers__v0 = 1U; + __Vdlyvdim0__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers__v0 + = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd; + } else { + if (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_clone) + & ((6U == vlTOPp->Vortex__DOT__vx_decode__DOT__rd1_register + [0U]) & (1U == (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__state_stall))))) { + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers__v1 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs + [0x1fU]; + __Vdlyvset__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers__v1 = 1U; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers__v2 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs + [0x1eU]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers__v3 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs + [0x1dU]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers__v4 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs + [0x1cU]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers__v5 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs + [0x1bU]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers__v6 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs + [0x1aU]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers__v7 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs + [0x19U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers__v8 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs + [0x18U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers__v9 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs + [0x17U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers__v10 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs + [0x16U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers__v11 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs + [0x15U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers__v12 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs + [0x14U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers__v13 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs + [0x13U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers__v14 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs + [0x12U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers__v15 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs + [0x11U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers__v16 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs + [0x10U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers__v17 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs + [0xfU]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers__v18 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs + [0xeU]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers__v19 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs + [0xdU]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers__v20 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs + [0xcU]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers__v21 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs + [0xbU]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers__v22 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs + [0xaU]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers__v23 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs + [9U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers__v24 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs + [8U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers__v25 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs + [7U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers__v26 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs + [6U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers__v27 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs + [5U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers__v28 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs + [4U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers__v29 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs + [3U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers__v30 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs + [2U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers__v31 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs + [1U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers__v32 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs + [0U]; + } + } + // ALWAYS at VX_register_file_slave.v:44 + if (((((0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) + & (0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd))) + & vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid + [5U]) & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_clone)))) { + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers__v0 + = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data + [5U]; + __Vdlyvset__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers__v0 = 1U; + __Vdlyvdim0__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers__v0 + = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd; + } else { + if (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_clone) + & ((5U == vlTOPp->Vortex__DOT__vx_decode__DOT__rd1_register + [0U]) & (1U == (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__state_stall))))) { + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers__v1 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs + [0x1fU]; + __Vdlyvset__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers__v1 = 1U; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers__v2 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs + [0x1eU]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers__v3 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs + [0x1dU]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers__v4 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs + [0x1cU]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers__v5 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs + [0x1bU]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers__v6 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs + [0x1aU]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers__v7 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs + [0x19U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers__v8 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs + [0x18U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers__v9 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs + [0x17U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers__v10 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs + [0x16U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers__v11 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs + [0x15U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers__v12 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs + [0x14U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers__v13 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs + [0x13U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers__v14 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs + [0x12U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers__v15 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs + [0x11U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers__v16 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs + [0x10U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers__v17 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs + [0xfU]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers__v18 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs + [0xeU]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers__v19 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs + [0xdU]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers__v20 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs + [0xcU]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers__v21 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs + [0xbU]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers__v22 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs + [0xaU]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers__v23 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs + [9U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers__v24 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs + [8U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers__v25 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs + [7U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers__v26 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs + [6U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers__v27 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs + [5U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers__v28 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs + [4U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers__v29 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs + [3U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers__v30 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs + [2U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers__v31 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs + [1U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers__v32 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs + [0U]; + } + } + // ALWAYS at VX_register_file_slave.v:44 + if (((((0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) + & (0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd))) + & vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid + [4U]) & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_clone)))) { + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers__v0 + = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data + [4U]; + __Vdlyvset__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers__v0 = 1U; + __Vdlyvdim0__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers__v0 + = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd; + } else { + if (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_clone) + & ((4U == vlTOPp->Vortex__DOT__vx_decode__DOT__rd1_register + [0U]) & (1U == (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__state_stall))))) { + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers__v1 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs + [0x1fU]; + __Vdlyvset__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers__v1 = 1U; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers__v2 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs + [0x1eU]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers__v3 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs + [0x1dU]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers__v4 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs + [0x1cU]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers__v5 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs + [0x1bU]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers__v6 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs + [0x1aU]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers__v7 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs + [0x19U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers__v8 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs + [0x18U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers__v9 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs + [0x17U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers__v10 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs + [0x16U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers__v11 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs + [0x15U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers__v12 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs + [0x14U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers__v13 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs + [0x13U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers__v14 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs + [0x12U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers__v15 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs + [0x11U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers__v16 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs + [0x10U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers__v17 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs + [0xfU]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers__v18 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs + [0xeU]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers__v19 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs + [0xdU]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers__v20 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs + [0xcU]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers__v21 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs + [0xbU]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers__v22 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs + [0xaU]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers__v23 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs + [9U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers__v24 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs + [8U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers__v25 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs + [7U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers__v26 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs + [6U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers__v27 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs + [5U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers__v28 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs + [4U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers__v29 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs + [3U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers__v30 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs + [2U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers__v31 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs + [1U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers__v32 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs + [0U]; + } + } + // ALWAYS at VX_register_file_slave.v:44 + if (((((0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) + & (0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd))) + & vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid + [3U]) & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_clone)))) { + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v0 + = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data + [3U]; + __Vdlyvset__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v0 = 1U; + __Vdlyvdim0__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v0 + = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd; + } else { + if (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_clone) + & ((3U == vlTOPp->Vortex__DOT__vx_decode__DOT__rd1_register + [0U]) & (1U == (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__state_stall))))) { + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v1 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs + [0x1fU]; + __Vdlyvset__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v1 = 1U; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v2 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs + [0x1eU]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v3 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs + [0x1dU]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v4 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs + [0x1cU]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v5 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs + [0x1bU]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v6 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs + [0x1aU]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v7 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs + [0x19U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v8 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs + [0x18U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v9 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs + [0x17U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v10 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs + [0x16U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v11 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs + [0x15U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v12 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs + [0x14U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v13 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs + [0x13U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v14 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs + [0x12U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v15 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs + [0x11U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v16 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs + [0x10U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v17 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs + [0xfU]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v18 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs + [0xeU]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v19 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs + [0xdU]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v20 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs + [0xcU]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v21 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs + [0xbU]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v22 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs + [0xaU]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v23 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs + [9U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v24 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs + [8U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v25 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs + [7U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v26 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs + [6U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v27 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs + [5U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v28 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs + [4U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v29 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs + [3U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v30 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs + [2U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v31 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs + [1U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v32 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs + [0U]; + } + } + // ALWAYS at VX_register_file_slave.v:44 + if (((((0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) + & (0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd))) + & vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid + [2U]) & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_clone)))) { + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v0 + = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data + [2U]; + __Vdlyvset__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v0 = 1U; + __Vdlyvdim0__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v0 + = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd; + } else { + if (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_clone) + & ((2U == vlTOPp->Vortex__DOT__vx_decode__DOT__rd1_register + [0U]) & (1U == (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__state_stall))))) { + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v1 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs + [0x1fU]; + __Vdlyvset__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v1 = 1U; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v2 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs + [0x1eU]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v3 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs + [0x1dU]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v4 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs + [0x1cU]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v5 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs + [0x1bU]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v6 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs + [0x1aU]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v7 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs + [0x19U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v8 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs + [0x18U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v9 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs + [0x17U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v10 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs + [0x16U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v11 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs + [0x15U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v12 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs + [0x14U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v13 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs + [0x13U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v14 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs + [0x12U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v15 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs + [0x11U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v16 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs + [0x10U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v17 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs + [0xfU]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v18 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs + [0xeU]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v19 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs + [0xdU]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v20 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs + [0xcU]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v21 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs + [0xbU]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v22 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs + [0xaU]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v23 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs + [9U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v24 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs + [8U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v25 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs + [7U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v26 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs + [6U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v27 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs + [5U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v28 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs + [4U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v29 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs + [3U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v30 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs + [2U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v31 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs + [1U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v32 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs + [0U]; + } + } + // ALWAYS at VX_register_file_slave.v:44 + if (((((0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) + & (0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd))) + & vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid + [1U]) & (~ (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_clone)))) { + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0 + = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data + [1U]; + __Vdlyvset__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0 = 1U; + __Vdlyvdim0__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0 + = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd; + } else { + if (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_clone) + & ((1U == vlTOPp->Vortex__DOT__vx_decode__DOT__rd1_register + [0U]) & (1U == (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__state_stall))))) { + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v1 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs + [0x1fU]; + __Vdlyvset__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v1 = 1U; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v2 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs + [0x1eU]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v3 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs + [0x1dU]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v4 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs + [0x1cU]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v5 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs + [0x1bU]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v6 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs + [0x1aU]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v7 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs + [0x19U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v8 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs + [0x18U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v9 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs + [0x17U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v10 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs + [0x16U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v11 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs + [0x15U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v12 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs + [0x14U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v13 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs + [0x13U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v14 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs + [0x12U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v15 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs + [0x11U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v16 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs + [0x10U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v17 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs + [0xfU]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v18 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs + [0xeU]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v19 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs + [0xdU]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v20 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs + [0xcU]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v21 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs + [0xbU]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v22 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs + [0xaU]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v23 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs + [9U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v24 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs + [8U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v25 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs + [7U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v26 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs + [6U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v27 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs + [5U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v28 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs + [4U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v29 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs + [3U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v30 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs + [2U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v31 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs + [1U]; + __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v32 + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs [0U]; } } // ALWAYS at VX_d_e_reg.v:139 + __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__a_reg_data__v0 + = ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling) + ? vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__reg_data_z + [7U] : vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_a_reg_data + [7U]); + __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__a_reg_data__v1 + = ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling) + ? vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__reg_data_z + [6U] : vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_a_reg_data + [6U]); + __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__a_reg_data__v2 + = ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling) + ? vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__reg_data_z + [5U] : vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_a_reg_data + [5U]); + __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__a_reg_data__v3 + = ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling) + ? vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__reg_data_z + [4U] : vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_a_reg_data + [4U]); + __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__a_reg_data__v4 + = ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling) + ? vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__reg_data_z + [3U] : vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_a_reg_data + [3U]); + __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__a_reg_data__v5 + = ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling) + ? vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__reg_data_z + [2U] : vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_a_reg_data + [2U]); + __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__a_reg_data__v6 + = ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling) + ? vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__reg_data_z + [1U] : vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_a_reg_data + [1U]); + __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__a_reg_data__v7 + = ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling) + ? vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__reg_data_z + [0U] : vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_a_reg_data + [0U]); + // ALWAYS at VX_d_e_reg.v:139 __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__b_reg_data__v0 + = ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling) + ? vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__reg_data_z + [7U] : vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_b_reg_data + [7U]); + __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__b_reg_data__v1 + = ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling) + ? vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__reg_data_z + [6U] : vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_b_reg_data + [6U]); + __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__b_reg_data__v2 + = ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling) + ? vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__reg_data_z + [5U] : vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_b_reg_data + [5U]); + __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__b_reg_data__v3 = ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling) ? vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__reg_data_z [4U] : vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_b_reg_data [4U]); - __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__b_reg_data__v1 + __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__b_reg_data__v4 = ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling) ? vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__reg_data_z [3U] : vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_b_reg_data [3U]); - __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__b_reg_data__v2 + __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__b_reg_data__v5 = ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling) ? vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__reg_data_z [2U] : vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_b_reg_data [2U]); - __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__b_reg_data__v3 + __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__b_reg_data__v6 = ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling) ? vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__reg_data_z [1U] : vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_b_reg_data [1U]); - __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__b_reg_data__v4 + __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__b_reg_data__v7 = ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling) ? vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__reg_data_z [0U] : vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_b_reg_data [0U]); // ALWAYSPOST at VX_m_w_reg.v:69 - vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__valid[4U] + vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__valid[7U] = __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__valid__v0; - vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__valid[3U] + vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__valid[6U] = __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__valid__v1; - vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__valid[2U] + vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__valid[5U] = __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__valid__v2; - vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__valid[1U] + vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__valid[4U] = __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__valid__v3; - vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__valid[0U] + vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__valid[3U] = __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__valid__v4; - vlTOPp->Vortex__DOT__vx_decode__DOT__state_stall - = __Vdly__Vortex__DOT__vx_decode__DOT__state_stall; + vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__valid[2U] + = __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__valid__v5; + vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__valid[1U] + = __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__valid__v6; + vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__valid[0U] + = __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__valid__v7; // ALWAYSPOST at VX_e_m_reg.v:137 - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__b_reg_data[4U] + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__b_reg_data[7U] = __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__b_reg_data__v0; - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__b_reg_data[3U] + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__b_reg_data[6U] = __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__b_reg_data__v1; - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__b_reg_data[2U] + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__b_reg_data[5U] = __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__b_reg_data__v2; - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__b_reg_data[1U] + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__b_reg_data[4U] = __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__b_reg_data__v3; - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__b_reg_data[0U] + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__b_reg_data[3U] = __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__b_reg_data__v4; + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__b_reg_data[2U] + = __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__b_reg_data__v5; + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__b_reg_data[1U] + = __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__b_reg_data__v6; + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__b_reg_data[0U] + = __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__b_reg_data__v7; // ALWAYSPOST at VX_e_m_reg.v:146 - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__valid[4U] + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__valid[7U] = __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__valid__v0; - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__valid[3U] + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__valid[6U] = __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__valid__v1; - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__valid[2U] + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__valid[5U] = __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__valid__v2; - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__valid[1U] + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__valid[4U] = __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__valid__v3; - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__valid[0U] + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__valid[3U] = __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__valid__v4; + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__valid[2U] + = __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__valid__v5; + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__valid[1U] + = __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__valid__v6; + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__valid[0U] + = __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__valid__v7; // ALWAYSPOST at VX_m_w_reg.v:63 - vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__mem_result[4U] + vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__mem_result[7U] = __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__mem_result__v0; - vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__mem_result[3U] + vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__mem_result[6U] = __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__mem_result__v1; - vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__mem_result[2U] + vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__mem_result[5U] = __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__mem_result__v2; - vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__mem_result[1U] + vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__mem_result[4U] = __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__mem_result__v3; - vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__mem_result[0U] + vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__mem_result[3U] = __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__mem_result__v4; + vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__mem_result[2U] + = __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__mem_result__v5; + vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__mem_result[1U] + = __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__mem_result__v6; + vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__mem_result[0U] + = __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__mem_result__v7; // ALWAYSPOST at VX_m_w_reg.v:62 - vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__alu_result[4U] + vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__alu_result[7U] = __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__alu_result__v0; - vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__alu_result[3U] + vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__alu_result[6U] = __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__alu_result__v1; - vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__alu_result[2U] + vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__alu_result[5U] = __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__alu_result__v2; - vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__alu_result[1U] + vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__alu_result[4U] = __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__alu_result__v3; - vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__alu_result[0U] + vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__alu_result[3U] = __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__alu_result__v4; + vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__alu_result[2U] + = __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__alu_result__v5; + vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__alu_result[1U] + = __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__alu_result__v6; + vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__alu_result[0U] + = __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__alu_result__v7; // ALWAYSPOST at VX_e_m_reg.v:128 - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__alu_result[4U] + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__alu_result[7U] = __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__alu_result__v0; - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__alu_result[3U] + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__alu_result[6U] = __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__alu_result__v1; - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__alu_result[2U] + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__alu_result[5U] = __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__alu_result__v2; - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__alu_result[1U] + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__alu_result[4U] = __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__alu_result__v3; - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__alu_result[0U] + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__alu_result[3U] = __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__alu_result__v4; + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__alu_result[2U] + = __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__alu_result__v5; + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__alu_result[1U] + = __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__alu_result__v6; + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__alu_result[0U] + = __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__alu_result__v7; // ALWAYSPOST at VX_d_e_reg.v:161 - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__valid[4U] + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__valid[7U] = __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__valid__v0; - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__valid[3U] + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__valid[6U] = __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__valid__v1; - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__valid[2U] + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__valid[5U] = __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__valid__v2; - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__valid[1U] + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__valid[4U] = __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__valid__v3; - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__valid[0U] + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__valid[3U] = __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__valid__v4; + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__valid[2U] + = __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__valid__v5; + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__valid[1U] + = __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__valid__v6; + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__valid[0U] + = __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__valid__v7; // ALWAYSPOST at VX_register_file.v:42 if (__Vdlyvset__Vortex__DOT__vx_decode__DOT__vx_register_file_master__DOT__registers__v0) { vlTOPp->Vortex__DOT__vx_decode__DOT__vx_register_file_master__DOT__registers[__Vdlyvdim0__Vortex__DOT__vx_decode__DOT__vx_register_file_master__DOT__registers__v0] = __Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_master__DOT__registers__v0; } - // ALWAYSPOST at VX_d_e_reg.v:144 - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__a_reg_data[4U] - = __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__a_reg_data__v0; - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__a_reg_data[3U] - = __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__a_reg_data__v1; - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__a_reg_data[2U] - = __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__a_reg_data__v2; - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__a_reg_data[1U] - = __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__a_reg_data__v3; - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__a_reg_data[0U] - = __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__a_reg_data__v4; // ALWAYSPOST at VX_csr_handler.v:45 if (__Vdlyvset__Vortex__DOT__vx_csr_handler__DOT__csr__v0) { vlTOPp->Vortex__DOT__vx_csr_handler__DOT__csr[__Vdlyvdim0__Vortex__DOT__vx_csr_handler__DOT__csr__v0] = __Vdlyvval__Vortex__DOT__vx_csr_handler__DOT__csr__v0; } // ALWAYSPOST at VX_register_file_slave.v:47 - if (__Vdlyvset__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v0) { - vlTOPp->Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers[__Vdlyvdim0__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v0] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v0; + if (__Vdlyvset__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers__v0) { + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers[__Vdlyvdim0__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers__v0] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers__v0; } - if (__Vdlyvset__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v1) { - vlTOPp->Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers[0x1fU] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v1; - vlTOPp->Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers[0x1eU] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v2; - vlTOPp->Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers[0x1dU] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v3; - vlTOPp->Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers[0x1cU] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v4; - vlTOPp->Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers[0x1bU] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v5; - vlTOPp->Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers[0x1aU] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v6; - vlTOPp->Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers[0x19U] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v7; - vlTOPp->Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers[0x18U] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v8; - vlTOPp->Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers[0x17U] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v9; - vlTOPp->Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers[0x16U] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v10; - vlTOPp->Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers[0x15U] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v11; - vlTOPp->Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers[0x14U] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v12; - vlTOPp->Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers[0x13U] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v13; - vlTOPp->Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers[0x12U] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v14; - vlTOPp->Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers[0x11U] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v15; - vlTOPp->Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers[0x10U] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v16; - vlTOPp->Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers[0xfU] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v17; - vlTOPp->Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers[0xeU] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v18; - vlTOPp->Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers[0xdU] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v19; - vlTOPp->Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers[0xcU] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v20; - vlTOPp->Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers[0xbU] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v21; - vlTOPp->Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers[0xaU] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v22; - vlTOPp->Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers[9U] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v23; - vlTOPp->Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers[8U] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v24; - vlTOPp->Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers[7U] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v25; - vlTOPp->Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers[6U] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v26; - vlTOPp->Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers[5U] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v27; - vlTOPp->Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers[4U] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v28; - vlTOPp->Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers[3U] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v29; - vlTOPp->Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers[2U] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v30; - vlTOPp->Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers[1U] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v31; - vlTOPp->Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers[0U] - = __Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers__v32; + if (__Vdlyvset__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers__v1) { + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers[0x1fU] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers__v1; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers[0x1eU] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers__v2; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers[0x1dU] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers__v3; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers[0x1cU] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers__v4; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers[0x1bU] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers__v5; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers[0x1aU] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers__v6; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers[0x19U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers__v7; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers[0x18U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers__v8; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers[0x17U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers__v9; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers[0x16U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers__v10; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers[0x15U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers__v11; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers[0x14U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers__v12; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers[0x13U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers__v13; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers[0x12U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers__v14; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers[0x11U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers__v15; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers[0x10U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers__v16; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers[0xfU] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers__v17; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers[0xeU] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers__v18; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers[0xdU] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers__v19; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers[0xcU] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers__v20; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers[0xbU] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers__v21; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers[0xaU] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers__v22; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers[9U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers__v23; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers[8U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers__v24; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers[7U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers__v25; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers[6U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers__v26; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers[5U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers__v27; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers[4U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers__v28; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers[3U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers__v29; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers[2U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers__v30; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers[1U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers__v31; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers[0U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers__v32; } + // ALWAYSPOST at VX_register_file_slave.v:47 + if (__Vdlyvset__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers__v0) { + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers[__Vdlyvdim0__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers__v0] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers__v0; + } + if (__Vdlyvset__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers__v1) { + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers[0x1fU] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers__v1; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers[0x1eU] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers__v2; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers[0x1dU] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers__v3; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers[0x1cU] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers__v4; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers[0x1bU] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers__v5; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers[0x1aU] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers__v6; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers[0x19U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers__v7; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers[0x18U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers__v8; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers[0x17U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers__v9; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers[0x16U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers__v10; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers[0x15U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers__v11; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers[0x14U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers__v12; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers[0x13U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers__v13; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers[0x12U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers__v14; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers[0x11U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers__v15; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers[0x10U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers__v16; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers[0xfU] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers__v17; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers[0xeU] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers__v18; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers[0xdU] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers__v19; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers[0xcU] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers__v20; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers[0xbU] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers__v21; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers[0xaU] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers__v22; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers[9U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers__v23; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers[8U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers__v24; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers[7U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers__v25; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers[6U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers__v26; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers[5U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers__v27; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers[4U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers__v28; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers[3U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers__v29; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers[2U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers__v30; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers[1U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers__v31; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers[0U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers__v32; + } + // ALWAYSPOST at VX_register_file_slave.v:47 + if (__Vdlyvset__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers__v0) { + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers[__Vdlyvdim0__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers__v0] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers__v0; + } + if (__Vdlyvset__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers__v1) { + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers[0x1fU] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers__v1; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers[0x1eU] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers__v2; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers[0x1dU] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers__v3; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers[0x1cU] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers__v4; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers[0x1bU] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers__v5; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers[0x1aU] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers__v6; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers[0x19U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers__v7; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers[0x18U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers__v8; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers[0x17U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers__v9; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers[0x16U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers__v10; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers[0x15U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers__v11; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers[0x14U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers__v12; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers[0x13U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers__v13; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers[0x12U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers__v14; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers[0x11U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers__v15; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers[0x10U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers__v16; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers[0xfU] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers__v17; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers[0xeU] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers__v18; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers[0xdU] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers__v19; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers[0xcU] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers__v20; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers[0xbU] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers__v21; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers[0xaU] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers__v22; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers[9U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers__v23; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers[8U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers__v24; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers[7U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers__v25; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers[6U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers__v26; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers[5U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers__v27; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers[4U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers__v28; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers[3U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers__v29; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers[2U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers__v30; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers[1U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers__v31; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers[0U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers__v32; + } + // ALWAYSPOST at VX_register_file_slave.v:47 + if (__Vdlyvset__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers__v0) { + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers[__Vdlyvdim0__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers__v0] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers__v0; + } + if (__Vdlyvset__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers__v1) { + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers[0x1fU] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers__v1; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers[0x1eU] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers__v2; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers[0x1dU] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers__v3; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers[0x1cU] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers__v4; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers[0x1bU] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers__v5; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers[0x1aU] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers__v6; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers[0x19U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers__v7; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers[0x18U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers__v8; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers[0x17U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers__v9; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers[0x16U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers__v10; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers[0x15U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers__v11; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers[0x14U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers__v12; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers[0x13U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers__v13; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers[0x12U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers__v14; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers[0x11U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers__v15; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers[0x10U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers__v16; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers[0xfU] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers__v17; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers[0xeU] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers__v18; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers[0xdU] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers__v19; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers[0xcU] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers__v20; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers[0xbU] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers__v21; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers[0xaU] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers__v22; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers[9U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers__v23; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers[8U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers__v24; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers[7U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers__v25; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers[6U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers__v26; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers[5U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers__v27; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers[4U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers__v28; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers[3U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers__v29; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers[2U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers__v30; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers[1U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers__v31; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers[0U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers__v32; + } + // ALWAYSPOST at VX_register_file_slave.v:47 + if (__Vdlyvset__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v0) { + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[__Vdlyvdim0__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v0] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v0; + } + if (__Vdlyvset__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v1) { + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1fU] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v1; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1eU] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v2; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1dU] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v3; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1cU] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v4; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1bU] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v5; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x1aU] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v6; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x19U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v7; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x18U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v8; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x17U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v9; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x16U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v10; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x15U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v11; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x14U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v12; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x13U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v13; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x12U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v14; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x11U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v15; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0x10U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v16; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xfU] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v17; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xeU] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v18; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xdU] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v19; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xcU] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v20; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xbU] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v21; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0xaU] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v22; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[9U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v23; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[8U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v24; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[7U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v25; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[6U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v26; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[5U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v27; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[4U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v28; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[3U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v29; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[2U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v30; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[1U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v31; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[0U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers__v32; + } + // ALWAYSPOST at VX_register_file_slave.v:47 + if (__Vdlyvset__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v0) { + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[__Vdlyvdim0__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v0] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v0; + } + if (__Vdlyvset__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v1) { + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1fU] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v1; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1eU] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v2; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1dU] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v3; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1cU] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v4; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1bU] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v5; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x1aU] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v6; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x19U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v7; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x18U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v8; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x17U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v9; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x16U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v10; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x15U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v11; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x14U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v12; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x13U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v13; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x12U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v14; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x11U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v15; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0x10U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v16; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xfU] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v17; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xeU] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v18; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xdU] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v19; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xcU] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v20; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xbU] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v21; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0xaU] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v22; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[9U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v23; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[8U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v24; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[7U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v25; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[6U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v26; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[5U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v27; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[4U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v28; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[3U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v29; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[2U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v30; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[1U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v31; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[0U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers__v32; + } + // ALWAYSPOST at VX_register_file_slave.v:47 + if (__Vdlyvset__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0) { + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[__Vdlyvdim0__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v0; + } + if (__Vdlyvset__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v1) { + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1fU] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v1; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1eU] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v2; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1dU] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v3; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1cU] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v4; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1bU] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v5; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x1aU] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v6; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x19U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v7; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x18U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v8; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x17U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v9; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x16U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v10; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x15U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v11; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x14U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v12; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x13U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v13; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x12U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v14; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x11U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v15; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0x10U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v16; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xfU] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v17; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xeU] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v18; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xdU] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v19; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xcU] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v20; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xbU] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v21; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0xaU] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v22; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[9U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v23; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[8U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v24; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[7U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v25; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[6U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v26; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[5U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v27; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[4U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v28; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[3U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v29; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[2U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v30; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[1U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v31; + vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[0U] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers__v32; + } + vlTOPp->Vortex__DOT__vx_decode__DOT__state_stall + = __Vdly__Vortex__DOT__vx_decode__DOT__state_stall; + // ALWAYSPOST at VX_d_e_reg.v:144 + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__a_reg_data[7U] + = __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__a_reg_data__v0; + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__a_reg_data[6U] + = __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__a_reg_data__v1; + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__a_reg_data[5U] + = __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__a_reg_data__v2; + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__a_reg_data[4U] + = __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__a_reg_data__v3; + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__a_reg_data[3U] + = __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__a_reg_data__v4; + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__a_reg_data[2U] + = __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__a_reg_data__v5; + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__a_reg_data[1U] + = __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__a_reg_data__v6; + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__a_reg_data[0U] + = __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__a_reg_data__v7; // ALWAYSPOST at VX_d_e_reg.v:145 - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__b_reg_data[4U] + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__b_reg_data[7U] = __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__b_reg_data__v0; - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__b_reg_data[3U] + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__b_reg_data[6U] = __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__b_reg_data__v1; - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__b_reg_data[2U] + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__b_reg_data[5U] = __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__b_reg_data__v2; - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__b_reg_data[1U] + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__b_reg_data[4U] = __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__b_reg_data__v3; - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__b_reg_data[0U] + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__b_reg_data[3U] = __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__b_reg_data__v4; + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__b_reg_data[2U] + = __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__b_reg_data__v5; + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__b_reg_data[1U] + = __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__b_reg_data__v6; + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__b_reg_data[0U] + = __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__b_reg_data__v7; + vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_valid[7U] + = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__valid + [7U]; + vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_valid[6U] + = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__valid + [6U]; + vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_valid[5U] + = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__valid + [5U]; vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_valid[4U] = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__valid [4U]; @@ -1974,6 +4213,15 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_valid[0U] = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__valid [0U]; + vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_b_reg_data[7U] + = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__b_reg_data + [7U]; + vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_b_reg_data[6U] + = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__b_reg_data + [6U]; + vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_b_reg_data[5U] + = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__b_reg_data + [5U]; vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_b_reg_data[4U] = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__b_reg_data [4U]; @@ -1989,6 +4237,15 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_b_reg_data[0U] = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__b_reg_data [0U]; + vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_valid[7U] + = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__valid + [7U]; + vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_valid[6U] + = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__valid + [6U]; + vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_valid[5U] + = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__valid + [5U]; vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_valid[4U] = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__valid [4U]; @@ -2004,6 +4261,15 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_valid[0U] = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__valid [0U]; + vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_mem_result[7U] + = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__mem_result + [7U]; + vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_mem_result[6U] + = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__mem_result + [6U]; + vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_mem_result[5U] + = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__mem_result + [5U]; vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_mem_result[4U] = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__mem_result [4U]; @@ -2019,6 +4285,15 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_mem_result[0U] = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__mem_result [0U]; + vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_alu_result[7U] + = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__alu_result + [7U]; + vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_alu_result[6U] + = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__alu_result + [6U]; + vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_alu_result[5U] + = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__alu_result + [5U]; vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_alu_result[4U] = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__alu_result [4U]; @@ -2034,6 +4309,15 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_alu_result[0U] = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__alu_result [0U]; + vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_alu_result[7U] + = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__alu_result + [7U]; + vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_alu_result[6U] + = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__alu_result + [6U]; + vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_alu_result[5U] + = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__alu_result + [5U]; vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_alu_result[4U] = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__alu_result [4U]; @@ -2050,12 +4334,21 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__alu_result [0U]; // ALWAYS at VX_d_e_reg.v:139 + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__jal = ((~ (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling)) + & (IData)(vlTOPp->Vortex__DOT__decode_jal)); + // ALWAYS at VX_d_e_reg.v:139 vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__branch_type = ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling) ? 0U : (IData)(vlTOPp->Vortex__DOT__decode_branch_type)); - // ALWAYS at VX_d_e_reg.v:139 - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__jal = ((~ (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling)) - & (IData)(vlTOPp->Vortex__DOT__decode_jal)); + vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_valid[7U] + = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__valid + [7U]; + vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_valid[6U] + = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__valid + [6U]; + vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_valid[5U] + = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__valid + [5U]; vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_valid[4U] = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__valid [4U]; @@ -2114,6 +4407,12 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__PC_next; vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next[4U] = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__PC_next; + vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next[5U] + = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__PC_next; + vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next[6U] + = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__PC_next; + vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next[7U] + = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__PC_next; // ALWAYS at VX_e_m_reg.v:126 vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__PC_next = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__PC_next_out; vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__vx_register_file_master__out_regs[0x1fU] @@ -2212,21 +4511,6 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__vx_register_file_master__out_regs[0U] = vlTOPp->Vortex__DOT__vx_decode__DOT__vx_register_file_master__DOT__registers [0U]; - vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_a_reg_data[4U] - = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__a_reg_data - [4U]; - vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_a_reg_data[3U] - = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__a_reg_data - [3U]; - vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_a_reg_data[2U] - = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__a_reg_data - [2U]; - vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_a_reg_data[1U] - = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__a_reg_data - [1U]; - vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_a_reg_data[0U] - = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__a_reg_data - [0U]; // ALWAYS at VX_e_m_reg.v:126 vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__is_csr = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__is_csr; // ALWAYS at VX_e_m_reg.v:126 @@ -2247,6 +4531,39 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__rd; // ALWAYS at VX_m_w_reg.v:60 vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb; + vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_a_reg_data[7U] + = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__a_reg_data + [7U]; + vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_a_reg_data[6U] + = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__a_reg_data + [6U]; + vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_a_reg_data[5U] + = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__a_reg_data + [5U]; + vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_a_reg_data[4U] + = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__a_reg_data + [4U]; + vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_a_reg_data[3U] + = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__a_reg_data + [3U]; + vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_a_reg_data[2U] + = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__a_reg_data + [2U]; + vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_a_reg_data[1U] + = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__a_reg_data + [1U]; + vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_a_reg_data[0U] + = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__a_reg_data + [0U]; + vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_b_reg_data[7U] + = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__b_reg_data + [7U]; + vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_b_reg_data[6U] + = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__b_reg_data + [6U]; + vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_b_reg_data[5U] + = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__b_reg_data + [5U]; vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_b_reg_data[4U] = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__b_reg_data [4U]; @@ -2262,6 +4579,12 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_b_reg_data[0U] = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__b_reg_data [0U]; + vlTOPp->Vortex__DOT__m_w_valid[7U] = vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_valid + [7U]; + vlTOPp->Vortex__DOT__m_w_valid[6U] = vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_valid + [6U]; + vlTOPp->Vortex__DOT__m_w_valid[5U] = vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_valid + [5U]; vlTOPp->Vortex__DOT__m_w_valid[4U] = vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_valid [4U]; vlTOPp->Vortex__DOT__m_w_valid[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_valid @@ -2272,6 +4595,12 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) [1U]; vlTOPp->Vortex__DOT__m_w_valid[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_valid [0U]; + vlTOPp->Vortex__DOT__e_m_b_reg_data[7U] = vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_b_reg_data + [7U]; + vlTOPp->Vortex__DOT__e_m_b_reg_data[6U] = vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_b_reg_data + [6U]; + vlTOPp->Vortex__DOT__e_m_b_reg_data[5U] = vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_b_reg_data + [5U]; vlTOPp->Vortex__DOT__e_m_b_reg_data[4U] = vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_b_reg_data [4U]; vlTOPp->Vortex__DOT__e_m_b_reg_data[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_b_reg_data @@ -2282,6 +4611,12 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) [1U]; vlTOPp->Vortex__DOT__e_m_b_reg_data[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_b_reg_data [0U]; + vlTOPp->Vortex__DOT__e_m_valid[7U] = vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_valid + [7U]; + vlTOPp->Vortex__DOT__e_m_valid[6U] = vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_valid + [6U]; + vlTOPp->Vortex__DOT__e_m_valid[5U] = vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_valid + [5U]; vlTOPp->Vortex__DOT__e_m_valid[4U] = vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_valid [4U]; vlTOPp->Vortex__DOT__e_m_valid[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_valid @@ -2292,6 +4627,12 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) [1U]; vlTOPp->Vortex__DOT__e_m_valid[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_valid [0U]; + vlTOPp->Vortex__DOT__m_w_mem_result[7U] = vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_mem_result + [7U]; + vlTOPp->Vortex__DOT__m_w_mem_result[6U] = vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_mem_result + [6U]; + vlTOPp->Vortex__DOT__m_w_mem_result[5U] = vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_mem_result + [5U]; vlTOPp->Vortex__DOT__m_w_mem_result[4U] = vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_mem_result [4U]; vlTOPp->Vortex__DOT__m_w_mem_result[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_mem_result @@ -2302,6 +4643,12 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) [1U]; vlTOPp->Vortex__DOT__m_w_mem_result[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_mem_result [0U]; + vlTOPp->Vortex__DOT__m_w_alu_result[7U] = vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_alu_result + [7U]; + vlTOPp->Vortex__DOT__m_w_alu_result[6U] = vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_alu_result + [6U]; + vlTOPp->Vortex__DOT__m_w_alu_result[5U] = vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_alu_result + [5U]; vlTOPp->Vortex__DOT__m_w_alu_result[4U] = vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_alu_result [4U]; vlTOPp->Vortex__DOT__m_w_alu_result[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_alu_result @@ -2312,6 +4659,12 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) [1U]; vlTOPp->Vortex__DOT__m_w_alu_result[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_alu_result [0U]; + vlTOPp->Vortex__DOT__e_m_alu_result[7U] = vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_alu_result + [7U]; + vlTOPp->Vortex__DOT__e_m_alu_result[6U] = vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_alu_result + [6U]; + vlTOPp->Vortex__DOT__e_m_alu_result[5U] = vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_alu_result + [5U]; vlTOPp->Vortex__DOT__e_m_alu_result[4U] = vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_alu_result [4U]; vlTOPp->Vortex__DOT__e_m_alu_result[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_alu_result @@ -2322,6 +4675,12 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) [1U]; vlTOPp->Vortex__DOT__e_m_alu_result[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_alu_result [0U]; + vlTOPp->Vortex__DOT__d_e_valid[7U] = vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_valid + [7U]; + vlTOPp->Vortex__DOT__d_e_valid[6U] = vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_valid + [6U]; + vlTOPp->Vortex__DOT__d_e_valid[5U] = vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_valid + [5U]; vlTOPp->Vortex__DOT__d_e_valid[4U] = vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_valid [4U]; vlTOPp->Vortex__DOT__d_e_valid[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_valid @@ -2428,16 +4787,6 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters[0U] = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__vx_register_file_master__out_regs [0U]; - vlTOPp->Vortex__DOT__d_e_a_reg_data[4U] = vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_a_reg_data - [4U]; - vlTOPp->Vortex__DOT__d_e_a_reg_data[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_a_reg_data - [3U]; - vlTOPp->Vortex__DOT__d_e_a_reg_data[2U] = vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_a_reg_data - [2U]; - vlTOPp->Vortex__DOT__d_e_a_reg_data[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_a_reg_data - [1U]; - vlTOPp->Vortex__DOT__d_e_a_reg_data[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_a_reg_data - [0U]; vlTOPp->Vortex__DOT__csr_decode_csr_data = ((0xc00U == (IData)(vlTOPp->Vortex__DOT__vx_csr_handler__DOT__decode_csr_address)) ? (IData)(vlTOPp->Vortex__DOT__vx_csr_handler__DOT__cycle) @@ -2460,6 +4809,28 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) : vlTOPp->Vortex__DOT__vx_csr_handler__DOT__csr [vlTOPp->Vortex__DOT__vx_csr_handler__DOT__decode_csr_address])))); + vlTOPp->Vortex__DOT__d_e_a_reg_data[7U] = vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_a_reg_data + [7U]; + vlTOPp->Vortex__DOT__d_e_a_reg_data[6U] = vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_a_reg_data + [6U]; + vlTOPp->Vortex__DOT__d_e_a_reg_data[5U] = vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_a_reg_data + [5U]; + vlTOPp->Vortex__DOT__d_e_a_reg_data[4U] = vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_a_reg_data + [4U]; + vlTOPp->Vortex__DOT__d_e_a_reg_data[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_a_reg_data + [3U]; + vlTOPp->Vortex__DOT__d_e_a_reg_data[2U] = vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_a_reg_data + [2U]; + vlTOPp->Vortex__DOT__d_e_a_reg_data[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_a_reg_data + [1U]; + vlTOPp->Vortex__DOT__d_e_a_reg_data[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_a_reg_data + [0U]; + vlTOPp->Vortex__DOT__d_e_b_reg_data[7U] = vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_b_reg_data + [7U]; + vlTOPp->Vortex__DOT__d_e_b_reg_data[6U] = vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_b_reg_data + [6U]; + vlTOPp->Vortex__DOT__d_e_b_reg_data[5U] = vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_b_reg_data + [5U]; vlTOPp->Vortex__DOT__d_e_b_reg_data[4U] = vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_b_reg_data [4U]; vlTOPp->Vortex__DOT__d_e_b_reg_data[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_b_reg_data @@ -2470,6 +4841,12 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) [1U]; vlTOPp->Vortex__DOT__d_e_b_reg_data[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_b_reg_data [0U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid[7U] + = vlTOPp->Vortex__DOT__m_w_valid[7U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid[6U] + = vlTOPp->Vortex__DOT__m_w_valid[6U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid[5U] + = vlTOPp->Vortex__DOT__m_w_valid[5U]; vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid[4U] = vlTOPp->Vortex__DOT__m_w_valid[4U]; vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid[3U] @@ -2480,16 +4857,12 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) = vlTOPp->Vortex__DOT__m_w_valid[1U]; vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid[0U] = vlTOPp->Vortex__DOT__m_w_valid[0U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_valid[4U] - = vlTOPp->Vortex__DOT__m_w_valid[4U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_valid[3U] - = vlTOPp->Vortex__DOT__m_w_valid[3U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_valid[2U] - = vlTOPp->Vortex__DOT__m_w_valid[2U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_valid[1U] - = vlTOPp->Vortex__DOT__m_w_valid[1U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_valid[0U] - = vlTOPp->Vortex__DOT__m_w_valid[0U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_rd2[7U] + = vlTOPp->Vortex__DOT__e_m_b_reg_data[7U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_rd2[6U] + = vlTOPp->Vortex__DOT__e_m_b_reg_data[6U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_rd2[5U] + = vlTOPp->Vortex__DOT__e_m_b_reg_data[5U]; vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_rd2[4U] = vlTOPp->Vortex__DOT__e_m_b_reg_data[4U]; vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_rd2[3U] @@ -2500,6 +4873,12 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) = vlTOPp->Vortex__DOT__e_m_b_reg_data[1U]; vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_rd2[0U] = vlTOPp->Vortex__DOT__e_m_b_reg_data[0U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_valid[7U] + = vlTOPp->Vortex__DOT__e_m_valid[7U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_valid[6U] + = vlTOPp->Vortex__DOT__e_m_valid[6U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_valid[5U] + = vlTOPp->Vortex__DOT__e_m_valid[5U]; vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_valid[4U] = vlTOPp->Vortex__DOT__e_m_valid[4U]; vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_valid[3U] @@ -2510,6 +4889,12 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) = vlTOPp->Vortex__DOT__e_m_valid[1U]; vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_valid[0U] = vlTOPp->Vortex__DOT__e_m_valid[0U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_mem_result[7U] + = vlTOPp->Vortex__DOT__m_w_mem_result[7U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_mem_result[6U] + = vlTOPp->Vortex__DOT__m_w_mem_result[6U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_mem_result[5U] + = vlTOPp->Vortex__DOT__m_w_mem_result[5U]; vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_mem_result[4U] = vlTOPp->Vortex__DOT__m_w_mem_result[4U]; vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_mem_result[3U] @@ -2520,6 +4905,12 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) = vlTOPp->Vortex__DOT__m_w_mem_result[1U]; vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_mem_result[0U] = vlTOPp->Vortex__DOT__m_w_mem_result[0U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_mem_data[7U] + = vlTOPp->Vortex__DOT__m_w_mem_result[7U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_mem_data[6U] + = vlTOPp->Vortex__DOT__m_w_mem_result[6U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_mem_data[5U] + = vlTOPp->Vortex__DOT__m_w_mem_result[5U]; vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_mem_data[4U] = vlTOPp->Vortex__DOT__m_w_mem_result[4U]; vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_mem_data[3U] @@ -2530,6 +4921,12 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) = vlTOPp->Vortex__DOT__m_w_mem_result[1U]; vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_mem_data[0U] = vlTOPp->Vortex__DOT__m_w_mem_result[0U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_alu_result[7U] + = vlTOPp->Vortex__DOT__m_w_alu_result[7U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_alu_result[6U] + = vlTOPp->Vortex__DOT__m_w_alu_result[6U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_alu_result[5U] + = vlTOPp->Vortex__DOT__m_w_alu_result[5U]; vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_alu_result[4U] = vlTOPp->Vortex__DOT__m_w_alu_result[4U]; vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_alu_result[3U] @@ -2540,6 +4937,12 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) = vlTOPp->Vortex__DOT__m_w_alu_result[1U]; vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_alu_result[0U] = vlTOPp->Vortex__DOT__m_w_alu_result[0U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_alu_result[7U] + = vlTOPp->Vortex__DOT__m_w_alu_result[7U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_alu_result[6U] + = vlTOPp->Vortex__DOT__m_w_alu_result[6U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_alu_result[5U] + = vlTOPp->Vortex__DOT__m_w_alu_result[5U]; vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_alu_result[4U] = vlTOPp->Vortex__DOT__m_w_alu_result[4U]; vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_alu_result[3U] @@ -2550,6 +4953,12 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) = vlTOPp->Vortex__DOT__m_w_alu_result[1U]; vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_alu_result[0U] = vlTOPp->Vortex__DOT__m_w_alu_result[0U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result[7U] + = vlTOPp->Vortex__DOT__e_m_alu_result[7U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result[6U] + = vlTOPp->Vortex__DOT__e_m_alu_result[6U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result[5U] + = vlTOPp->Vortex__DOT__e_m_alu_result[5U]; vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result[4U] = vlTOPp->Vortex__DOT__e_m_alu_result[4U]; vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result[3U] @@ -2563,6 +4972,12 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) vlTOPp->Vortex__DOT__execute_branch_stall = ((0U != (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__branch_type)) | (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__jal)); + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_valid[7U] + = vlTOPp->Vortex__DOT__d_e_valid[7U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_valid[6U] + = vlTOPp->Vortex__DOT__d_e_valid[6U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_valid[5U] + = vlTOPp->Vortex__DOT__d_e_valid[5U]; vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_valid[4U] = vlTOPp->Vortex__DOT__d_e_valid[4U]; vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_valid[3U] @@ -2583,116 +4998,688 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__PC_next; vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[4U] = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__PC_next; + vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[5U] + = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__PC_next; + vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[6U] + = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__PC_next; + vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[7U] + = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__PC_next; // ALWAYS at VX_d_e_reg.v:139 vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__PC_next_out = ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling) ? 0U : ((IData)(4U) + vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__curr_PC)); - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs[0x1fU] + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1fU] = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters [0x1fU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs[0x1eU] + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1eU] = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters [0x1eU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs[0x1dU] + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1dU] = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters [0x1dU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs[0x1cU] + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1cU] = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters [0x1cU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs[0x1bU] + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1bU] = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters [0x1bU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs[0x1aU] + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x1aU] = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters [0x1aU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs[0x19U] + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x19U] = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters [0x19U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs[0x18U] + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x18U] = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters [0x18U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs[0x17U] + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x17U] = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters [0x17U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs[0x16U] + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x16U] = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters [0x16U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs[0x15U] + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x15U] = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters [0x15U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs[0x14U] + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x14U] = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters [0x14U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs[0x13U] + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x13U] = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters [0x13U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs[0x12U] + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x12U] = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters [0x12U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs[0x11U] + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x11U] = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters [0x11U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs[0x10U] + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0x10U] = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters [0x10U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs[0xfU] + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xfU] = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters [0xfU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs[0xeU] + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xeU] = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters [0xeU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs[0xdU] + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xdU] = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters [0xdU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs[0xcU] + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xcU] = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters [0xcU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs[0xbU] + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xbU] = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters [0xbU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs[0xaU] + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0xaU] = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters [0xaU]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs[9U] + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[9U] = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters [9U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs[8U] + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[8U] = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters [8U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs[7U] + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[7U] = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters [7U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs[6U] + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[6U] = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters [6U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs[5U] + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[5U] = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters [5U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs[4U] + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[4U] = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters [4U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs[3U] + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[3U] = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters [3U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs[2U] + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[2U] = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters [2U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs[1U] + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[1U] = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters [1U]; - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs[0U] + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[0U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x1fU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x1fU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x1eU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x1eU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x1dU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x1dU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x1cU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x1cU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x1bU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x1bU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x1aU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x1aU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x19U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x19U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x18U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x18U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x17U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x17U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x16U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x16U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x15U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x15U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x14U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x14U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x13U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x13U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x12U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x12U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x11U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x11U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0x10U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x10U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0xfU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0xfU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0xeU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0xeU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0xdU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0xdU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0xcU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0xcU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0xbU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0xbU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0xaU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0xaU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[9U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [9U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[8U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [8U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[7U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [7U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[6U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [6U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[5U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [5U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[4U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [4U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[3U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [3U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[2U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [2U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[1U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [1U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[0U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x1fU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x1fU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x1eU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x1eU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x1dU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x1dU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x1cU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x1cU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x1bU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x1bU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x1aU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x1aU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x19U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x19U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x18U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x18U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x17U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x17U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x16U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x16U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x15U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x15U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x14U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x14U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x13U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x13U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x12U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x12U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x11U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x11U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0x10U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x10U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0xfU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0xfU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0xeU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0xeU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0xdU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0xdU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0xcU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0xcU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0xbU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0xbU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0xaU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0xaU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[9U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [9U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[8U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [8U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[7U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [7U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[6U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [6U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[5U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [5U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[4U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [4U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[3U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [3U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[2U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [2U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[1U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [1U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[0U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs[0x1fU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x1fU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs[0x1eU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x1eU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs[0x1dU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x1dU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs[0x1cU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x1cU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs[0x1bU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x1bU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs[0x1aU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x1aU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs[0x19U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x19U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs[0x18U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x18U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs[0x17U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x17U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs[0x16U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x16U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs[0x15U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x15U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs[0x14U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x14U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs[0x13U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x13U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs[0x12U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x12U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs[0x11U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x11U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs[0x10U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x10U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs[0xfU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0xfU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs[0xeU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0xeU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs[0xdU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0xdU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs[0xcU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0xcU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs[0xbU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0xbU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs[0xaU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0xaU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs[9U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [9U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs[8U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [8U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs[7U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [7U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs[6U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [6U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs[5U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [5U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs[4U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [4U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs[3U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [3U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs[2U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [2U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs[1U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [1U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs[0U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs[0x1fU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x1fU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs[0x1eU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x1eU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs[0x1dU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x1dU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs[0x1cU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x1cU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs[0x1bU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x1bU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs[0x1aU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x1aU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs[0x19U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x19U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs[0x18U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x18U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs[0x17U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x17U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs[0x16U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x16U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs[0x15U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x15U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs[0x14U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x14U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs[0x13U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x13U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs[0x12U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x12U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs[0x11U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x11U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs[0x10U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x10U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs[0xfU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0xfU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs[0xeU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0xeU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs[0xdU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0xdU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs[0xcU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0xcU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs[0xbU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0xbU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs[0xaU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0xaU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs[9U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [9U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs[8U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [8U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs[7U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [7U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs[6U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [6U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs[5U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [5U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs[4U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [4U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs[3U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [3U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs[2U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [2U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs[1U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [1U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs[0U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs[0x1fU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x1fU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs[0x1eU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x1eU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs[0x1dU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x1dU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs[0x1cU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x1cU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs[0x1bU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x1bU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs[0x1aU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x1aU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs[0x19U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x19U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs[0x18U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x18U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs[0x17U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x17U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs[0x16U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x16U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs[0x15U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x15U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs[0x14U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x14U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs[0x13U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x13U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs[0x12U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x12U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs[0x11U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x11U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs[0x10U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x10U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs[0xfU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0xfU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs[0xeU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0xeU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs[0xdU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0xdU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs[0xcU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0xcU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs[0xbU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0xbU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs[0xaU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0xaU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs[9U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [9U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs[8U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [8U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs[7U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [7U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs[6U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [6U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs[5U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [5U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs[4U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [4U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs[3U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [3U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs[2U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [2U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs[1U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [1U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs[0U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs[0x1fU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x1fU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs[0x1eU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x1eU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs[0x1dU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x1dU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs[0x1cU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x1cU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs[0x1bU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x1bU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs[0x1aU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x1aU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs[0x19U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x19U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs[0x18U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x18U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs[0x17U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x17U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs[0x16U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x16U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs[0x15U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x15U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs[0x14U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x14U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs[0x13U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x13U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs[0x12U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x12U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs[0x11U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x11U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs[0x10U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0x10U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs[0xfU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0xfU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs[0xeU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0xeU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs[0xdU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0xdU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs[0xcU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0xcU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs[0xbU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0xbU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs[0xaU] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [0xaU]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs[9U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [9U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs[8U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [8U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs[7U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [7U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs[6U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [6U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs[5U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [5U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs[4U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [4U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs[3U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [3U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs[2U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [2U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs[1U] + = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters + [1U]; + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs[0U] = vlTOPp->Vortex__DOT__vx_decode__DOT__clone_regsiters [0U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data[4U] - = vlTOPp->Vortex__DOT__d_e_a_reg_data[4U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data[3U] - = vlTOPp->Vortex__DOT__d_e_a_reg_data[3U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data[2U] - = vlTOPp->Vortex__DOT__d_e_a_reg_data[2U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data[1U] - = vlTOPp->Vortex__DOT__d_e_a_reg_data[1U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data[0U] - = vlTOPp->Vortex__DOT__d_e_a_reg_data[0U]; // ALWAYS at VX_d_e_reg.v:139 vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__is_csr = ((~ (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling)) @@ -2722,6 +5709,28 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__rd = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rd; // ALWAYS at VX_e_m_reg.v:126 vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb; + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data[7U] + = vlTOPp->Vortex__DOT__d_e_a_reg_data[7U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data[6U] + = vlTOPp->Vortex__DOT__d_e_a_reg_data[6U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data[5U] + = vlTOPp->Vortex__DOT__d_e_a_reg_data[5U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data[4U] + = vlTOPp->Vortex__DOT__d_e_a_reg_data[4U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data[3U] + = vlTOPp->Vortex__DOT__d_e_a_reg_data[3U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data[2U] + = vlTOPp->Vortex__DOT__d_e_a_reg_data[2U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data[1U] + = vlTOPp->Vortex__DOT__d_e_a_reg_data[1U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data[0U] + = vlTOPp->Vortex__DOT__d_e_a_reg_data[0U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_b_reg_data[7U] + = vlTOPp->Vortex__DOT__d_e_b_reg_data[7U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_b_reg_data[6U] + = vlTOPp->Vortex__DOT__d_e_b_reg_data[6U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_b_reg_data[5U] + = vlTOPp->Vortex__DOT__d_e_b_reg_data[5U]; vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_b_reg_data[4U] = vlTOPp->Vortex__DOT__d_e_b_reg_data[4U]; vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_b_reg_data[3U] @@ -2732,6 +5741,15 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) = vlTOPp->Vortex__DOT__d_e_b_reg_data[1U]; vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_b_reg_data[0U] = vlTOPp->Vortex__DOT__d_e_b_reg_data[0U]; + vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data[7U] + = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_rd2 + [7U]; + vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data[6U] + = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_rd2 + [6U]; + vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data[5U] + = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_rd2 + [5U]; vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data[4U] = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_rd2 [4U]; @@ -2747,6 +5765,15 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data[0U] = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_rd2 [0U]; + vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid[7U] + = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_valid + [7U]; + vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid[6U] + = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_valid + [6U]; + vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid[5U] + = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_valid + [5U]; vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid[4U] = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_valid [4U]; @@ -2762,6 +5789,15 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid[0U] = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_valid [0U]; + vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_valid[7U] + = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_valid + [7U]; + vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_valid[6U] + = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_valid + [6U]; + vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_valid[5U] + = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_valid + [5U]; vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_valid[4U] = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_valid [4U]; @@ -2777,6 +5813,27 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_valid[0U] = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_valid [0U]; + vlTOPp->Vortex__DOT____Vcellout__vx_writeback__out_write_data[7U] + = ((3U == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) + ? vlTOPp->Vortex__DOT__vx_writeback__DOT__out_pc_data + [7U] : ((1U == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) + ? vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_alu_result + [7U] : vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_mem_result + [7U])); + vlTOPp->Vortex__DOT____Vcellout__vx_writeback__out_write_data[6U] + = ((3U == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) + ? vlTOPp->Vortex__DOT__vx_writeback__DOT__out_pc_data + [6U] : ((1U == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) + ? vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_alu_result + [6U] : vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_mem_result + [6U])); + vlTOPp->Vortex__DOT____Vcellout__vx_writeback__out_write_data[5U] + = ((3U == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) + ? vlTOPp->Vortex__DOT__vx_writeback__DOT__out_pc_data + [5U] : ((1U == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) + ? vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_alu_result + [5U] : vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_mem_result + [5U])); vlTOPp->Vortex__DOT____Vcellout__vx_writeback__out_write_data[4U] = ((3U == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) ? vlTOPp->Vortex__DOT__vx_writeback__DOT__out_pc_data @@ -2858,6 +5915,15 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) == vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result [0U]))))); + vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address[7U] + = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result + [7U]; + vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address[6U] + = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result + [6U]; + vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address[5U] + = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result + [5U]; vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address[4U] = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result [4U]; @@ -2873,6 +5939,15 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address[0U] = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result [0U]; + vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_alu_result[7U] + = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result + [7U]; + vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_alu_result[6U] + = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result + [6U]; + vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_alu_result[5U] + = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result + [5U]; vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_alu_result[4U] = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result [4U]; @@ -2888,6 +5963,15 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_alu_result[0U] = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result [0U]; + vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_valid[7U] + = vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_valid + [7U]; + vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_valid[6U] + = vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_valid + [6U]; + vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_valid[5U] + = vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_valid + [5U]; vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_valid[4U] = vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_valid [4U]; @@ -2903,6 +5987,15 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_valid[0U] = vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_valid [0U]; + vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_b_reg_data[7U] + = vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_b_reg_data + [7U]; + vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_b_reg_data[6U] + = vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_b_reg_data + [6U]; + vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_b_reg_data[5U] + = vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_b_reg_data + [5U]; vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_b_reg_data[4U] = vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_b_reg_data [4U]; @@ -2943,6 +6036,27 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) ? vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__itype_immed : vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_b_reg_data [4U]); + vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__5__KET____DOT__vx_alu__DOT__ALU_in2 + = ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rs2_src) + ? vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__itype_immed + : vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_b_reg_data + [5U]); + vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__6__KET____DOT__vx_alu__DOT__ALU_in2 + = ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rs2_src) + ? vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__itype_immed + : vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_b_reg_data + [6U]); + vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__7__KET____DOT__vx_alu__DOT__ALU_in2 + = ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rs2_src) + ? vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__itype_immed + : vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_b_reg_data + [7U]); + vlTOPp->out_cache_driver_in_data[7U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data + [7U]; + vlTOPp->out_cache_driver_in_data[6U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data + [6U]; + vlTOPp->out_cache_driver_in_data[5U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data + [5U]; vlTOPp->out_cache_driver_in_data[4U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data [4U]; vlTOPp->out_cache_driver_in_data[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data @@ -2953,6 +6067,12 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) [1U]; vlTOPp->out_cache_driver_in_data[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data [0U]; + vlTOPp->out_cache_driver_in_valid[7U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid + [7U]; + vlTOPp->out_cache_driver_in_valid[6U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid + [6U]; + vlTOPp->out_cache_driver_in_valid[5U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid + [5U]; vlTOPp->out_cache_driver_in_valid[4U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid [4U]; vlTOPp->out_cache_driver_in_valid[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid @@ -2963,6 +6083,12 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) [1U]; vlTOPp->out_cache_driver_in_valid[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid [0U]; + vlTOPp->Vortex__DOT__memory_valid[7U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_valid + [7U]; + vlTOPp->Vortex__DOT__memory_valid[6U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_valid + [6U]; + vlTOPp->Vortex__DOT__memory_valid[5U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_valid + [5U]; vlTOPp->Vortex__DOT__memory_valid[4U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_valid [4U]; vlTOPp->Vortex__DOT__memory_valid[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_valid @@ -2973,6 +6099,15 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) [1U]; vlTOPp->Vortex__DOT__memory_valid[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_valid [0U]; + vlTOPp->Vortex__DOT__writeback_write_data[7U] = + vlTOPp->Vortex__DOT____Vcellout__vx_writeback__out_write_data + [7U]; + vlTOPp->Vortex__DOT__writeback_write_data[6U] = + vlTOPp->Vortex__DOT____Vcellout__vx_writeback__out_write_data + [6U]; + vlTOPp->Vortex__DOT__writeback_write_data[5U] = + vlTOPp->Vortex__DOT____Vcellout__vx_writeback__out_write_data + [5U]; vlTOPp->Vortex__DOT__writeback_write_data[4U] = vlTOPp->Vortex__DOT____Vcellout__vx_writeback__out_write_data [4U]; @@ -2988,6 +6123,12 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) vlTOPp->Vortex__DOT__writeback_write_data[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_writeback__out_write_data [0U]; + vlTOPp->out_cache_driver_in_address[7U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address + [7U]; + vlTOPp->out_cache_driver_in_address[6U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address + [6U]; + vlTOPp->out_cache_driver_in_address[5U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address + [5U]; vlTOPp->out_cache_driver_in_address[4U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address [4U]; vlTOPp->out_cache_driver_in_address[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address @@ -2998,6 +6139,12 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) [1U]; vlTOPp->out_cache_driver_in_address[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address [0U]; + vlTOPp->Vortex__DOT__memory_alu_result[7U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_alu_result + [7U]; + vlTOPp->Vortex__DOT__memory_alu_result[6U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_alu_result + [6U]; + vlTOPp->Vortex__DOT__memory_alu_result[5U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_alu_result + [5U]; vlTOPp->Vortex__DOT__memory_alu_result[4U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_alu_result [4U]; vlTOPp->Vortex__DOT__memory_alu_result[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_alu_result @@ -3008,6 +6155,12 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) [1U]; vlTOPp->Vortex__DOT__memory_alu_result[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_alu_result [0U]; + vlTOPp->Vortex__DOT__execute_valid[7U] = vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_valid + [7U]; + vlTOPp->Vortex__DOT__execute_valid[6U] = vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_valid + [6U]; + vlTOPp->Vortex__DOT__execute_valid[5U] = vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_valid + [5U]; vlTOPp->Vortex__DOT__execute_valid[4U] = vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_valid [4U]; vlTOPp->Vortex__DOT__execute_valid[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_valid @@ -3028,6 +6181,12 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__PC_next_out; vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next[4U] = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__PC_next_out; + vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next[5U] + = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__PC_next_out; + vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next[6U] + = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__PC_next_out; + vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next[7U] + = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__PC_next_out; // ALWAYS at VX_d_e_reg.v:139 vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rd = (0x1fU & ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling) @@ -3081,6 +6240,12 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) | (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_csr)) ? 1U : 0U)))); + vlTOPp->Vortex__DOT__execute_b_reg_data[7U] = vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_b_reg_data + [7U]; + vlTOPp->Vortex__DOT__execute_b_reg_data[6U] = vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_b_reg_data + [6U]; + vlTOPp->Vortex__DOT__execute_b_reg_data[5U] = vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_b_reg_data + [5U]; vlTOPp->Vortex__DOT__execute_b_reg_data[4U] = vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_b_reg_data [4U]; vlTOPp->Vortex__DOT__execute_b_reg_data[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_b_reg_data @@ -3116,6 +6281,27 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data [4U]), VL_EXTENDS_QI(64,32, vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__4__KET____DOT__vx_alu__DOT__ALU_in2)); + vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__5__KET____DOT__vx_alu__DOT__mult_signed_result + = VL_MULS_QQQ(64,64,64, VL_EXTENDS_QI(64,32, + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [5U]), + VL_EXTENDS_QI(64,32, vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__5__KET____DOT__vx_alu__DOT__ALU_in2)); + vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__6__KET____DOT__vx_alu__DOT__mult_signed_result + = VL_MULS_QQQ(64,64,64, VL_EXTENDS_QI(64,32, + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [6U]), + VL_EXTENDS_QI(64,32, vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__6__KET____DOT__vx_alu__DOT__ALU_in2)); + vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__7__KET____DOT__vx_alu__DOT__mult_signed_result + = VL_MULS_QQQ(64,64,64, VL_EXTENDS_QI(64,32, + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [7U]), + VL_EXTENDS_QI(64,32, vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__7__KET____DOT__vx_alu__DOT__ALU_in2)); + vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_valid[7U] + = vlTOPp->Vortex__DOT__memory_valid[7U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_valid[6U] + = vlTOPp->Vortex__DOT__memory_valid[6U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_valid[5U] + = vlTOPp->Vortex__DOT__memory_valid[5U]; vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_valid[4U] = vlTOPp->Vortex__DOT__memory_valid[4U]; vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_valid[3U] @@ -3126,6 +6312,15 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) = vlTOPp->Vortex__DOT__memory_valid[1U]; vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_valid[0U] = vlTOPp->Vortex__DOT__memory_valid[0U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data[7U] + = vlTOPp->Vortex__DOT__writeback_write_data + [7U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data[6U] + = vlTOPp->Vortex__DOT__writeback_write_data + [6U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data[5U] + = vlTOPp->Vortex__DOT__writeback_write_data + [5U]; vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data[4U] = vlTOPp->Vortex__DOT__writeback_write_data [4U]; @@ -3141,6 +6336,12 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data[0U] = vlTOPp->Vortex__DOT__writeback_write_data [0U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_alu_result[7U] + = vlTOPp->Vortex__DOT__memory_alu_result[7U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_alu_result[6U] + = vlTOPp->Vortex__DOT__memory_alu_result[6U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_alu_result[5U] + = vlTOPp->Vortex__DOT__memory_alu_result[5U]; vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_alu_result[4U] = vlTOPp->Vortex__DOT__memory_alu_result[4U]; vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_alu_result[3U] @@ -3151,6 +6352,12 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) = vlTOPp->Vortex__DOT__memory_alu_result[1U]; vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_alu_result[0U] = vlTOPp->Vortex__DOT__memory_alu_result[0U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_alu_result[7U] + = vlTOPp->Vortex__DOT__memory_alu_result[7U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_alu_result[6U] + = vlTOPp->Vortex__DOT__memory_alu_result[6U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_alu_result[5U] + = vlTOPp->Vortex__DOT__memory_alu_result[5U]; vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_alu_result[4U] = vlTOPp->Vortex__DOT__memory_alu_result[4U]; vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_alu_result[3U] @@ -3161,6 +6368,12 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) = vlTOPp->Vortex__DOT__memory_alu_result[1U]; vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_alu_result[0U] = vlTOPp->Vortex__DOT__memory_alu_result[0U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_valid[7U] + = vlTOPp->Vortex__DOT__execute_valid[7U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_valid[6U] + = vlTOPp->Vortex__DOT__execute_valid[6U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_valid[5U] + = vlTOPp->Vortex__DOT__execute_valid[5U]; vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_valid[4U] = vlTOPp->Vortex__DOT__execute_valid[4U]; vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_valid[3U] @@ -3171,6 +6384,12 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) = vlTOPp->Vortex__DOT__execute_valid[1U]; vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_valid[0U] = vlTOPp->Vortex__DOT__execute_valid[0U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_b_reg_data[7U] + = vlTOPp->Vortex__DOT__execute_b_reg_data[7U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_b_reg_data[6U] + = vlTOPp->Vortex__DOT__execute_b_reg_data[6U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_b_reg_data[5U] + = vlTOPp->Vortex__DOT__execute_b_reg_data[5U]; vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_b_reg_data[4U] = vlTOPp->Vortex__DOT__execute_b_reg_data[4U]; vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_b_reg_data[3U] @@ -3906,6 +7125,441 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) [4U] + vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__4__KET____DOT__vx_alu__DOT__ALU_in2))))); } + // ALWAYS at VX_alu.v:48 + if ((0x10U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))) { + if ((8U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))) { + vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__5__KET____DOT__vx_alu__out_alu_result = 0U; + } else { + if ((4U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))) { + vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__5__KET____DOT__vx_alu__out_alu_result + = ((2U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__5__KET____DOT__vx_alu__DOT__ALU_in2) + ? vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [5U] : VL_MODDIV_III(32, + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [5U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__5__KET____DOT__vx_alu__DOT__ALU_in2)) + : ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__5__KET____DOT__vx_alu__DOT__ALU_in2) + ? vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [5U] : VL_MODDIVS_III(32, + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [5U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__5__KET____DOT__vx_alu__DOT__ALU_in2))) + : ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__5__KET____DOT__vx_alu__DOT__ALU_in2) + ? 0xffffffffU : VL_DIV_III(32, + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [5U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__5__KET____DOT__vx_alu__DOT__ALU_in2)) + : ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__5__KET____DOT__vx_alu__DOT__ALU_in2) + ? 0xffffffffU : VL_DIVS_III(32, + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [5U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__5__KET____DOT__vx_alu__DOT__ALU_in2)))); + } else { + if ((2U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))) { + vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__5__KET____DOT__vx_alu__out_alu_result + = ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? (IData)((((QData)((IData)( + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [5U])) + * (QData)((IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__5__KET____DOT__vx_alu__DOT__ALU_in2))) + >> 0x20U)) : (IData)( + (((((QData)((IData)( + VL_NEGATE_I((IData)( + (1U + & (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [5U] + >> 0x1fU)))))) + << 0x20U) + | (QData)((IData)( + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [5U]))) + * (QData)((IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__5__KET____DOT__vx_alu__DOT__ALU_in2))) + >> 0x20U))); + } else { + if (VL_LIKELY((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)))) { + vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__5__KET____DOT__vx_alu__out_alu_result + = (IData)((vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__5__KET____DOT__vx_alu__DOT__mult_signed_result + >> 0x20U)); + } else { + vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__5__KET____DOT__vx_alu__out_alu_result + = (IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__5__KET____DOT__vx_alu__DOT__mult_signed_result); + VL_WRITEF("(%x) %x * %x = %x\n", + 32,vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__curr_PC, + 32,vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [5U],32,vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__5__KET____DOT__vx_alu__DOT__ALU_in2, + 32,vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__5__KET____DOT__vx_alu__out_alu_result); + } + } + } + } + } else { + vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__5__KET____DOT__vx_alu__out_alu_result + = ((8U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? ((4U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? ((2U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? vlTOPp->Vortex__DOT__csr_decode_csr_data + : ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? vlTOPp->Vortex__DOT__csr_decode_csr_data + : (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__curr_PC + + (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__upper_immed + << 0xcU)))) : ((2U + & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? + ((1U + & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? + (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__upper_immed + << 0xcU) + : + ((vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [5U] + >= vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__5__KET____DOT__vx_alu__DOT__ALU_in2) + ? 0U + : 0xffffffffU)) + : + ((1U + & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? + (vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__5__KET____DOT__vx_alu__DOT__ALU_in2 + & vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [5U]) + : + (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [5U] + | vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__5__KET____DOT__vx_alu__DOT__ALU_in2)))) + : ((4U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? ((2U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? VL_SHIFTRS_III(32,32,5, + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [5U], + (0x1fU + & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__5__KET____DOT__vx_alu__DOT__ALU_in2)) + : (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [5U] >> (0x1fU & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__5__KET____DOT__vx_alu__DOT__ALU_in2))) + : ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [5U] ^ vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__5__KET____DOT__vx_alu__DOT__ALU_in2) + : ((vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [5U] < vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__5__KET____DOT__vx_alu__DOT__ALU_in2) + ? 1U : 0U))) : ((2U + & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? + ((1U + & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? + (VL_LTS_III(1,32,32, + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [5U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__5__KET____DOT__vx_alu__DOT__ALU_in2) + ? 1U + : 0U) + : + (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [5U] + << + (0x1fU + & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__5__KET____DOT__vx_alu__DOT__ALU_in2))) + : + ((1U + & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? + (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [5U] + - vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__5__KET____DOT__vx_alu__DOT__ALU_in2) + : + (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [5U] + + vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__5__KET____DOT__vx_alu__DOT__ALU_in2))))); + } + // ALWAYS at VX_alu.v:48 + if ((0x10U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))) { + if ((8U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))) { + vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__6__KET____DOT__vx_alu__out_alu_result = 0U; + } else { + if ((4U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))) { + vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__6__KET____DOT__vx_alu__out_alu_result + = ((2U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__6__KET____DOT__vx_alu__DOT__ALU_in2) + ? vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [6U] : VL_MODDIV_III(32, + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [6U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__6__KET____DOT__vx_alu__DOT__ALU_in2)) + : ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__6__KET____DOT__vx_alu__DOT__ALU_in2) + ? vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [6U] : VL_MODDIVS_III(32, + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [6U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__6__KET____DOT__vx_alu__DOT__ALU_in2))) + : ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__6__KET____DOT__vx_alu__DOT__ALU_in2) + ? 0xffffffffU : VL_DIV_III(32, + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [6U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__6__KET____DOT__vx_alu__DOT__ALU_in2)) + : ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__6__KET____DOT__vx_alu__DOT__ALU_in2) + ? 0xffffffffU : VL_DIVS_III(32, + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [6U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__6__KET____DOT__vx_alu__DOT__ALU_in2)))); + } else { + if ((2U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))) { + vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__6__KET____DOT__vx_alu__out_alu_result + = ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? (IData)((((QData)((IData)( + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [6U])) + * (QData)((IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__6__KET____DOT__vx_alu__DOT__ALU_in2))) + >> 0x20U)) : (IData)( + (((((QData)((IData)( + VL_NEGATE_I((IData)( + (1U + & (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [6U] + >> 0x1fU)))))) + << 0x20U) + | (QData)((IData)( + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [6U]))) + * (QData)((IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__6__KET____DOT__vx_alu__DOT__ALU_in2))) + >> 0x20U))); + } else { + if (VL_LIKELY((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)))) { + vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__6__KET____DOT__vx_alu__out_alu_result + = (IData)((vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__6__KET____DOT__vx_alu__DOT__mult_signed_result + >> 0x20U)); + } else { + vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__6__KET____DOT__vx_alu__out_alu_result + = (IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__6__KET____DOT__vx_alu__DOT__mult_signed_result); + VL_WRITEF("(%x) %x * %x = %x\n", + 32,vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__curr_PC, + 32,vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [6U],32,vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__6__KET____DOT__vx_alu__DOT__ALU_in2, + 32,vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__6__KET____DOT__vx_alu__out_alu_result); + } + } + } + } + } else { + vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__6__KET____DOT__vx_alu__out_alu_result + = ((8U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? ((4U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? ((2U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? vlTOPp->Vortex__DOT__csr_decode_csr_data + : ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? vlTOPp->Vortex__DOT__csr_decode_csr_data + : (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__curr_PC + + (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__upper_immed + << 0xcU)))) : ((2U + & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? + ((1U + & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? + (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__upper_immed + << 0xcU) + : + ((vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [6U] + >= vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__6__KET____DOT__vx_alu__DOT__ALU_in2) + ? 0U + : 0xffffffffU)) + : + ((1U + & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? + (vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__6__KET____DOT__vx_alu__DOT__ALU_in2 + & vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [6U]) + : + (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [6U] + | vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__6__KET____DOT__vx_alu__DOT__ALU_in2)))) + : ((4U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? ((2U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? VL_SHIFTRS_III(32,32,5, + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [6U], + (0x1fU + & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__6__KET____DOT__vx_alu__DOT__ALU_in2)) + : (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [6U] >> (0x1fU & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__6__KET____DOT__vx_alu__DOT__ALU_in2))) + : ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [6U] ^ vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__6__KET____DOT__vx_alu__DOT__ALU_in2) + : ((vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [6U] < vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__6__KET____DOT__vx_alu__DOT__ALU_in2) + ? 1U : 0U))) : ((2U + & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? + ((1U + & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? + (VL_LTS_III(1,32,32, + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [6U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__6__KET____DOT__vx_alu__DOT__ALU_in2) + ? 1U + : 0U) + : + (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [6U] + << + (0x1fU + & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__6__KET____DOT__vx_alu__DOT__ALU_in2))) + : + ((1U + & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? + (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [6U] + - vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__6__KET____DOT__vx_alu__DOT__ALU_in2) + : + (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [6U] + + vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__6__KET____DOT__vx_alu__DOT__ALU_in2))))); + } + // ALWAYS at VX_alu.v:48 + if ((0x10U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))) { + if ((8U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))) { + vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__7__KET____DOT__vx_alu__out_alu_result = 0U; + } else { + if ((4U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))) { + vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__7__KET____DOT__vx_alu__out_alu_result + = ((2U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__7__KET____DOT__vx_alu__DOT__ALU_in2) + ? vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [7U] : VL_MODDIV_III(32, + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [7U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__7__KET____DOT__vx_alu__DOT__ALU_in2)) + : ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__7__KET____DOT__vx_alu__DOT__ALU_in2) + ? vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [7U] : VL_MODDIVS_III(32, + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [7U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__7__KET____DOT__vx_alu__DOT__ALU_in2))) + : ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__7__KET____DOT__vx_alu__DOT__ALU_in2) + ? 0xffffffffU : VL_DIV_III(32, + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [7U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__7__KET____DOT__vx_alu__DOT__ALU_in2)) + : ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__7__KET____DOT__vx_alu__DOT__ALU_in2) + ? 0xffffffffU : VL_DIVS_III(32, + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [7U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__7__KET____DOT__vx_alu__DOT__ALU_in2)))); + } else { + if ((2U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))) { + vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__7__KET____DOT__vx_alu__out_alu_result + = ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? (IData)((((QData)((IData)( + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [7U])) + * (QData)((IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__7__KET____DOT__vx_alu__DOT__ALU_in2))) + >> 0x20U)) : (IData)( + (((((QData)((IData)( + VL_NEGATE_I((IData)( + (1U + & (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [7U] + >> 0x1fU)))))) + << 0x20U) + | (QData)((IData)( + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [7U]))) + * (QData)((IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__7__KET____DOT__vx_alu__DOT__ALU_in2))) + >> 0x20U))); + } else { + if (VL_LIKELY((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)))) { + vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__7__KET____DOT__vx_alu__out_alu_result + = (IData)((vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__7__KET____DOT__vx_alu__DOT__mult_signed_result + >> 0x20U)); + } else { + vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__7__KET____DOT__vx_alu__out_alu_result + = (IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__7__KET____DOT__vx_alu__DOT__mult_signed_result); + VL_WRITEF("(%x) %x * %x = %x\n", + 32,vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__curr_PC, + 32,vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [7U],32,vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__7__KET____DOT__vx_alu__DOT__ALU_in2, + 32,vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__7__KET____DOT__vx_alu__out_alu_result); + } + } + } + } + } else { + vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__7__KET____DOT__vx_alu__out_alu_result + = ((8U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? ((4U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? ((2U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? vlTOPp->Vortex__DOT__csr_decode_csr_data + : ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? vlTOPp->Vortex__DOT__csr_decode_csr_data + : (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__curr_PC + + (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__upper_immed + << 0xcU)))) : ((2U + & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? + ((1U + & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? + (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__upper_immed + << 0xcU) + : + ((vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [7U] + >= vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__7__KET____DOT__vx_alu__DOT__ALU_in2) + ? 0U + : 0xffffffffU)) + : + ((1U + & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? + (vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__7__KET____DOT__vx_alu__DOT__ALU_in2 + & vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [7U]) + : + (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [7U] + | vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__7__KET____DOT__vx_alu__DOT__ALU_in2)))) + : ((4U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? ((2U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? VL_SHIFTRS_III(32,32,5, + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [7U], + (0x1fU + & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__7__KET____DOT__vx_alu__DOT__ALU_in2)) + : (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [7U] >> (0x1fU & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__7__KET____DOT__vx_alu__DOT__ALU_in2))) + : ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [7U] ^ vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__7__KET____DOT__vx_alu__DOT__ALU_in2) + : ((vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [7U] < vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__7__KET____DOT__vx_alu__DOT__ALU_in2) + ? 1U : 0U))) : ((2U + & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? + ((1U + & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? + (VL_LTS_III(1,32,32, + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [7U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__7__KET____DOT__vx_alu__DOT__ALU_in2) + ? 1U + : 0U) + : + (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [7U] + << + (0x1fU + & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__7__KET____DOT__vx_alu__DOT__ALU_in2))) + : + ((1U + & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? + (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [7U] + - vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__7__KET____DOT__vx_alu__DOT__ALU_in2) + : + (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [7U] + + vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__7__KET____DOT__vx_alu__DOT__ALU_in2))))); + } vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_alu_result[0U] = vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__0__KET____DOT__vx_alu__out_alu_result; vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_alu_result[1U] @@ -3916,6 +7570,18 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) = vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__3__KET____DOT__vx_alu__out_alu_result; vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_alu_result[4U] = vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__4__KET____DOT__vx_alu__out_alu_result; + vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_alu_result[5U] + = vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__5__KET____DOT__vx_alu__out_alu_result; + vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_alu_result[6U] + = vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__6__KET____DOT__vx_alu__out_alu_result; + vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_alu_result[7U] + = vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__7__KET____DOT__vx_alu__out_alu_result; + vlTOPp->Vortex__DOT__execute_alu_result[7U] = vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_alu_result + [7U]; + vlTOPp->Vortex__DOT__execute_alu_result[6U] = vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_alu_result + [6U]; + vlTOPp->Vortex__DOT__execute_alu_result[5U] = vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_alu_result + [5U]; vlTOPp->Vortex__DOT__execute_alu_result[4U] = vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_alu_result [4U]; vlTOPp->Vortex__DOT__execute_alu_result[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_alu_result @@ -3926,6 +7592,12 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) [1U]; vlTOPp->Vortex__DOT__execute_alu_result[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_alu_result [0U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_alu_result[7U] + = vlTOPp->Vortex__DOT__execute_alu_result[7U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_alu_result[6U] + = vlTOPp->Vortex__DOT__execute_alu_result[6U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_alu_result[5U] + = vlTOPp->Vortex__DOT__execute_alu_result[5U]; vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_alu_result[4U] = vlTOPp->Vortex__DOT__execute_alu_result[4U]; vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_alu_result[3U] @@ -3936,6 +7608,12 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) = vlTOPp->Vortex__DOT__execute_alu_result[1U]; vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_alu_result[0U] = vlTOPp->Vortex__DOT__execute_alu_result[0U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result[7U] + = vlTOPp->Vortex__DOT__execute_alu_result[7U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result[6U] + = vlTOPp->Vortex__DOT__execute_alu_result[6U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result[5U] + = vlTOPp->Vortex__DOT__execute_alu_result[5U]; vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result[4U] = vlTOPp->Vortex__DOT__execute_alu_result[4U]; vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result[3U] @@ -3952,20 +7630,39 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__4(VVortex__Syms* __restrict vlSymsp) VL_DEBUG_IF(VL_DBG_MSGF("+ VVortex::_sequent__TOP__4\n"); ); VVortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; // Body - // ALWAYS at VX_writeback.v:43 - if (VL_UNLIKELY((0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)))) { - VL_WRITEF("[%x] WB Data: %x {%x}, to register: %2# [%1# %1#]\n", - 32,(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__PC_next - - (IData)(4U)),32,vlTOPp->Vortex__DOT____Vcellout__vx_writeback__out_write_data - [0U],32,vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_mem_result - [0U],5,vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd, - 1,vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_valid - [0U],1,vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_valid - [1U]); - } // ALWAYS at VX_register_file_slave.v:60 - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__vx_register_file_slave__out_src1_data - = vlTOPp->Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__out_src1_data + = vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers + [(0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0xfU))]; + // ALWAYS at VX_register_file_slave.v:60 + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__out_src1_data + = vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers + [(0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0xfU))]; + // ALWAYS at VX_register_file_slave.v:60 + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__out_src1_data + = vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers + [(0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0xfU))]; + // ALWAYS at VX_register_file_slave.v:60 + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__out_src1_data + = vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers + [(0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0xfU))]; + // ALWAYS at VX_register_file_slave.v:60 + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__out_src1_data + = vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers + [(0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0xfU))]; + // ALWAYS at VX_register_file_slave.v:60 + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__out_src1_data + = vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers + [(0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0xfU))]; + // ALWAYS at VX_register_file_slave.v:60 + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__out_src1_data + = vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers [(0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction >> 0xfU))]; // ALWAYS at VX_register_file.v:46 @@ -3974,8 +7671,38 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__4(VVortex__Syms* __restrict vlSymsp) [(0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction >> 0xfU))]; // ALWAYS at VX_register_file_slave.v:60 - vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__vx_register_file_slave__out_src2_data - = vlTOPp->Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__out_src2_data + = vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers + [(0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0x14U))]; + // ALWAYS at VX_register_file_slave.v:60 + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__out_src2_data + = vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers + [(0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0x14U))]; + // ALWAYS at VX_register_file_slave.v:60 + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__out_src2_data + = vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers + [(0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0x14U))]; + // ALWAYS at VX_register_file_slave.v:60 + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__out_src2_data + = vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers + [(0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0x14U))]; + // ALWAYS at VX_register_file_slave.v:60 + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__out_src2_data + = vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers + [(0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0x14U))]; + // ALWAYS at VX_register_file_slave.v:60 + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__out_src2_data + = vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers + [(0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0x14U))]; + // ALWAYS at VX_register_file_slave.v:60 + vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__out_src2_data + = vlTOPp->Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers [(0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction >> 0x14U))]; // ALWAYS at VX_register_file.v:46 @@ -3983,12 +7710,36 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__4(VVortex__Syms* __restrict vlSymsp) = vlTOPp->Vortex__DOT__vx_decode__DOT__vx_register_file_master__DOT__registers [(0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction >> 0x14U))]; + vlTOPp->Vortex__DOT__vx_decode__DOT__rd1_register[7U] + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__out_src1_data; + vlTOPp->Vortex__DOT__vx_decode__DOT__rd1_register[6U] + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__out_src1_data; + vlTOPp->Vortex__DOT__vx_decode__DOT__rd1_register[5U] + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__out_src1_data; + vlTOPp->Vortex__DOT__vx_decode__DOT__rd1_register[4U] + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__out_src1_data; + vlTOPp->Vortex__DOT__vx_decode__DOT__rd1_register[3U] + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__out_src1_data; + vlTOPp->Vortex__DOT__vx_decode__DOT__rd1_register[2U] + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__out_src1_data; vlTOPp->Vortex__DOT__vx_decode__DOT__rd1_register[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__vx_register_file_slave__out_src1_data; + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__out_src1_data; vlTOPp->Vortex__DOT__vx_decode__DOT__rd1_register[0U] = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__vx_register_file_master__out_src1_data; + vlTOPp->Vortex__DOT__vx_decode__DOT__rd2_register[7U] + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__out_src2_data; + vlTOPp->Vortex__DOT__vx_decode__DOT__rd2_register[6U] + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__out_src2_data; + vlTOPp->Vortex__DOT__vx_decode__DOT__rd2_register[5U] + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__out_src2_data; + vlTOPp->Vortex__DOT__vx_decode__DOT__rd2_register[4U] + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__out_src2_data; + vlTOPp->Vortex__DOT__vx_decode__DOT__rd2_register[3U] + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__out_src2_data; + vlTOPp->Vortex__DOT__vx_decode__DOT__rd2_register[2U] + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__out_src2_data; vlTOPp->Vortex__DOT__vx_decode__DOT__rd2_register[1U] - = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__vx_register_file_slave__out_src2_data; + = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__out_src2_data; vlTOPp->Vortex__DOT__vx_decode__DOT__rd2_register[0U] = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__vx_register_file_master__out_src2_data; } @@ -3997,6 +7748,12 @@ VL_INLINE_OPT void VVortex::_combo__TOP__5(VVortex__Syms* __restrict vlSymsp) { VL_DEBUG_IF(VL_DBG_MSGF("+ VVortex::_combo__TOP__5\n"); ); VVortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; // Body + vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data[7U] + = vlTOPp->in_cache_driver_out_data[7U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data[6U] + = vlTOPp->in_cache_driver_out_data[6U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data[5U] + = vlTOPp->in_cache_driver_out_data[5U]; vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data[4U] = vlTOPp->in_cache_driver_out_data[4U]; vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data[3U] @@ -4014,6 +7771,15 @@ VL_INLINE_OPT void VVortex::_combo__TOP__5(VVortex__Syms* __restrict vlSymsp) { 32,vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data [0U]); } + vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_mem_result[7U] + = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data + [7U]; + vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_mem_result[6U] + = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data + [6U]; + vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_mem_result[5U] + = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data + [5U]; vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_mem_result[4U] = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data [4U]; @@ -4037,6 +7803,12 @@ VL_INLINE_OPT void VVortex::_combo__TOP__5(VVortex__Syms* __restrict vlSymsp) { [0U],32,vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result [0U]); } + vlTOPp->Vortex__DOT__memory_mem_result[7U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_mem_result + [7U]; + vlTOPp->Vortex__DOT__memory_mem_result[6U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_mem_result + [6U]; + vlTOPp->Vortex__DOT__memory_mem_result[5U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_mem_result + [5U]; vlTOPp->Vortex__DOT__memory_mem_result[4U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_mem_result [4U]; vlTOPp->Vortex__DOT__memory_mem_result[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_mem_result @@ -4047,6 +7819,12 @@ VL_INLINE_OPT void VVortex::_combo__TOP__5(VVortex__Syms* __restrict vlSymsp) { [1U]; vlTOPp->Vortex__DOT__memory_mem_result[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_mem_result [0U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_mem_result[7U] + = vlTOPp->Vortex__DOT__memory_mem_result[7U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_mem_result[6U] + = vlTOPp->Vortex__DOT__memory_mem_result[6U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_mem_result[5U] + = vlTOPp->Vortex__DOT__memory_mem_result[5U]; vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_mem_result[4U] = vlTOPp->Vortex__DOT__memory_mem_result[4U]; vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_mem_result[3U] @@ -4057,6 +7835,12 @@ VL_INLINE_OPT void VVortex::_combo__TOP__5(VVortex__Syms* __restrict vlSymsp) { = vlTOPp->Vortex__DOT__memory_mem_result[1U]; vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_mem_result[0U] = vlTOPp->Vortex__DOT__memory_mem_result[0U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_mem_data[7U] + = vlTOPp->Vortex__DOT__memory_mem_result[7U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_mem_data[6U] + = vlTOPp->Vortex__DOT__memory_mem_result[6U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_mem_data[5U] + = vlTOPp->Vortex__DOT__memory_mem_result[5U]; vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_mem_data[4U] = vlTOPp->Vortex__DOT__memory_mem_result[4U]; vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_mem_data[3U] @@ -4078,6 +7862,9 @@ void VVortex::_initial__TOP__6(VVortex__Syms* __restrict vlSymsp) { vlTOPp->Vortex__DOT__vx_fetch__DOT__valid[2U] = 0U; vlTOPp->Vortex__DOT__vx_fetch__DOT__valid[3U] = 0U; vlTOPp->Vortex__DOT__vx_fetch__DOT__valid[4U] = 0U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__valid[5U] = 0U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__valid[6U] = 0U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__valid[7U] = 0U; vlTOPp->Vortex__DOT__vx_fetch__DOT__valid[0U] = 1U; vlTOPp->Vortex__DOT__vx_fetch__DOT__stall_reg = 0U; vlTOPp->Vortex__DOT__vx_fetch__DOT__delay_reg = 0U; @@ -4087,7 +7874,7 @@ void VVortex::_initial__TOP__6(VVortex__Syms* __restrict vlSymsp) { vlTOPp->Vortex__DOT__vx_fetch__DOT__JAL_reg = 0U; vlTOPp->Vortex__DOT__vx_fetch__DOT__BR_reg = 0U; vlTOPp->Vortex__DOT__vx_fetch__DOT__prev_debug = 0U; - // INITIAL at VX_decode.v:279 + // INITIAL at VX_decode.v:280 vlTOPp->Vortex__DOT__vx_decode__DOT__state_stall = 0U; // INITIAL at VX_m_w_reg.v:39 vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd = 0U; @@ -4131,6 +7918,18 @@ void VVortex::_initial__TOP__6(VVortex__Syms* __restrict vlSymsp) { vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__b_reg_data[4U] = 0U; vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__valid[4U] = 0U; vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__alu_result[4U] = 0U; + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__a_reg_data[5U] = 0U; + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__b_reg_data[5U] = 0U; + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__valid[5U] = 0U; + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__alu_result[5U] = 0U; + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__a_reg_data[6U] = 0U; + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__b_reg_data[6U] = 0U; + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__valid[6U] = 0U; + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__alu_result[6U] = 0U; + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__a_reg_data[7U] = 0U; + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__b_reg_data[7U] = 0U; + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__valid[7U] = 0U; + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__alu_result[7U] = 0U; // INITIAL at VX_d_e_reg.v:83 vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rd = 0U; vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__a_reg_data[0U] = 0U; @@ -4158,6 +7957,21 @@ void VVortex::_initial__TOP__6(VVortex__Syms* __restrict vlSymsp) { vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__reg_data_z[4U] = 0U; vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__valid[4U] = 0U; vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__valid_z[4U] = 0U; + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__a_reg_data[5U] = 0U; + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__b_reg_data[5U] = 0U; + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__reg_data_z[5U] = 0U; + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__valid[5U] = 0U; + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__valid_z[5U] = 0U; + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__a_reg_data[6U] = 0U; + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__b_reg_data[6U] = 0U; + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__reg_data_z[6U] = 0U; + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__valid[6U] = 0U; + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__valid_z[6U] = 0U; + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__a_reg_data[7U] = 0U; + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__b_reg_data[7U] = 0U; + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__reg_data_z[7U] = 0U; + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__valid[7U] = 0U; + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__valid_z[7U] = 0U; vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op = 0U; vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb = 0U; vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__PC_next_out = 0U; @@ -4180,11 +7994,14 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__7(VVortex__Syms* __restrict vlSymsp) VVortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; // Variables // Begin mtask footprint all: - VL_SIG8(__Vdlyvval__Vortex__DOT__vx_f_d_reg__DOT__valid__v5,0,0); - VL_SIG8(__Vdlyvval__Vortex__DOT__vx_f_d_reg__DOT__valid__v6,0,0); - VL_SIG8(__Vdlyvval__Vortex__DOT__vx_f_d_reg__DOT__valid__v7,0,0); VL_SIG8(__Vdlyvval__Vortex__DOT__vx_f_d_reg__DOT__valid__v8,0,0); VL_SIG8(__Vdlyvval__Vortex__DOT__vx_f_d_reg__DOT__valid__v9,0,0); + VL_SIG8(__Vdlyvval__Vortex__DOT__vx_f_d_reg__DOT__valid__v10,0,0); + VL_SIG8(__Vdlyvval__Vortex__DOT__vx_f_d_reg__DOT__valid__v11,0,0); + VL_SIG8(__Vdlyvval__Vortex__DOT__vx_f_d_reg__DOT__valid__v12,0,0); + VL_SIG8(__Vdlyvval__Vortex__DOT__vx_f_d_reg__DOT__valid__v13,0,0); + VL_SIG8(__Vdlyvval__Vortex__DOT__vx_f_d_reg__DOT__valid__v14,0,0); + VL_SIG8(__Vdlyvval__Vortex__DOT__vx_f_d_reg__DOT__valid__v15,0,0); // Body // ALWAYS at VX_f_d_reg.v:33 if (vlTOPp->reset) { @@ -4201,40 +8018,46 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__7(VVortex__Syms* __restrict vlSymsp) vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction = ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__stall) ? 0U : vlTOPp->fe_instruction); - __Vdlyvval__Vortex__DOT__vx_f_d_reg__DOT__valid__v5 - = vlTOPp->Vortex__DOT____Vcellinp__vx_f_d_reg__in_valid - [4U]; - vlTOPp->__Vdlyvset__Vortex__DOT__vx_f_d_reg__DOT__valid__v5 = 1U; - vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__curr_PC - = vlTOPp->Vortex__DOT__vx_fetch__DOT__temp_PC; - __Vdlyvval__Vortex__DOT__vx_f_d_reg__DOT__valid__v6 - = vlTOPp->Vortex__DOT____Vcellinp__vx_f_d_reg__in_valid - [3U]; - vlTOPp->__Vdlyvset__Vortex__DOT__vx_f_d_reg__DOT__valid__v6 = 1U; - __Vdlyvval__Vortex__DOT__vx_f_d_reg__DOT__valid__v7 - = vlTOPp->Vortex__DOT____Vcellinp__vx_f_d_reg__in_valid - [2U]; __Vdlyvval__Vortex__DOT__vx_f_d_reg__DOT__valid__v8 = vlTOPp->Vortex__DOT____Vcellinp__vx_f_d_reg__in_valid - [1U]; + [7U]; + vlTOPp->__Vdlyvset__Vortex__DOT__vx_f_d_reg__DOT__valid__v8 = 1U; + vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__curr_PC + = vlTOPp->Vortex__DOT__vx_fetch__DOT__temp_PC; __Vdlyvval__Vortex__DOT__vx_f_d_reg__DOT__valid__v9 + = vlTOPp->Vortex__DOT____Vcellinp__vx_f_d_reg__in_valid + [6U]; + vlTOPp->__Vdlyvset__Vortex__DOT__vx_f_d_reg__DOT__valid__v9 = 1U; + __Vdlyvval__Vortex__DOT__vx_f_d_reg__DOT__valid__v10 + = vlTOPp->Vortex__DOT____Vcellinp__vx_f_d_reg__in_valid + [5U]; + __Vdlyvval__Vortex__DOT__vx_f_d_reg__DOT__valid__v11 + = vlTOPp->Vortex__DOT____Vcellinp__vx_f_d_reg__in_valid + [4U]; + __Vdlyvval__Vortex__DOT__vx_f_d_reg__DOT__valid__v12 + = vlTOPp->Vortex__DOT____Vcellinp__vx_f_d_reg__in_valid + [3U]; + __Vdlyvval__Vortex__DOT__vx_f_d_reg__DOT__valid__v13 + = vlTOPp->Vortex__DOT____Vcellinp__vx_f_d_reg__in_valid + [2U]; + __Vdlyvval__Vortex__DOT__vx_f_d_reg__DOT__valid__v14 + = vlTOPp->Vortex__DOT____Vcellinp__vx_f_d_reg__in_valid + [1U]; + __Vdlyvval__Vortex__DOT__vx_f_d_reg__DOT__valid__v15 = vlTOPp->Vortex__DOT____Vcellinp__vx_f_d_reg__in_valid [0U]; } } // ALWAYS at VX_fetch.v:124 - if (VL_UNLIKELY(((IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal) - & (~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__delay_reg))))) { - vlTOPp->Vortex__DOT__vx_fetch__DOT__temp_PC - = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal_dest; - VL_WRITEF("in_jal_dest: %x\n",32,vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal_dest); - } else { - vlTOPp->Vortex__DOT__vx_fetch__DOT__temp_PC - = (((IData)(vlTOPp->Vortex__DOT__memory_branch_dir) - & (~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__delay_reg))) - ? vlTOPp->Vortex__DOT__memory_branch_dest - : vlTOPp->Vortex__DOT__vx_fetch__DOT__PC_to_use); - } + vlTOPp->Vortex__DOT__vx_fetch__DOT__temp_PC = ( + ((IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal) + & (~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__delay_reg))) + ? vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal_dest + : + (((IData)(vlTOPp->Vortex__DOT__memory_branch_dir) + & (~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__delay_reg))) + ? vlTOPp->Vortex__DOT__memory_branch_dest + : vlTOPp->Vortex__DOT__vx_fetch__DOT__PC_to_use)); // ALWAYSPOST at VX_f_d_reg.v:38 if (vlTOPp->__Vdlyvset__Vortex__DOT__vx_f_d_reg__DOT__valid__v0) { vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__valid[0U] = 0U; @@ -4242,29 +8065,40 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__7(VVortex__Syms* __restrict vlSymsp) vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__valid[2U] = 0U; vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__valid[3U] = 0U; vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__valid[4U] = 0U; + vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__valid[5U] = 0U; + vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__valid[6U] = 0U; + vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__valid[7U] = 0U; } - if (vlTOPp->__Vdlyvset__Vortex__DOT__vx_f_d_reg__DOT__valid__v5) { - vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__valid[4U] - = __Vdlyvval__Vortex__DOT__vx_f_d_reg__DOT__valid__v5; - } - if (vlTOPp->__Vdlyvset__Vortex__DOT__vx_f_d_reg__DOT__valid__v6) { - vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__valid[3U] - = __Vdlyvval__Vortex__DOT__vx_f_d_reg__DOT__valid__v6; - vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__valid[2U] - = __Vdlyvval__Vortex__DOT__vx_f_d_reg__DOT__valid__v7; - vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__valid[1U] + if (vlTOPp->__Vdlyvset__Vortex__DOT__vx_f_d_reg__DOT__valid__v8) { + vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__valid[7U] = __Vdlyvval__Vortex__DOT__vx_f_d_reg__DOT__valid__v8; - vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__valid[0U] + } + if (vlTOPp->__Vdlyvset__Vortex__DOT__vx_f_d_reg__DOT__valid__v9) { + vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__valid[6U] = __Vdlyvval__Vortex__DOT__vx_f_d_reg__DOT__valid__v9; + vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__valid[5U] + = __Vdlyvval__Vortex__DOT__vx_f_d_reg__DOT__valid__v10; + vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__valid[4U] + = __Vdlyvval__Vortex__DOT__vx_f_d_reg__DOT__valid__v11; + vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__valid[3U] + = __Vdlyvval__Vortex__DOT__vx_f_d_reg__DOT__valid__v12; + vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__valid[2U] + = __Vdlyvval__Vortex__DOT__vx_f_d_reg__DOT__valid__v13; + vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__valid[1U] + = __Vdlyvval__Vortex__DOT__vx_f_d_reg__DOT__valid__v14; + vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__valid[0U] + = __Vdlyvval__Vortex__DOT__vx_f_d_reg__DOT__valid__v15; } vlTOPp->curr_PC = vlTOPp->Vortex__DOT__vx_fetch__DOT__temp_PC; - // ALWAYS at VX_fetch.v:139 - VL_WRITEF("FETCH PC: %x (%x, %x, %x)\n",32,vlTOPp->Vortex__DOT__vx_fetch__DOT__temp_PC, - 32,vlTOPp->Vortex__DOT__vx_fetch__DOT__PC_to_use, - 32,vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal_dest, - 32,vlTOPp->Vortex__DOT__memory_branch_dest); - // ALWAYS at VX_decode.v:142 - VL_WRITEF("DECODE PC: %x\n",32,vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__curr_PC); + vlTOPp->Vortex__DOT____Vcellout__vx_f_d_reg__out_valid[7U] + = vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__valid + [7U]; + vlTOPp->Vortex__DOT____Vcellout__vx_f_d_reg__out_valid[6U] + = vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__valid + [6U]; + vlTOPp->Vortex__DOT____Vcellout__vx_f_d_reg__out_valid[5U] + = vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__valid + [5U]; vlTOPp->Vortex__DOT____Vcellout__vx_f_d_reg__out_valid[4U] = vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__valid [4U]; @@ -4280,8 +8114,6 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__7(VVortex__Syms* __restrict vlSymsp) vlTOPp->Vortex__DOT____Vcellout__vx_f_d_reg__out_valid[0U] = vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__valid [0U]; - // ALWAYS at VX_decode.v:275 - VL_WRITEF("Decode inst: %x\n",32,vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction); vlTOPp->Vortex__DOT__vx_decode__DOT__is_itype = ((0x13U == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) | (3U == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction))); @@ -4300,7 +8132,7 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__7(VVortex__Syms* __restrict vlSymsp) (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction >> 0x14U) : 0x55U)); - // ALWAYS at VX_decode.v:490 + // ALWAYS at VX_decode.v:491 vlTOPp->__Vtableidx1 = (7U & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction >> 0xcU)); vlTOPp->Vortex__DOT__vx_decode__DOT__mul_alu = @@ -4348,6 +8180,12 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__7(VVortex__Syms* __restrict vlSymsp) >> 0x14U)) == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rd)) & (0U != (0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction >> 0x14U)))) & (0U != (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb))); + vlTOPp->Vortex__DOT__f_d_valid[7U] = vlTOPp->Vortex__DOT____Vcellout__vx_f_d_reg__out_valid + [7U]; + vlTOPp->Vortex__DOT__f_d_valid[6U] = vlTOPp->Vortex__DOT____Vcellout__vx_f_d_reg__out_valid + [6U]; + vlTOPp->Vortex__DOT__f_d_valid[5U] = vlTOPp->Vortex__DOT____Vcellout__vx_f_d_reg__out_valid + [5U]; vlTOPp->Vortex__DOT__f_d_valid[4U] = vlTOPp->Vortex__DOT____Vcellout__vx_f_d_reg__out_valid [4U]; vlTOPp->Vortex__DOT__f_d_valid[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_f_d_reg__out_valid @@ -4358,7 +8196,7 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__7(VVortex__Syms* __restrict vlSymsp) [1U]; vlTOPp->Vortex__DOT__f_d_valid[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_f_d_reg__out_valid [0U]; - // ALWAYS at VX_decode.v:421 + // ALWAYS at VX_decode.v:422 vlTOPp->Vortex__DOT__decode_itype_immed = ((0x40U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) ? ( @@ -4498,7 +8336,7 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__7(VVortex__Syms* __restrict vlSymsp) | (1U != (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__state_stall))) & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_clone)); - // ALWAYS at VX_decode.v:373 + // ALWAYS at VX_decode.v:374 if ((0x40U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) { if ((0x20U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) { if ((0x10U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) { @@ -4586,7 +8424,7 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__7(VVortex__Syms* __restrict vlSymsp) } else { vlTOPp->Vortex__DOT__decode_jal_offset = 0xdeadbeefU; } - // ALWAYS at VX_decode.v:432 + // ALWAYS at VX_decode.v:433 if ((0x40U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) { if ((0x20U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) { if ((0x10U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) { @@ -4660,6 +8498,12 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__7(VVortex__Syms* __restrict vlSymsp) >> 0x14U)))) & (0U != (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb))) & (~ (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd))); + vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid[7U] + = vlTOPp->Vortex__DOT__f_d_valid[7U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid[6U] + = vlTOPp->Vortex__DOT__f_d_valid[6U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid[5U] + = vlTOPp->Vortex__DOT__f_d_valid[5U]; vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid[4U] = vlTOPp->Vortex__DOT__f_d_valid[4U]; vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid[3U] @@ -4775,7 +8619,7 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__7(VVortex__Syms* __restrict vlSymsp) != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb))) & (~ (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd))) & (~ (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd))); - // ALWAYS at VX_decode.v:373 + // ALWAYS at VX_decode.v:374 if ((0x40U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) { if ((0x20U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) { if ((0x10U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) { @@ -4840,6 +8684,15 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__7(VVortex__Syms* __restrict vlSymsp) } else { vlTOPp->Vortex__DOT__decode_jal = 0U; } + vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_valid[7U] + = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid + [7U]; + vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_valid[6U] + = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid + [6U]; + vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_valid[5U] + = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid + [5U]; vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_valid[4U] = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid [4U]; @@ -4855,7 +8708,7 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__7(VVortex__Syms* __restrict vlSymsp) vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_valid[0U] = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid [0U]; - // ALWAYS at VX_decode.v:432 + // ALWAYS at VX_decode.v:433 if ((0x40U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) { if ((0x20U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) { if ((0x10U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) { @@ -4913,6 +8766,12 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__7(VVortex__Syms* __restrict vlSymsp) vlTOPp->Vortex__DOT__forwarding_src2_fwd = (((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd) | (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd)) | (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_wb_fwd)); + vlTOPp->Vortex__DOT__decode_valid[7U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_valid + [7U]; + vlTOPp->Vortex__DOT__decode_valid[6U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_valid + [6U]; + vlTOPp->Vortex__DOT__decode_valid[5U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_valid + [5U]; vlTOPp->Vortex__DOT__decode_valid[4U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_valid [4U]; vlTOPp->Vortex__DOT__decode_valid[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_valid @@ -4927,6 +8786,12 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__7(VVortex__Syms* __restrict vlSymsp) | (IData)(vlTOPp->Vortex__DOT__decode_branch_stall)) | (IData)(vlTOPp->Vortex__DOT__forwarding_fwd_stall)) | (IData)(vlTOPp->Vortex__DOT__execute_branch_stall)); + vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_valid[7U] + = vlTOPp->Vortex__DOT__decode_valid[7U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_valid[6U] + = vlTOPp->Vortex__DOT__decode_valid[6U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_valid[5U] + = vlTOPp->Vortex__DOT__decode_valid[5U]; vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_valid[4U] = vlTOPp->Vortex__DOT__decode_valid[4U]; vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_valid[3U] @@ -4939,52 +8804,31 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__7(VVortex__Syms* __restrict vlSymsp) = vlTOPp->Vortex__DOT__decode_valid[0U]; } -VL_INLINE_OPT void VVortex::_multiclk__TOP__8(VVortex__Syms* __restrict vlSymsp) { - VL_DEBUG_IF(VL_DBG_MSGF("+ VVortex::_multiclk__TOP__8\n"); ); - VVortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; - // Body - vlTOPp->Vortex__DOT__vx_decode__DOT__to_clone_1 - = ((1U == vlTOPp->Vortex__DOT__vx_decode__DOT__rd1_register - [0U]) & (1U == (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__state_stall))); -} - -void VVortex::_settle__TOP__9(VVortex__Syms* __restrict vlSymsp) { - VL_DEBUG_IF(VL_DBG_MSGF("+ VVortex::_settle__TOP__9\n"); ); +void VVortex::_settle__TOP__8(VVortex__Syms* __restrict vlSymsp) { + VL_DEBUG_IF(VL_DBG_MSGF("+ VVortex::_settle__TOP__8\n"); ); VVortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; // Body // ALWAYS at VX_fetch.v:92 - if (vlTOPp->Vortex__DOT__vx_fetch__DOT__delay_reg) { - vlTOPp->Vortex__DOT__vx_fetch__DOT__PC_to_use - = vlTOPp->Vortex__DOT__vx_fetch__DOT__old; - } else { - if (VL_UNLIKELY(vlTOPp->Vortex__DOT__vx_fetch__DOT__stall_reg)) { - VL_WRITEF("Using old cuz stall: PC: %x\treal_pc: %x\n", - 32,vlTOPp->Vortex__DOT__vx_fetch__DOT__old, - 32,vlTOPp->Vortex__DOT__vx_fetch__DOT__real_PC); - vlTOPp->Vortex__DOT__vx_fetch__DOT__PC_to_use - = vlTOPp->Vortex__DOT__vx_fetch__DOT__old; - } else { - vlTOPp->Vortex__DOT__vx_fetch__DOT__PC_to_use - = ((0x10U & (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__state)) - ? 0U : ((8U & (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__state)) - ? 0U : ((4U & (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__state)) - ? ((2U & (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__state)) - ? 0U : ((1U - & (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__state)) - ? 0U - : vlTOPp->Vortex__DOT__vx_fetch__DOT__old)) - : ((2U & (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__state)) - ? ((1U & (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__state)) - ? vlTOPp->Vortex__DOT__vx_fetch__DOT__real_PC - : vlTOPp->Vortex__DOT__vx_fetch__DOT__BR_reg) - : ((1U & (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__state)) - ? vlTOPp->Vortex__DOT__vx_fetch__DOT__JAL_reg - : vlTOPp->Vortex__DOT__vx_fetch__DOT__real_PC))))); - } - } - vlTOPp->Vortex__DOT__vx_decode__DOT__to_clone_1 - = ((1U == vlTOPp->Vortex__DOT__vx_decode__DOT__rd1_register - [0U]) & (1U == (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__state_stall))); + vlTOPp->Vortex__DOT__vx_fetch__DOT__PC_to_use = + ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__delay_reg) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT__old + : ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__stall_reg) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT__old + : ((0x10U & (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__state)) + ? 0U : ((8U & (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__state)) + ? 0U : ((4U & (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__state)) + ? ((2U & (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__state)) + ? 0U : ((1U + & (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__state)) + ? 0U + : vlTOPp->Vortex__DOT__vx_fetch__DOT__old)) + : ((2U & (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__state)) + ? ((1U & (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__state)) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT__real_PC + : vlTOPp->Vortex__DOT__vx_fetch__DOT__BR_reg) + : ((1U & (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__state)) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT__JAL_reg + : vlTOPp->Vortex__DOT__vx_fetch__DOT__real_PC))))))); vlTOPp->Vortex__DOT__decode_clone_stall = (((0U == (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__state_stall)) | (1U @@ -5004,6 +8848,12 @@ void VVortex::_settle__TOP__9(VVortex__Syms* __restrict vlSymsp) { = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__PC_next; vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next[4U] = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__PC_next; + vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next[5U] + = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__PC_next; + vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next[6U] + = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__PC_next; + vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next[7U] + = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__PC_next; vlTOPp->Vortex__DOT__csr_decode_csr_data = ((0xc00U == (IData)(vlTOPp->Vortex__DOT__vx_csr_handler__DOT__decode_csr_address)) ? (IData)(vlTOPp->Vortex__DOT__vx_csr_handler__DOT__cycle) @@ -5031,6 +8881,15 @@ void VVortex::_settle__TOP__9(VVortex__Syms* __restrict vlSymsp) { vlTOPp->Vortex__DOT__memory_branch_dest = (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__curr_PC + (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_offset << 1U)); + vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_b_reg_data[7U] + = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__b_reg_data + [7U]; + vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_b_reg_data[6U] + = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__b_reg_data + [6U]; + vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_b_reg_data[5U] + = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__b_reg_data + [5U]; vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_b_reg_data[4U] = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__b_reg_data [4U]; @@ -5046,6 +8905,15 @@ void VVortex::_settle__TOP__9(VVortex__Syms* __restrict vlSymsp) { vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_b_reg_data[0U] = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__b_reg_data [0U]; + vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_valid[7U] + = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__valid + [7U]; + vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_valid[6U] + = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__valid + [6U]; + vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_valid[5U] + = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__valid + [5U]; vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_valid[4U] = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__valid [4U]; @@ -5061,6 +8929,31 @@ void VVortex::_settle__TOP__9(VVortex__Syms* __restrict vlSymsp) { vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_valid[0U] = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__valid [0U]; + vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[0U] + = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__PC_next; + vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[1U] + = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__PC_next; + vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[2U] + = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__PC_next; + vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[3U] + = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__PC_next; + vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[4U] + = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__PC_next; + vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[5U] + = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__PC_next; + vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[6U] + = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__PC_next; + vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[7U] + = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__PC_next; + vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_alu_result[7U] + = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__alu_result + [7U]; + vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_alu_result[6U] + = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__alu_result + [6U]; + vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_alu_result[5U] + = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__alu_result + [5U]; vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_alu_result[4U] = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__alu_result [4U]; @@ -5076,19 +8969,18 @@ void VVortex::_settle__TOP__9(VVortex__Syms* __restrict vlSymsp) { vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_alu_result[0U] = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__alu_result [0U]; - vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[0U] - = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__PC_next; - vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[1U] - = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__PC_next; - vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[2U] - = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__PC_next; - vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[3U] - = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__PC_next; - vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[4U] - = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__PC_next; vlTOPp->Vortex__DOT__execute_branch_stall = ((0U != (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__branch_type)) | (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__jal)); + vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_valid[7U] + = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__valid + [7U]; + vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_valid[6U] + = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__valid + [6U]; + vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_valid[5U] + = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__valid + [5U]; vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_valid[4U] = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__valid [4U]; @@ -5104,6 +8996,31 @@ void VVortex::_settle__TOP__9(VVortex__Syms* __restrict vlSymsp) { vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_valid[0U] = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__valid [0U]; + vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next[0U] + = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__PC_next_out; + vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next[1U] + = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__PC_next_out; + vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next[2U] + = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__PC_next_out; + vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next[3U] + = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__PC_next_out; + vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next[4U] + = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__PC_next_out; + vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next[5U] + = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__PC_next_out; + vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next[6U] + = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__PC_next_out; + vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next[7U] + = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__PC_next_out; + vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_a_reg_data[7U] + = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__a_reg_data + [7U]; + vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_a_reg_data[6U] + = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__a_reg_data + [6U]; + vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_a_reg_data[5U] + = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__a_reg_data + [5U]; vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_a_reg_data[4U] = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__a_reg_data [4U]; @@ -5119,6 +9036,15 @@ void VVortex::_settle__TOP__9(VVortex__Syms* __restrict vlSymsp) { vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_a_reg_data[0U] = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__a_reg_data [0U]; + vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_b_reg_data[7U] + = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__b_reg_data + [7U]; + vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_b_reg_data[6U] + = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__b_reg_data + [6U]; + vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_b_reg_data[5U] + = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__b_reg_data + [5U]; vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_b_reg_data[4U] = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__b_reg_data [4U]; @@ -5134,16 +9060,6 @@ void VVortex::_settle__TOP__9(VVortex__Syms* __restrict vlSymsp) { vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_b_reg_data[0U] = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__b_reg_data [0U]; - vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next[0U] - = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__PC_next_out; - vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next[1U] - = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__PC_next_out; - vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next[2U] - = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__PC_next_out; - vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next[3U] - = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__PC_next_out; - vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next[4U] - = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__PC_next_out; vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd = ((((0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction >> 0xfU)) == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rd)) @@ -5154,6 +9070,27 @@ void VVortex::_settle__TOP__9(VVortex__Syms* __restrict vlSymsp) { >> 0x14U)) == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rd)) & (0U != (0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction >> 0x14U)))) & (0U != (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb))); + vlTOPp->Vortex__DOT____Vcellout__vx_writeback__out_write_data[7U] + = ((3U == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) + ? vlTOPp->Vortex__DOT__vx_writeback__DOT__out_pc_data + [7U] : ((1U == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) + ? vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_alu_result + [7U] : vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_mem_result + [7U])); + vlTOPp->Vortex__DOT____Vcellout__vx_writeback__out_write_data[6U] + = ((3U == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) + ? vlTOPp->Vortex__DOT__vx_writeback__DOT__out_pc_data + [6U] : ((1U == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) + ? vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_alu_result + [6U] : vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_mem_result + [6U])); + vlTOPp->Vortex__DOT____Vcellout__vx_writeback__out_write_data[5U] + = ((3U == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) + ? vlTOPp->Vortex__DOT__vx_writeback__DOT__out_pc_data + [5U] : ((1U == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) + ? vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_alu_result + [5U] : vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_mem_result + [5U])); vlTOPp->Vortex__DOT____Vcellout__vx_writeback__out_write_data[4U] = ((3U == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) ? vlTOPp->Vortex__DOT__vx_writeback__DOT__out_pc_data @@ -5189,6 +9126,12 @@ void VVortex::_settle__TOP__9(VVortex__Syms* __restrict vlSymsp) { ? vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_alu_result [0U] : vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_mem_result [0U])); + vlTOPp->Vortex__DOT__e_m_b_reg_data[7U] = vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_b_reg_data + [7U]; + vlTOPp->Vortex__DOT__e_m_b_reg_data[6U] = vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_b_reg_data + [6U]; + vlTOPp->Vortex__DOT__e_m_b_reg_data[5U] = vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_b_reg_data + [5U]; vlTOPp->Vortex__DOT__e_m_b_reg_data[4U] = vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_b_reg_data [4U]; vlTOPp->Vortex__DOT__e_m_b_reg_data[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_b_reg_data @@ -5199,6 +9142,12 @@ void VVortex::_settle__TOP__9(VVortex__Syms* __restrict vlSymsp) { [1U]; vlTOPp->Vortex__DOT__e_m_b_reg_data[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_b_reg_data [0U]; + vlTOPp->Vortex__DOT__e_m_valid[7U] = vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_valid + [7U]; + vlTOPp->Vortex__DOT__e_m_valid[6U] = vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_valid + [6U]; + vlTOPp->Vortex__DOT__e_m_valid[5U] = vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_valid + [5U]; vlTOPp->Vortex__DOT__e_m_valid[4U] = vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_valid [4U]; vlTOPp->Vortex__DOT__e_m_valid[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_valid @@ -5209,6 +9158,12 @@ void VVortex::_settle__TOP__9(VVortex__Syms* __restrict vlSymsp) { [1U]; vlTOPp->Vortex__DOT__e_m_valid[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_valid [0U]; + vlTOPp->Vortex__DOT__e_m_alu_result[7U] = vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_alu_result + [7U]; + vlTOPp->Vortex__DOT__e_m_alu_result[6U] = vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_alu_result + [6U]; + vlTOPp->Vortex__DOT__e_m_alu_result[5U] = vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_alu_result + [5U]; vlTOPp->Vortex__DOT__e_m_alu_result[4U] = vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_alu_result [4U]; vlTOPp->Vortex__DOT__e_m_alu_result[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_alu_result @@ -5219,6 +9174,12 @@ void VVortex::_settle__TOP__9(VVortex__Syms* __restrict vlSymsp) { [1U]; vlTOPp->Vortex__DOT__e_m_alu_result[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_alu_result [0U]; + vlTOPp->Vortex__DOT__d_e_valid[7U] = vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_valid + [7U]; + vlTOPp->Vortex__DOT__d_e_valid[6U] = vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_valid + [6U]; + vlTOPp->Vortex__DOT__d_e_valid[5U] = vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_valid + [5U]; vlTOPp->Vortex__DOT__d_e_valid[4U] = vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_valid [4U]; vlTOPp->Vortex__DOT__d_e_valid[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_valid @@ -5229,6 +9190,12 @@ void VVortex::_settle__TOP__9(VVortex__Syms* __restrict vlSymsp) { [1U]; vlTOPp->Vortex__DOT__d_e_valid[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_valid [0U]; + vlTOPp->Vortex__DOT__d_e_a_reg_data[7U] = vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_a_reg_data + [7U]; + vlTOPp->Vortex__DOT__d_e_a_reg_data[6U] = vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_a_reg_data + [6U]; + vlTOPp->Vortex__DOT__d_e_a_reg_data[5U] = vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_a_reg_data + [5U]; vlTOPp->Vortex__DOT__d_e_a_reg_data[4U] = vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_a_reg_data [4U]; vlTOPp->Vortex__DOT__d_e_a_reg_data[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_a_reg_data @@ -5239,6 +9206,12 @@ void VVortex::_settle__TOP__9(VVortex__Syms* __restrict vlSymsp) { [1U]; vlTOPp->Vortex__DOT__d_e_a_reg_data[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_a_reg_data [0U]; + vlTOPp->Vortex__DOT__d_e_b_reg_data[7U] = vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_b_reg_data + [7U]; + vlTOPp->Vortex__DOT__d_e_b_reg_data[6U] = vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_b_reg_data + [6U]; + vlTOPp->Vortex__DOT__d_e_b_reg_data[5U] = vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_b_reg_data + [5U]; vlTOPp->Vortex__DOT__d_e_b_reg_data[4U] = vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_b_reg_data [4U]; vlTOPp->Vortex__DOT__d_e_b_reg_data[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_b_reg_data @@ -5262,6 +9235,15 @@ void VVortex::_settle__TOP__9(VVortex__Syms* __restrict vlSymsp) { >> 0x14U)))) & (0U != (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb))) & (~ (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd))); + vlTOPp->Vortex__DOT__writeback_write_data[7U] = + vlTOPp->Vortex__DOT____Vcellout__vx_writeback__out_write_data + [7U]; + vlTOPp->Vortex__DOT__writeback_write_data[6U] = + vlTOPp->Vortex__DOT____Vcellout__vx_writeback__out_write_data + [6U]; + vlTOPp->Vortex__DOT__writeback_write_data[5U] = + vlTOPp->Vortex__DOT____Vcellout__vx_writeback__out_write_data + [5U]; vlTOPp->Vortex__DOT__writeback_write_data[4U] = vlTOPp->Vortex__DOT____Vcellout__vx_writeback__out_write_data [4U]; @@ -5277,6 +9259,12 @@ void VVortex::_settle__TOP__9(VVortex__Syms* __restrict vlSymsp) { vlTOPp->Vortex__DOT__writeback_write_data[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_writeback__out_write_data [0U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_rd2[7U] + = vlTOPp->Vortex__DOT__e_m_b_reg_data[7U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_rd2[6U] + = vlTOPp->Vortex__DOT__e_m_b_reg_data[6U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_rd2[5U] + = vlTOPp->Vortex__DOT__e_m_b_reg_data[5U]; vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_rd2[4U] = vlTOPp->Vortex__DOT__e_m_b_reg_data[4U]; vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_rd2[3U] @@ -5287,6 +9275,12 @@ void VVortex::_settle__TOP__9(VVortex__Syms* __restrict vlSymsp) { = vlTOPp->Vortex__DOT__e_m_b_reg_data[1U]; vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_rd2[0U] = vlTOPp->Vortex__DOT__e_m_b_reg_data[0U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_valid[7U] + = vlTOPp->Vortex__DOT__e_m_valid[7U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_valid[6U] + = vlTOPp->Vortex__DOT__e_m_valid[6U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_valid[5U] + = vlTOPp->Vortex__DOT__e_m_valid[5U]; vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_valid[4U] = vlTOPp->Vortex__DOT__e_m_valid[4U]; vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_valid[3U] @@ -5297,6 +9291,12 @@ void VVortex::_settle__TOP__9(VVortex__Syms* __restrict vlSymsp) { = vlTOPp->Vortex__DOT__e_m_valid[1U]; vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_valid[0U] = vlTOPp->Vortex__DOT__e_m_valid[0U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result[7U] + = vlTOPp->Vortex__DOT__e_m_alu_result[7U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result[6U] + = vlTOPp->Vortex__DOT__e_m_alu_result[6U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result[5U] + = vlTOPp->Vortex__DOT__e_m_alu_result[5U]; vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result[4U] = vlTOPp->Vortex__DOT__e_m_alu_result[4U]; vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result[3U] @@ -5307,6 +9307,12 @@ void VVortex::_settle__TOP__9(VVortex__Syms* __restrict vlSymsp) { = vlTOPp->Vortex__DOT__e_m_alu_result[1U]; vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result[0U] = vlTOPp->Vortex__DOT__e_m_alu_result[0U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_valid[7U] + = vlTOPp->Vortex__DOT__d_e_valid[7U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_valid[6U] + = vlTOPp->Vortex__DOT__d_e_valid[6U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_valid[5U] + = vlTOPp->Vortex__DOT__d_e_valid[5U]; vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_valid[4U] = vlTOPp->Vortex__DOT__d_e_valid[4U]; vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_valid[3U] @@ -5317,6 +9323,12 @@ void VVortex::_settle__TOP__9(VVortex__Syms* __restrict vlSymsp) { = vlTOPp->Vortex__DOT__d_e_valid[1U]; vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_valid[0U] = vlTOPp->Vortex__DOT__d_e_valid[0U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data[7U] + = vlTOPp->Vortex__DOT__d_e_a_reg_data[7U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data[6U] + = vlTOPp->Vortex__DOT__d_e_a_reg_data[6U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data[5U] + = vlTOPp->Vortex__DOT__d_e_a_reg_data[5U]; vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data[4U] = vlTOPp->Vortex__DOT__d_e_a_reg_data[4U]; vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data[3U] @@ -5327,6 +9339,12 @@ void VVortex::_settle__TOP__9(VVortex__Syms* __restrict vlSymsp) { = vlTOPp->Vortex__DOT__d_e_a_reg_data[1U]; vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data[0U] = vlTOPp->Vortex__DOT__d_e_a_reg_data[0U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_b_reg_data[7U] + = vlTOPp->Vortex__DOT__d_e_b_reg_data[7U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_b_reg_data[6U] + = vlTOPp->Vortex__DOT__d_e_b_reg_data[6U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_b_reg_data[5U] + = vlTOPp->Vortex__DOT__d_e_b_reg_data[5U]; vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_b_reg_data[4U] = vlTOPp->Vortex__DOT__d_e_b_reg_data[4U]; vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_b_reg_data[3U] @@ -5361,6 +9379,15 @@ void VVortex::_settle__TOP__9(VVortex__Syms* __restrict vlSymsp) { != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb))) & (~ (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd))) & (~ (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd))); + vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data[7U] + = vlTOPp->Vortex__DOT__writeback_write_data + [7U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data[6U] + = vlTOPp->Vortex__DOT__writeback_write_data + [6U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data[5U] + = vlTOPp->Vortex__DOT__writeback_write_data + [5U]; vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data[4U] = vlTOPp->Vortex__DOT__writeback_write_data [4U]; @@ -5376,6 +9403,15 @@ void VVortex::_settle__TOP__9(VVortex__Syms* __restrict vlSymsp) { vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data[0U] = vlTOPp->Vortex__DOT__writeback_write_data [0U]; + vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data[7U] + = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_rd2 + [7U]; + vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data[6U] + = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_rd2 + [6U]; + vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data[5U] + = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_rd2 + [5U]; vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data[4U] = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_rd2 [4U]; @@ -5391,6 +9427,15 @@ void VVortex::_settle__TOP__9(VVortex__Syms* __restrict vlSymsp) { vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data[0U] = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_rd2 [0U]; + vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid[7U] + = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_valid + [7U]; + vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid[6U] + = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_valid + [6U]; + vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid[5U] + = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_valid + [5U]; vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid[4U] = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_valid [4U]; @@ -5406,6 +9451,15 @@ void VVortex::_settle__TOP__9(VVortex__Syms* __restrict vlSymsp) { vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid[0U] = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_valid [0U]; + vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_valid[7U] + = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_valid + [7U]; + vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_valid[6U] + = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_valid + [6U]; + vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_valid[5U] + = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_valid + [5U]; vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_valid[4U] = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_valid [4U]; @@ -5475,6 +9529,15 @@ void VVortex::_settle__TOP__9(VVortex__Syms* __restrict vlSymsp) { == vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result [0U]))))); + vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address[7U] + = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result + [7U]; + vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address[6U] + = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result + [6U]; + vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address[5U] + = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result + [5U]; vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address[4U] = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result [4U]; @@ -5490,6 +9553,15 @@ void VVortex::_settle__TOP__9(VVortex__Syms* __restrict vlSymsp) { vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address[0U] = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result [0U]; + vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_alu_result[7U] + = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result + [7U]; + vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_alu_result[6U] + = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result + [6U]; + vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_alu_result[5U] + = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result + [5U]; vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_alu_result[4U] = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result [4U]; @@ -5505,6 +9577,15 @@ void VVortex::_settle__TOP__9(VVortex__Syms* __restrict vlSymsp) { vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_alu_result[0U] = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result [0U]; + vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_valid[7U] + = vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_valid + [7U]; + vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_valid[6U] + = vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_valid + [6U]; + vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_valid[5U] + = vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_valid + [5U]; vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_valid[4U] = vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_valid [4U]; @@ -5520,6 +9601,15 @@ void VVortex::_settle__TOP__9(VVortex__Syms* __restrict vlSymsp) { vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_valid[0U] = vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_valid [0U]; + vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_b_reg_data[7U] + = vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_b_reg_data + [7U]; + vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_b_reg_data[6U] + = vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_b_reg_data + [6U]; + vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_b_reg_data[5U] + = vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_b_reg_data + [5U]; vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_b_reg_data[4U] = vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_b_reg_data [4U]; @@ -5560,6 +9650,21 @@ void VVortex::_settle__TOP__9(VVortex__Syms* __restrict vlSymsp) { ? vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__itype_immed : vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_b_reg_data [4U]); + vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__5__KET____DOT__vx_alu__DOT__ALU_in2 + = ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rs2_src) + ? vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__itype_immed + : vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_b_reg_data + [5U]); + vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__6__KET____DOT__vx_alu__DOT__ALU_in2 + = ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rs2_src) + ? vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__itype_immed + : vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_b_reg_data + [6U]); + vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__7__KET____DOT__vx_alu__DOT__ALU_in2 + = ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rs2_src) + ? vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__itype_immed + : vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_b_reg_data + [7U]); vlTOPp->Vortex__DOT__forwarding_src1_fwd = (((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd) | (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd)) | (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_wb_fwd)); @@ -5574,6 +9679,12 @@ void VVortex::_settle__TOP__9(VVortex__Syms* __restrict vlSymsp) { vlTOPp->Vortex__DOT__forwarding_src2_fwd = (((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd) | (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd)) | (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_wb_fwd)); + vlTOPp->out_cache_driver_in_data[7U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data + [7U]; + vlTOPp->out_cache_driver_in_data[6U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data + [6U]; + vlTOPp->out_cache_driver_in_data[5U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data + [5U]; vlTOPp->out_cache_driver_in_data[4U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data [4U]; vlTOPp->out_cache_driver_in_data[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data @@ -5584,6 +9695,12 @@ void VVortex::_settle__TOP__9(VVortex__Syms* __restrict vlSymsp) { [1U]; vlTOPp->out_cache_driver_in_data[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data [0U]; + vlTOPp->out_cache_driver_in_valid[7U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid + [7U]; + vlTOPp->out_cache_driver_in_valid[6U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid + [6U]; + vlTOPp->out_cache_driver_in_valid[5U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid + [5U]; vlTOPp->out_cache_driver_in_valid[4U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid [4U]; vlTOPp->out_cache_driver_in_valid[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid @@ -5594,6 +9711,12 @@ void VVortex::_settle__TOP__9(VVortex__Syms* __restrict vlSymsp) { [1U]; vlTOPp->out_cache_driver_in_valid[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid [0U]; + vlTOPp->Vortex__DOT__memory_valid[7U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_valid + [7U]; + vlTOPp->Vortex__DOT__memory_valid[6U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_valid + [6U]; + vlTOPp->Vortex__DOT__memory_valid[5U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_valid + [5U]; vlTOPp->Vortex__DOT__memory_valid[4U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_valid [4U]; vlTOPp->Vortex__DOT__memory_valid[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_valid @@ -5605,18 +9728,21 @@ void VVortex::_settle__TOP__9(VVortex__Syms* __restrict vlSymsp) { vlTOPp->Vortex__DOT__memory_valid[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_valid [0U]; // ALWAYS at VX_fetch.v:124 - if (VL_UNLIKELY(((IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal) - & (~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__delay_reg))))) { - vlTOPp->Vortex__DOT__vx_fetch__DOT__temp_PC - = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal_dest; - VL_WRITEF("in_jal_dest: %x\n",32,vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal_dest); - } else { - vlTOPp->Vortex__DOT__vx_fetch__DOT__temp_PC - = (((IData)(vlTOPp->Vortex__DOT__memory_branch_dir) - & (~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__delay_reg))) - ? vlTOPp->Vortex__DOT__memory_branch_dest - : vlTOPp->Vortex__DOT__vx_fetch__DOT__PC_to_use); - } + vlTOPp->Vortex__DOT__vx_fetch__DOT__temp_PC = ( + ((IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal) + & (~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__delay_reg))) + ? vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal_dest + : + (((IData)(vlTOPp->Vortex__DOT__memory_branch_dir) + & (~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__delay_reg))) + ? vlTOPp->Vortex__DOT__memory_branch_dest + : vlTOPp->Vortex__DOT__vx_fetch__DOT__PC_to_use)); + vlTOPp->out_cache_driver_in_address[7U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address + [7U]; + vlTOPp->out_cache_driver_in_address[6U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address + [6U]; + vlTOPp->out_cache_driver_in_address[5U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address + [5U]; vlTOPp->out_cache_driver_in_address[4U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address [4U]; vlTOPp->out_cache_driver_in_address[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address @@ -5627,6 +9753,12 @@ void VVortex::_settle__TOP__9(VVortex__Syms* __restrict vlSymsp) { [1U]; vlTOPp->out_cache_driver_in_address[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address [0U]; + vlTOPp->Vortex__DOT__memory_alu_result[7U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_alu_result + [7U]; + vlTOPp->Vortex__DOT__memory_alu_result[6U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_alu_result + [6U]; + vlTOPp->Vortex__DOT__memory_alu_result[5U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_alu_result + [5U]; vlTOPp->Vortex__DOT__memory_alu_result[4U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_alu_result [4U]; vlTOPp->Vortex__DOT__memory_alu_result[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_alu_result @@ -5637,6 +9769,12 @@ void VVortex::_settle__TOP__9(VVortex__Syms* __restrict vlSymsp) { [1U]; vlTOPp->Vortex__DOT__memory_alu_result[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_alu_result [0U]; + vlTOPp->Vortex__DOT__execute_valid[7U] = vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_valid + [7U]; + vlTOPp->Vortex__DOT__execute_valid[6U] = vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_valid + [6U]; + vlTOPp->Vortex__DOT__execute_valid[5U] = vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_valid + [5U]; vlTOPp->Vortex__DOT__execute_valid[4U] = vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_valid [4U]; vlTOPp->Vortex__DOT__execute_valid[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_valid @@ -5647,6 +9785,12 @@ void VVortex::_settle__TOP__9(VVortex__Syms* __restrict vlSymsp) { [1U]; vlTOPp->Vortex__DOT__execute_valid[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_valid [0U]; + vlTOPp->Vortex__DOT__execute_b_reg_data[7U] = vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_b_reg_data + [7U]; + vlTOPp->Vortex__DOT__execute_b_reg_data[6U] = vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_b_reg_data + [6U]; + vlTOPp->Vortex__DOT__execute_b_reg_data[5U] = vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_b_reg_data + [5U]; vlTOPp->Vortex__DOT__execute_b_reg_data[4U] = vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_b_reg_data [4U]; vlTOPp->Vortex__DOT__execute_b_reg_data[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_b_reg_data @@ -5682,9 +9826,30 @@ void VVortex::_settle__TOP__9(VVortex__Syms* __restrict vlSymsp) { vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data [4U]), VL_EXTENDS_QI(64,32, vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__4__KET____DOT__vx_alu__DOT__ALU_in2)); + vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__5__KET____DOT__vx_alu__DOT__mult_signed_result + = VL_MULS_QQQ(64,64,64, VL_EXTENDS_QI(64,32, + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [5U]), + VL_EXTENDS_QI(64,32, vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__5__KET____DOT__vx_alu__DOT__ALU_in2)); + vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__6__KET____DOT__vx_alu__DOT__mult_signed_result + = VL_MULS_QQQ(64,64,64, VL_EXTENDS_QI(64,32, + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [6U]), + VL_EXTENDS_QI(64,32, vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__6__KET____DOT__vx_alu__DOT__ALU_in2)); + vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__7__KET____DOT__vx_alu__DOT__mult_signed_result + = VL_MULS_QQQ(64,64,64, VL_EXTENDS_QI(64,32, + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [7U]), + VL_EXTENDS_QI(64,32, vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__7__KET____DOT__vx_alu__DOT__ALU_in2)); // ALWAYS at VX_f_d_reg.v:29 VL_WRITEF("in_instruction: %x\n",32,((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__stall) ? 0U : vlTOPp->fe_instruction)); + vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_valid[7U] + = vlTOPp->Vortex__DOT__memory_valid[7U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_valid[6U] + = vlTOPp->Vortex__DOT__memory_valid[6U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_valid[5U] + = vlTOPp->Vortex__DOT__memory_valid[5U]; vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_valid[4U] = vlTOPp->Vortex__DOT__memory_valid[4U]; vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_valid[3U] @@ -5696,11 +9861,12 @@ void VVortex::_settle__TOP__9(VVortex__Syms* __restrict vlSymsp) { vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_valid[0U] = vlTOPp->Vortex__DOT__memory_valid[0U]; vlTOPp->curr_PC = vlTOPp->Vortex__DOT__vx_fetch__DOT__temp_PC; - // ALWAYS at VX_fetch.v:139 - VL_WRITEF("FETCH PC: %x (%x, %x, %x)\n",32,vlTOPp->Vortex__DOT__vx_fetch__DOT__temp_PC, - 32,vlTOPp->Vortex__DOT__vx_fetch__DOT__PC_to_use, - 32,vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal_dest, - 32,vlTOPp->Vortex__DOT__memory_branch_dest); + vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_alu_result[7U] + = vlTOPp->Vortex__DOT__memory_alu_result[7U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_alu_result[6U] + = vlTOPp->Vortex__DOT__memory_alu_result[6U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_alu_result[5U] + = vlTOPp->Vortex__DOT__memory_alu_result[5U]; vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_alu_result[4U] = vlTOPp->Vortex__DOT__memory_alu_result[4U]; vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_alu_result[3U] @@ -5711,6 +9877,12 @@ void VVortex::_settle__TOP__9(VVortex__Syms* __restrict vlSymsp) { = vlTOPp->Vortex__DOT__memory_alu_result[1U]; vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_alu_result[0U] = vlTOPp->Vortex__DOT__memory_alu_result[0U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_alu_result[7U] + = vlTOPp->Vortex__DOT__memory_alu_result[7U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_alu_result[6U] + = vlTOPp->Vortex__DOT__memory_alu_result[6U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_alu_result[5U] + = vlTOPp->Vortex__DOT__memory_alu_result[5U]; vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_alu_result[4U] = vlTOPp->Vortex__DOT__memory_alu_result[4U]; vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_alu_result[3U] @@ -5721,6 +9893,12 @@ void VVortex::_settle__TOP__9(VVortex__Syms* __restrict vlSymsp) { = vlTOPp->Vortex__DOT__memory_alu_result[1U]; vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_alu_result[0U] = vlTOPp->Vortex__DOT__memory_alu_result[0U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_valid[7U] + = vlTOPp->Vortex__DOT__execute_valid[7U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_valid[6U] + = vlTOPp->Vortex__DOT__execute_valid[6U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_valid[5U] + = vlTOPp->Vortex__DOT__execute_valid[5U]; vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_valid[4U] = vlTOPp->Vortex__DOT__execute_valid[4U]; vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_valid[3U] @@ -5731,6 +9909,12 @@ void VVortex::_settle__TOP__9(VVortex__Syms* __restrict vlSymsp) { = vlTOPp->Vortex__DOT__execute_valid[1U]; vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_valid[0U] = vlTOPp->Vortex__DOT__execute_valid[0U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_b_reg_data[7U] + = vlTOPp->Vortex__DOT__execute_b_reg_data[7U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_b_reg_data[6U] + = vlTOPp->Vortex__DOT__execute_b_reg_data[6U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_b_reg_data[5U] + = vlTOPp->Vortex__DOT__execute_b_reg_data[5U]; vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_b_reg_data[4U] = vlTOPp->Vortex__DOT__execute_b_reg_data[4U]; vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_b_reg_data[3U] @@ -6466,6 +10650,441 @@ void VVortex::_settle__TOP__9(VVortex__Syms* __restrict vlSymsp) { [4U] + vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__4__KET____DOT__vx_alu__DOT__ALU_in2))))); } + // ALWAYS at VX_alu.v:48 + if ((0x10U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))) { + if ((8U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))) { + vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__5__KET____DOT__vx_alu__out_alu_result = 0U; + } else { + if ((4U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))) { + vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__5__KET____DOT__vx_alu__out_alu_result + = ((2U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__5__KET____DOT__vx_alu__DOT__ALU_in2) + ? vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [5U] : VL_MODDIV_III(32, + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [5U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__5__KET____DOT__vx_alu__DOT__ALU_in2)) + : ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__5__KET____DOT__vx_alu__DOT__ALU_in2) + ? vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [5U] : VL_MODDIVS_III(32, + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [5U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__5__KET____DOT__vx_alu__DOT__ALU_in2))) + : ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__5__KET____DOT__vx_alu__DOT__ALU_in2) + ? 0xffffffffU : VL_DIV_III(32, + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [5U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__5__KET____DOT__vx_alu__DOT__ALU_in2)) + : ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__5__KET____DOT__vx_alu__DOT__ALU_in2) + ? 0xffffffffU : VL_DIVS_III(32, + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [5U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__5__KET____DOT__vx_alu__DOT__ALU_in2)))); + } else { + if ((2U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))) { + vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__5__KET____DOT__vx_alu__out_alu_result + = ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? (IData)((((QData)((IData)( + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [5U])) + * (QData)((IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__5__KET____DOT__vx_alu__DOT__ALU_in2))) + >> 0x20U)) : (IData)( + (((((QData)((IData)( + VL_NEGATE_I((IData)( + (1U + & (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [5U] + >> 0x1fU)))))) + << 0x20U) + | (QData)((IData)( + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [5U]))) + * (QData)((IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__5__KET____DOT__vx_alu__DOT__ALU_in2))) + >> 0x20U))); + } else { + if (VL_LIKELY((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)))) { + vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__5__KET____DOT__vx_alu__out_alu_result + = (IData)((vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__5__KET____DOT__vx_alu__DOT__mult_signed_result + >> 0x20U)); + } else { + vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__5__KET____DOT__vx_alu__out_alu_result + = (IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__5__KET____DOT__vx_alu__DOT__mult_signed_result); + VL_WRITEF("(%x) %x * %x = %x\n", + 32,vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__curr_PC, + 32,vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [5U],32,vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__5__KET____DOT__vx_alu__DOT__ALU_in2, + 32,vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__5__KET____DOT__vx_alu__out_alu_result); + } + } + } + } + } else { + vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__5__KET____DOT__vx_alu__out_alu_result + = ((8U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? ((4U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? ((2U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? vlTOPp->Vortex__DOT__csr_decode_csr_data + : ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? vlTOPp->Vortex__DOT__csr_decode_csr_data + : (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__curr_PC + + (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__upper_immed + << 0xcU)))) : ((2U + & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? + ((1U + & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? + (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__upper_immed + << 0xcU) + : + ((vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [5U] + >= vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__5__KET____DOT__vx_alu__DOT__ALU_in2) + ? 0U + : 0xffffffffU)) + : + ((1U + & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? + (vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__5__KET____DOT__vx_alu__DOT__ALU_in2 + & vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [5U]) + : + (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [5U] + | vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__5__KET____DOT__vx_alu__DOT__ALU_in2)))) + : ((4U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? ((2U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? VL_SHIFTRS_III(32,32,5, + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [5U], + (0x1fU + & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__5__KET____DOT__vx_alu__DOT__ALU_in2)) + : (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [5U] >> (0x1fU & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__5__KET____DOT__vx_alu__DOT__ALU_in2))) + : ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [5U] ^ vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__5__KET____DOT__vx_alu__DOT__ALU_in2) + : ((vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [5U] < vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__5__KET____DOT__vx_alu__DOT__ALU_in2) + ? 1U : 0U))) : ((2U + & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? + ((1U + & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? + (VL_LTS_III(1,32,32, + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [5U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__5__KET____DOT__vx_alu__DOT__ALU_in2) + ? 1U + : 0U) + : + (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [5U] + << + (0x1fU + & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__5__KET____DOT__vx_alu__DOT__ALU_in2))) + : + ((1U + & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? + (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [5U] + - vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__5__KET____DOT__vx_alu__DOT__ALU_in2) + : + (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [5U] + + vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__5__KET____DOT__vx_alu__DOT__ALU_in2))))); + } + // ALWAYS at VX_alu.v:48 + if ((0x10U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))) { + if ((8U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))) { + vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__6__KET____DOT__vx_alu__out_alu_result = 0U; + } else { + if ((4U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))) { + vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__6__KET____DOT__vx_alu__out_alu_result + = ((2U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__6__KET____DOT__vx_alu__DOT__ALU_in2) + ? vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [6U] : VL_MODDIV_III(32, + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [6U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__6__KET____DOT__vx_alu__DOT__ALU_in2)) + : ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__6__KET____DOT__vx_alu__DOT__ALU_in2) + ? vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [6U] : VL_MODDIVS_III(32, + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [6U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__6__KET____DOT__vx_alu__DOT__ALU_in2))) + : ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__6__KET____DOT__vx_alu__DOT__ALU_in2) + ? 0xffffffffU : VL_DIV_III(32, + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [6U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__6__KET____DOT__vx_alu__DOT__ALU_in2)) + : ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__6__KET____DOT__vx_alu__DOT__ALU_in2) + ? 0xffffffffU : VL_DIVS_III(32, + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [6U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__6__KET____DOT__vx_alu__DOT__ALU_in2)))); + } else { + if ((2U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))) { + vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__6__KET____DOT__vx_alu__out_alu_result + = ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? (IData)((((QData)((IData)( + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [6U])) + * (QData)((IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__6__KET____DOT__vx_alu__DOT__ALU_in2))) + >> 0x20U)) : (IData)( + (((((QData)((IData)( + VL_NEGATE_I((IData)( + (1U + & (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [6U] + >> 0x1fU)))))) + << 0x20U) + | (QData)((IData)( + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [6U]))) + * (QData)((IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__6__KET____DOT__vx_alu__DOT__ALU_in2))) + >> 0x20U))); + } else { + if (VL_LIKELY((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)))) { + vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__6__KET____DOT__vx_alu__out_alu_result + = (IData)((vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__6__KET____DOT__vx_alu__DOT__mult_signed_result + >> 0x20U)); + } else { + vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__6__KET____DOT__vx_alu__out_alu_result + = (IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__6__KET____DOT__vx_alu__DOT__mult_signed_result); + VL_WRITEF("(%x) %x * %x = %x\n", + 32,vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__curr_PC, + 32,vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [6U],32,vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__6__KET____DOT__vx_alu__DOT__ALU_in2, + 32,vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__6__KET____DOT__vx_alu__out_alu_result); + } + } + } + } + } else { + vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__6__KET____DOT__vx_alu__out_alu_result + = ((8U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? ((4U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? ((2U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? vlTOPp->Vortex__DOT__csr_decode_csr_data + : ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? vlTOPp->Vortex__DOT__csr_decode_csr_data + : (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__curr_PC + + (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__upper_immed + << 0xcU)))) : ((2U + & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? + ((1U + & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? + (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__upper_immed + << 0xcU) + : + ((vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [6U] + >= vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__6__KET____DOT__vx_alu__DOT__ALU_in2) + ? 0U + : 0xffffffffU)) + : + ((1U + & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? + (vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__6__KET____DOT__vx_alu__DOT__ALU_in2 + & vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [6U]) + : + (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [6U] + | vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__6__KET____DOT__vx_alu__DOT__ALU_in2)))) + : ((4U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? ((2U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? VL_SHIFTRS_III(32,32,5, + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [6U], + (0x1fU + & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__6__KET____DOT__vx_alu__DOT__ALU_in2)) + : (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [6U] >> (0x1fU & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__6__KET____DOT__vx_alu__DOT__ALU_in2))) + : ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [6U] ^ vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__6__KET____DOT__vx_alu__DOT__ALU_in2) + : ((vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [6U] < vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__6__KET____DOT__vx_alu__DOT__ALU_in2) + ? 1U : 0U))) : ((2U + & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? + ((1U + & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? + (VL_LTS_III(1,32,32, + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [6U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__6__KET____DOT__vx_alu__DOT__ALU_in2) + ? 1U + : 0U) + : + (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [6U] + << + (0x1fU + & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__6__KET____DOT__vx_alu__DOT__ALU_in2))) + : + ((1U + & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? + (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [6U] + - vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__6__KET____DOT__vx_alu__DOT__ALU_in2) + : + (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [6U] + + vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__6__KET____DOT__vx_alu__DOT__ALU_in2))))); + } + // ALWAYS at VX_alu.v:48 + if ((0x10U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))) { + if ((8U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))) { + vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__7__KET____DOT__vx_alu__out_alu_result = 0U; + } else { + if ((4U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))) { + vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__7__KET____DOT__vx_alu__out_alu_result + = ((2U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__7__KET____DOT__vx_alu__DOT__ALU_in2) + ? vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [7U] : VL_MODDIV_III(32, + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [7U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__7__KET____DOT__vx_alu__DOT__ALU_in2)) + : ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__7__KET____DOT__vx_alu__DOT__ALU_in2) + ? vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [7U] : VL_MODDIVS_III(32, + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [7U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__7__KET____DOT__vx_alu__DOT__ALU_in2))) + : ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__7__KET____DOT__vx_alu__DOT__ALU_in2) + ? 0xffffffffU : VL_DIV_III(32, + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [7U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__7__KET____DOT__vx_alu__DOT__ALU_in2)) + : ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__7__KET____DOT__vx_alu__DOT__ALU_in2) + ? 0xffffffffU : VL_DIVS_III(32, + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [7U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__7__KET____DOT__vx_alu__DOT__ALU_in2)))); + } else { + if ((2U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op))) { + vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__7__KET____DOT__vx_alu__out_alu_result + = ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? (IData)((((QData)((IData)( + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [7U])) + * (QData)((IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__7__KET____DOT__vx_alu__DOT__ALU_in2))) + >> 0x20U)) : (IData)( + (((((QData)((IData)( + VL_NEGATE_I((IData)( + (1U + & (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [7U] + >> 0x1fU)))))) + << 0x20U) + | (QData)((IData)( + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [7U]))) + * (QData)((IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__7__KET____DOT__vx_alu__DOT__ALU_in2))) + >> 0x20U))); + } else { + if (VL_LIKELY((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)))) { + vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__7__KET____DOT__vx_alu__out_alu_result + = (IData)((vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__7__KET____DOT__vx_alu__DOT__mult_signed_result + >> 0x20U)); + } else { + vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__7__KET____DOT__vx_alu__out_alu_result + = (IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__7__KET____DOT__vx_alu__DOT__mult_signed_result); + VL_WRITEF("(%x) %x * %x = %x\n", + 32,vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__curr_PC, + 32,vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [7U],32,vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__7__KET____DOT__vx_alu__DOT__ALU_in2, + 32,vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__7__KET____DOT__vx_alu__out_alu_result); + } + } + } + } + } else { + vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__7__KET____DOT__vx_alu__out_alu_result + = ((8U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? ((4U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? ((2U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? vlTOPp->Vortex__DOT__csr_decode_csr_data + : ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? vlTOPp->Vortex__DOT__csr_decode_csr_data + : (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__curr_PC + + (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__upper_immed + << 0xcU)))) : ((2U + & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? + ((1U + & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? + (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__upper_immed + << 0xcU) + : + ((vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [7U] + >= vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__7__KET____DOT__vx_alu__DOT__ALU_in2) + ? 0U + : 0xffffffffU)) + : + ((1U + & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? + (vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__7__KET____DOT__vx_alu__DOT__ALU_in2 + & vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [7U]) + : + (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [7U] + | vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__7__KET____DOT__vx_alu__DOT__ALU_in2)))) + : ((4U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? ((2U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? VL_SHIFTRS_III(32,32,5, + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [7U], + (0x1fU + & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__7__KET____DOT__vx_alu__DOT__ALU_in2)) + : (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [7U] >> (0x1fU & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__7__KET____DOT__vx_alu__DOT__ALU_in2))) + : ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [7U] ^ vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__7__KET____DOT__vx_alu__DOT__ALU_in2) + : ((vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [7U] < vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__7__KET____DOT__vx_alu__DOT__ALU_in2) + ? 1U : 0U))) : ((2U + & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? + ((1U + & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? + (VL_LTS_III(1,32,32, + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [7U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__7__KET____DOT__vx_alu__DOT__ALU_in2) + ? 1U + : 0U) + : + (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [7U] + << + (0x1fU + & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__7__KET____DOT__vx_alu__DOT__ALU_in2))) + : + ((1U + & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? + (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [7U] + - vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__7__KET____DOT__vx_alu__DOT__ALU_in2) + : + (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [7U] + + vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__7__KET____DOT__vx_alu__DOT__ALU_in2))))); + } vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_alu_result[0U] = vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__0__KET____DOT__vx_alu__out_alu_result; vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_alu_result[1U] @@ -6476,6 +11095,18 @@ void VVortex::_settle__TOP__9(VVortex__Syms* __restrict vlSymsp) { = vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__3__KET____DOT__vx_alu__out_alu_result; vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_alu_result[4U] = vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__4__KET____DOT__vx_alu__out_alu_result; + vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_alu_result[5U] + = vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__5__KET____DOT__vx_alu__out_alu_result; + vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_alu_result[6U] + = vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__6__KET____DOT__vx_alu__out_alu_result; + vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_alu_result[7U] + = vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__7__KET____DOT__vx_alu__out_alu_result; + vlTOPp->Vortex__DOT__execute_alu_result[7U] = vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_alu_result + [7U]; + vlTOPp->Vortex__DOT__execute_alu_result[6U] = vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_alu_result + [6U]; + vlTOPp->Vortex__DOT__execute_alu_result[5U] = vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_alu_result + [5U]; vlTOPp->Vortex__DOT__execute_alu_result[4U] = vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_alu_result [4U]; vlTOPp->Vortex__DOT__execute_alu_result[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_alu_result @@ -6486,6 +11117,12 @@ void VVortex::_settle__TOP__9(VVortex__Syms* __restrict vlSymsp) { [1U]; vlTOPp->Vortex__DOT__execute_alu_result[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_alu_result [0U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_alu_result[7U] + = vlTOPp->Vortex__DOT__execute_alu_result[7U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_alu_result[6U] + = vlTOPp->Vortex__DOT__execute_alu_result[6U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_alu_result[5U] + = vlTOPp->Vortex__DOT__execute_alu_result[5U]; vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_alu_result[4U] = vlTOPp->Vortex__DOT__execute_alu_result[4U]; vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_alu_result[3U] @@ -6496,6 +11133,12 @@ void VVortex::_settle__TOP__9(VVortex__Syms* __restrict vlSymsp) { = vlTOPp->Vortex__DOT__execute_alu_result[1U]; vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_alu_result[0U] = vlTOPp->Vortex__DOT__execute_alu_result[0U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result[7U] + = vlTOPp->Vortex__DOT__execute_alu_result[7U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result[6U] + = vlTOPp->Vortex__DOT__execute_alu_result[6U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result[5U] + = vlTOPp->Vortex__DOT__execute_alu_result[5U]; vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result[4U] = vlTOPp->Vortex__DOT__execute_alu_result[4U]; vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result[3U] @@ -6506,6 +11149,90 @@ void VVortex::_settle__TOP__9(VVortex__Syms* __restrict vlSymsp) { = vlTOPp->Vortex__DOT__execute_alu_result[1U]; vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result[0U] = vlTOPp->Vortex__DOT__execute_alu_result[0U]; + vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src1_fwd_data[7U] + = ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd) + ? ((3U == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb)) + ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next + [7U] : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result + [7U]) : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd) + ? ((3U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb)) + ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next + [7U] : ((2U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb)) + ? vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_mem_data + [7U] : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_alu_result + [7U])) : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_wb_fwd) + ? ((3U + == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) + ? + vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next + [7U] + : + ((2U + == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) + ? + vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_mem_data + [7U] + : + vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_alu_result + [7U])) + : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result + [7U]))); + vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src1_fwd_data[6U] + = ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd) + ? ((3U == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb)) + ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next + [6U] : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result + [6U]) : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd) + ? ((3U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb)) + ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next + [6U] : ((2U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb)) + ? vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_mem_data + [6U] : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_alu_result + [6U])) : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_wb_fwd) + ? ((3U + == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) + ? + vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next + [6U] + : + ((2U + == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) + ? + vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_mem_data + [6U] + : + vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_alu_result + [6U])) + : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result + [6U]))); + vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src1_fwd_data[5U] + = ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd) + ? ((3U == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb)) + ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next + [5U] : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result + [5U]) : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd) + ? ((3U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb)) + ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next + [5U] : ((2U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb)) + ? vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_mem_data + [5U] : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_alu_result + [5U])) : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_wb_fwd) + ? ((3U + == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) + ? + vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next + [5U] + : + ((2U + == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) + ? + vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_mem_data + [5U] + : + vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_alu_result + [5U])) + : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result + [5U]))); vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src1_fwd_data[4U] = ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd) ? ((3U == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb)) @@ -6646,6 +11373,90 @@ void VVortex::_settle__TOP__9(VVortex__Syms* __restrict vlSymsp) { [0U])) : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result [0U]))); + vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src2_fwd_data[7U] + = ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd) + ? ((3U == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb)) + ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next + [7U] : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result + [7U]) : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd) + ? ((3U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb)) + ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next + [7U] : ((2U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb)) + ? vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_mem_data + [7U] : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_alu_result + [7U])) : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_wb_fwd) + ? ((3U + == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) + ? + vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next + [7U] + : + ((2U + == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) + ? + vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_mem_data + [7U] + : + vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_alu_result + [7U])) + : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result + [7U]))); + vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src2_fwd_data[6U] + = ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd) + ? ((3U == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb)) + ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next + [6U] : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result + [6U]) : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd) + ? ((3U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb)) + ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next + [6U] : ((2U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb)) + ? vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_mem_data + [6U] : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_alu_result + [6U])) : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_wb_fwd) + ? ((3U + == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) + ? + vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next + [6U] + : + ((2U + == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) + ? + vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_mem_data + [6U] + : + vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_alu_result + [6U])) + : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result + [6U]))); + vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src2_fwd_data[5U] + = ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd) + ? ((3U == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb)) + ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next + [5U] : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result + [5U]) : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd) + ? ((3U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb)) + ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next + [5U] : ((2U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb)) + ? vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_mem_data + [5U] : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_alu_result + [5U])) : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_wb_fwd) + ? ((3U + == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) + ? + vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next + [5U] + : + ((2U + == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) + ? + vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_mem_data + [5U] + : + vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_alu_result + [5U])) + : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result + [5U]))); vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src2_fwd_data[4U] = ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd) ? ((3U == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb)) @@ -6786,6 +11597,15 @@ void VVortex::_settle__TOP__9(VVortex__Syms* __restrict vlSymsp) { [0U])) : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result [0U]))); + vlTOPp->Vortex__DOT__forwarding_src1_fwd_data[7U] + = vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src1_fwd_data + [7U]; + vlTOPp->Vortex__DOT__forwarding_src1_fwd_data[6U] + = vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src1_fwd_data + [6U]; + vlTOPp->Vortex__DOT__forwarding_src1_fwd_data[5U] + = vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src1_fwd_data + [5U]; vlTOPp->Vortex__DOT__forwarding_src1_fwd_data[4U] = vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src1_fwd_data [4U]; @@ -6801,6 +11621,15 @@ void VVortex::_settle__TOP__9(VVortex__Syms* __restrict vlSymsp) { vlTOPp->Vortex__DOT__forwarding_src1_fwd_data[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src1_fwd_data [0U]; + vlTOPp->Vortex__DOT__forwarding_src2_fwd_data[7U] + = vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src2_fwd_data + [7U]; + vlTOPp->Vortex__DOT__forwarding_src2_fwd_data[6U] + = vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src2_fwd_data + [6U]; + vlTOPp->Vortex__DOT__forwarding_src2_fwd_data[5U] + = vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src2_fwd_data + [5U]; vlTOPp->Vortex__DOT__forwarding_src2_fwd_data[4U] = vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src2_fwd_data [4U]; @@ -6816,6 +11645,15 @@ void VVortex::_settle__TOP__9(VVortex__Syms* __restrict vlSymsp) { vlTOPp->Vortex__DOT__forwarding_src2_fwd_data[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src2_fwd_data [0U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data[7U] + = vlTOPp->Vortex__DOT__forwarding_src1_fwd_data + [7U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data[6U] + = vlTOPp->Vortex__DOT__forwarding_src1_fwd_data + [6U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data[5U] + = vlTOPp->Vortex__DOT__forwarding_src1_fwd_data + [5U]; vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data[4U] = vlTOPp->Vortex__DOT__forwarding_src1_fwd_data [4U]; @@ -6831,6 +11669,15 @@ void VVortex::_settle__TOP__9(VVortex__Syms* __restrict vlSymsp) { vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data[0U] = vlTOPp->Vortex__DOT__forwarding_src1_fwd_data [0U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data[7U] + = vlTOPp->Vortex__DOT__forwarding_src2_fwd_data + [7U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data[6U] + = vlTOPp->Vortex__DOT__forwarding_src2_fwd_data + [6U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data[5U] + = vlTOPp->Vortex__DOT__forwarding_src2_fwd_data + [5U]; vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data[4U] = vlTOPp->Vortex__DOT__forwarding_src2_fwd_data [4U]; @@ -6881,6 +11728,27 @@ void VVortex::_settle__TOP__9(VVortex__Syms* __restrict vlSymsp) { ? vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data [4U] : vlTOPp->Vortex__DOT__vx_decode__DOT__rd1_register [4U])); + vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_a_reg_data[5U] + = ((0x6fU == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) + ? vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__curr_PC + : ((IData)(vlTOPp->Vortex__DOT__forwarding_src1_fwd) + ? vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data + [5U] : vlTOPp->Vortex__DOT__vx_decode__DOT__rd1_register + [5U])); + vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_a_reg_data[6U] + = ((0x6fU == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) + ? vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__curr_PC + : ((IData)(vlTOPp->Vortex__DOT__forwarding_src1_fwd) + ? vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data + [6U] : vlTOPp->Vortex__DOT__vx_decode__DOT__rd1_register + [6U])); + vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_a_reg_data[7U] + = ((0x6fU == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) + ? vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__curr_PC + : ((IData)(vlTOPp->Vortex__DOT__forwarding_src1_fwd) + ? vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data + [7U] : vlTOPp->Vortex__DOT__vx_decode__DOT__rd1_register + [7U])); vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_b_reg_data[0U] = ((IData)(vlTOPp->Vortex__DOT__forwarding_src2_fwd) ? vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data @@ -6906,6 +11774,27 @@ void VVortex::_settle__TOP__9(VVortex__Syms* __restrict vlSymsp) { ? vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data [4U] : vlTOPp->Vortex__DOT__vx_decode__DOT__rd2_register [4U]); + vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_b_reg_data[5U] + = ((IData)(vlTOPp->Vortex__DOT__forwarding_src2_fwd) + ? vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data + [5U] : vlTOPp->Vortex__DOT__vx_decode__DOT__rd2_register + [5U]); + vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_b_reg_data[6U] + = ((IData)(vlTOPp->Vortex__DOT__forwarding_src2_fwd) + ? vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data + [6U] : vlTOPp->Vortex__DOT__vx_decode__DOT__rd2_register + [6U]); + vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_b_reg_data[7U] + = ((IData)(vlTOPp->Vortex__DOT__forwarding_src2_fwd) + ? vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data + [7U] : vlTOPp->Vortex__DOT__vx_decode__DOT__rd2_register + [7U]); + vlTOPp->Vortex__DOT__decode_a_reg_data[7U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_a_reg_data + [7U]; + vlTOPp->Vortex__DOT__decode_a_reg_data[6U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_a_reg_data + [6U]; + vlTOPp->Vortex__DOT__decode_a_reg_data[5U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_a_reg_data + [5U]; vlTOPp->Vortex__DOT__decode_a_reg_data[4U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_a_reg_data [4U]; vlTOPp->Vortex__DOT__decode_a_reg_data[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_a_reg_data @@ -6916,11 +11805,12 @@ void VVortex::_settle__TOP__9(VVortex__Syms* __restrict vlSymsp) { [1U]; vlTOPp->Vortex__DOT__decode_a_reg_data[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_a_reg_data [0U]; - // ALWAYS at VX_decode.v:240 - if (VL_UNLIKELY(vlTOPp->Vortex__DOT__vx_decode__DOT__is_jalrs)) { - VL_WRITEF("JALRS WOHOOO: rs2 - %x\n",32,vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_b_reg_data - [0U]); - } + vlTOPp->Vortex__DOT__decode_b_reg_data[7U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_b_reg_data + [7U]; + vlTOPp->Vortex__DOT__decode_b_reg_data[6U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_b_reg_data + [6U]; + vlTOPp->Vortex__DOT__decode_b_reg_data[5U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_b_reg_data + [5U]; vlTOPp->Vortex__DOT__decode_b_reg_data[4U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_b_reg_data [4U]; vlTOPp->Vortex__DOT__decode_b_reg_data[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_b_reg_data @@ -6946,6 +11836,21 @@ void VVortex::_settle__TOP__9(VVortex__Syms* __restrict vlSymsp) { vlTOPp->Vortex__DOT__vx_decode__DOT__jalrs_thread_mask[4U] = VL_LTES_III(1,32,32, 4U, vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_b_reg_data [0U]); + vlTOPp->Vortex__DOT__vx_decode__DOT__jalrs_thread_mask[5U] + = VL_LTES_III(1,32,32, 5U, vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_b_reg_data + [0U]); + vlTOPp->Vortex__DOT__vx_decode__DOT__jalrs_thread_mask[6U] + = VL_LTES_III(1,32,32, 6U, vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_b_reg_data + [0U]); + vlTOPp->Vortex__DOT__vx_decode__DOT__jalrs_thread_mask[7U] + = VL_LTES_III(1,32,32, 7U, vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_b_reg_data + [0U]); + vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_a_reg_data[7U] + = vlTOPp->Vortex__DOT__decode_a_reg_data[7U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_a_reg_data[6U] + = vlTOPp->Vortex__DOT__decode_a_reg_data[6U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_a_reg_data[5U] + = vlTOPp->Vortex__DOT__decode_a_reg_data[5U]; vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_a_reg_data[4U] = vlTOPp->Vortex__DOT__decode_a_reg_data[4U]; vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_a_reg_data[3U] @@ -6956,6 +11861,12 @@ void VVortex::_settle__TOP__9(VVortex__Syms* __restrict vlSymsp) { = vlTOPp->Vortex__DOT__decode_a_reg_data[1U]; vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_a_reg_data[0U] = vlTOPp->Vortex__DOT__decode_a_reg_data[0U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_b_reg_data[7U] + = vlTOPp->Vortex__DOT__decode_b_reg_data[7U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_b_reg_data[6U] + = vlTOPp->Vortex__DOT__decode_b_reg_data[6U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_b_reg_data[5U] + = vlTOPp->Vortex__DOT__decode_b_reg_data[5U]; vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_b_reg_data[4U] = vlTOPp->Vortex__DOT__decode_b_reg_data[4U]; vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_b_reg_data[3U] @@ -6966,6 +11877,21 @@ void VVortex::_settle__TOP__9(VVortex__Syms* __restrict vlSymsp) { = vlTOPp->Vortex__DOT__decode_b_reg_data[1U]; vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_b_reg_data[0U] = vlTOPp->Vortex__DOT__decode_b_reg_data[0U]; + vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_thread_mask[7U] + = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_jalrs) + ? vlTOPp->Vortex__DOT__vx_decode__DOT__jalrs_thread_mask + [7U] : vlTOPp->Vortex__DOT__vx_decode__DOT__jmprt_thread_mask + [7U]); + vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_thread_mask[6U] + = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_jalrs) + ? vlTOPp->Vortex__DOT__vx_decode__DOT__jalrs_thread_mask + [6U] : vlTOPp->Vortex__DOT__vx_decode__DOT__jmprt_thread_mask + [6U]); + vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_thread_mask[5U] + = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_jalrs) + ? vlTOPp->Vortex__DOT__vx_decode__DOT__jalrs_thread_mask + [5U] : vlTOPp->Vortex__DOT__vx_decode__DOT__jmprt_thread_mask + [5U]); vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_thread_mask[4U] = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_jalrs) ? vlTOPp->Vortex__DOT__vx_decode__DOT__jalrs_thread_mask @@ -6991,6 +11917,12 @@ void VVortex::_settle__TOP__9(VVortex__Syms* __restrict vlSymsp) { ? vlTOPp->Vortex__DOT__vx_decode__DOT__jalrs_thread_mask [0U] : vlTOPp->Vortex__DOT__vx_decode__DOT__jmprt_thread_mask [0U]); + vlTOPp->Vortex__DOT__decode_thread_mask[7U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_thread_mask + [7U]; + vlTOPp->Vortex__DOT__decode_thread_mask[6U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_thread_mask + [6U]; + vlTOPp->Vortex__DOT__decode_thread_mask[5U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_thread_mask + [5U]; vlTOPp->Vortex__DOT__decode_thread_mask[4U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_thread_mask [4U]; vlTOPp->Vortex__DOT__decode_thread_mask[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_thread_mask @@ -7001,6 +11933,12 @@ void VVortex::_settle__TOP__9(VVortex__Syms* __restrict vlSymsp) { [1U]; vlTOPp->Vortex__DOT__decode_thread_mask[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_thread_mask [0U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask[7U] + = vlTOPp->Vortex__DOT__decode_thread_mask[7U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask[6U] + = vlTOPp->Vortex__DOT__decode_thread_mask[6U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask[5U] + = vlTOPp->Vortex__DOT__decode_thread_mask[5U]; vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask[4U] = vlTOPp->Vortex__DOT__decode_thread_mask[4U]; vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask[3U] @@ -7012,10 +11950,16 @@ void VVortex::_settle__TOP__9(VVortex__Syms* __restrict vlSymsp) { vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask[0U] = vlTOPp->Vortex__DOT__decode_thread_mask[0U]; // ALWAYS at VX_fetch.v:69 - if (VL_UNLIKELY(vlTOPp->Vortex__DOT__decode_change_mask)) { - VL_WRITEF("CHANGING MASK: [%1# %1#]\n",1,vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask - [0U],1,vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask - [1U]); + if (vlTOPp->Vortex__DOT__decode_change_mask) { + vlTOPp->Vortex__DOT__vx_fetch__DOT__valid[7U] + = vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask + [7U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__valid[6U] + = vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask + [6U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__valid[5U] + = vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask + [5U]; vlTOPp->Vortex__DOT__vx_fetch__DOT__valid[4U] = vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask [4U]; @@ -7062,6 +12006,30 @@ void VVortex::_settle__TOP__9(VVortex__Syms* __restrict vlSymsp) { [4U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__stall)) & vlTOPp->Vortex__DOT__vx_fetch__DOT__valid [4U])); + vlTOPp->Vortex__DOT____Vcellout__vx_fetch__out_valid[5U] + = ((IData)(vlTOPp->Vortex__DOT__decode_change_mask) + ? vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask + [5U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__stall)) + & vlTOPp->Vortex__DOT__vx_fetch__DOT__valid + [5U])); + vlTOPp->Vortex__DOT____Vcellout__vx_fetch__out_valid[6U] + = ((IData)(vlTOPp->Vortex__DOT__decode_change_mask) + ? vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask + [6U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__stall)) + & vlTOPp->Vortex__DOT__vx_fetch__DOT__valid + [6U])); + vlTOPp->Vortex__DOT____Vcellout__vx_fetch__out_valid[7U] + = ((IData)(vlTOPp->Vortex__DOT__decode_change_mask) + ? vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask + [7U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__stall)) + & vlTOPp->Vortex__DOT__vx_fetch__DOT__valid + [7U])); + vlTOPp->Vortex__DOT__fetch_valid[7U] = vlTOPp->Vortex__DOT____Vcellout__vx_fetch__out_valid + [7U]; + vlTOPp->Vortex__DOT__fetch_valid[6U] = vlTOPp->Vortex__DOT____Vcellout__vx_fetch__out_valid + [6U]; + vlTOPp->Vortex__DOT__fetch_valid[5U] = vlTOPp->Vortex__DOT____Vcellout__vx_fetch__out_valid + [5U]; vlTOPp->Vortex__DOT__fetch_valid[4U] = vlTOPp->Vortex__DOT____Vcellout__vx_fetch__out_valid [4U]; vlTOPp->Vortex__DOT__fetch_valid[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_fetch__out_valid @@ -7072,6 +12040,12 @@ void VVortex::_settle__TOP__9(VVortex__Syms* __restrict vlSymsp) { [1U]; vlTOPp->Vortex__DOT__fetch_valid[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_fetch__out_valid [0U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_f_d_reg__in_valid[7U] + = vlTOPp->Vortex__DOT__fetch_valid[7U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_f_d_reg__in_valid[6U] + = vlTOPp->Vortex__DOT__fetch_valid[6U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_f_d_reg__in_valid[5U] + = vlTOPp->Vortex__DOT__fetch_valid[5U]; vlTOPp->Vortex__DOT____Vcellinp__vx_f_d_reg__in_valid[4U] = vlTOPp->Vortex__DOT__fetch_valid[4U]; vlTOPp->Vortex__DOT____Vcellinp__vx_f_d_reg__in_valid[3U] @@ -7084,10 +12058,94 @@ void VVortex::_settle__TOP__9(VVortex__Syms* __restrict vlSymsp) { = vlTOPp->Vortex__DOT__fetch_valid[0U]; } -VL_INLINE_OPT void VVortex::_combo__TOP__10(VVortex__Syms* __restrict vlSymsp) { - VL_DEBUG_IF(VL_DBG_MSGF("+ VVortex::_combo__TOP__10\n"); ); +VL_INLINE_OPT void VVortex::_combo__TOP__9(VVortex__Syms* __restrict vlSymsp) { + VL_DEBUG_IF(VL_DBG_MSGF("+ VVortex::_combo__TOP__9\n"); ); VVortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; // Body + vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src1_fwd_data[7U] + = ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd) + ? ((3U == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb)) + ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next + [7U] : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result + [7U]) : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd) + ? ((3U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb)) + ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next + [7U] : ((2U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb)) + ? vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_mem_data + [7U] : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_alu_result + [7U])) : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_wb_fwd) + ? ((3U + == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) + ? + vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next + [7U] + : + ((2U + == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) + ? + vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_mem_data + [7U] + : + vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_alu_result + [7U])) + : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result + [7U]))); + vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src1_fwd_data[6U] + = ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd) + ? ((3U == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb)) + ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next + [6U] : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result + [6U]) : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd) + ? ((3U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb)) + ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next + [6U] : ((2U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb)) + ? vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_mem_data + [6U] : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_alu_result + [6U])) : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_wb_fwd) + ? ((3U + == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) + ? + vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next + [6U] + : + ((2U + == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) + ? + vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_mem_data + [6U] + : + vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_alu_result + [6U])) + : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result + [6U]))); + vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src1_fwd_data[5U] + = ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd) + ? ((3U == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb)) + ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next + [5U] : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result + [5U]) : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd) + ? ((3U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb)) + ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next + [5U] : ((2U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb)) + ? vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_mem_data + [5U] : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_alu_result + [5U])) : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_wb_fwd) + ? ((3U + == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) + ? + vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next + [5U] + : + ((2U + == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) + ? + vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_mem_data + [5U] + : + vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_alu_result + [5U])) + : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result + [5U]))); vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src1_fwd_data[4U] = ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd) ? ((3U == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb)) @@ -7228,6 +12286,90 @@ VL_INLINE_OPT void VVortex::_combo__TOP__10(VVortex__Syms* __restrict vlSymsp) { [0U])) : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result [0U]))); + vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src2_fwd_data[7U] + = ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd) + ? ((3U == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb)) + ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next + [7U] : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result + [7U]) : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd) + ? ((3U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb)) + ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next + [7U] : ((2U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb)) + ? vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_mem_data + [7U] : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_alu_result + [7U])) : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_wb_fwd) + ? ((3U + == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) + ? + vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next + [7U] + : + ((2U + == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) + ? + vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_mem_data + [7U] + : + vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_alu_result + [7U])) + : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result + [7U]))); + vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src2_fwd_data[6U] + = ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd) + ? ((3U == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb)) + ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next + [6U] : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result + [6U]) : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd) + ? ((3U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb)) + ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next + [6U] : ((2U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb)) + ? vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_mem_data + [6U] : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_alu_result + [6U])) : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_wb_fwd) + ? ((3U + == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) + ? + vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next + [6U] + : + ((2U + == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) + ? + vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_mem_data + [6U] + : + vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_alu_result + [6U])) + : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result + [6U]))); + vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src2_fwd_data[5U] + = ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd) + ? ((3U == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb)) + ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next + [5U] : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result + [5U]) : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd) + ? ((3U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb)) + ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next + [5U] : ((2U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb)) + ? vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_mem_data + [5U] : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_alu_result + [5U])) : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_wb_fwd) + ? ((3U + == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) + ? + vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next + [5U] + : + ((2U + == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) + ? + vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_mem_data + [5U] + : + vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_alu_result + [5U])) + : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result + [5U]))); vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src2_fwd_data[4U] = ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd) ? ((3U == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb)) @@ -7371,6 +12513,15 @@ VL_INLINE_OPT void VVortex::_combo__TOP__10(VVortex__Syms* __restrict vlSymsp) { // ALWAYS at VX_f_d_reg.v:29 VL_WRITEF("in_instruction: %x\n",32,((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__stall) ? 0U : vlTOPp->fe_instruction)); + vlTOPp->Vortex__DOT__forwarding_src1_fwd_data[7U] + = vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src1_fwd_data + [7U]; + vlTOPp->Vortex__DOT__forwarding_src1_fwd_data[6U] + = vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src1_fwd_data + [6U]; + vlTOPp->Vortex__DOT__forwarding_src1_fwd_data[5U] + = vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src1_fwd_data + [5U]; vlTOPp->Vortex__DOT__forwarding_src1_fwd_data[4U] = vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src1_fwd_data [4U]; @@ -7386,6 +12537,15 @@ VL_INLINE_OPT void VVortex::_combo__TOP__10(VVortex__Syms* __restrict vlSymsp) { vlTOPp->Vortex__DOT__forwarding_src1_fwd_data[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src1_fwd_data [0U]; + vlTOPp->Vortex__DOT__forwarding_src2_fwd_data[7U] + = vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src2_fwd_data + [7U]; + vlTOPp->Vortex__DOT__forwarding_src2_fwd_data[6U] + = vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src2_fwd_data + [6U]; + vlTOPp->Vortex__DOT__forwarding_src2_fwd_data[5U] + = vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src2_fwd_data + [5U]; vlTOPp->Vortex__DOT__forwarding_src2_fwd_data[4U] = vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src2_fwd_data [4U]; @@ -7401,6 +12561,15 @@ VL_INLINE_OPT void VVortex::_combo__TOP__10(VVortex__Syms* __restrict vlSymsp) { vlTOPp->Vortex__DOT__forwarding_src2_fwd_data[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src2_fwd_data [0U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data[7U] + = vlTOPp->Vortex__DOT__forwarding_src1_fwd_data + [7U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data[6U] + = vlTOPp->Vortex__DOT__forwarding_src1_fwd_data + [6U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data[5U] + = vlTOPp->Vortex__DOT__forwarding_src1_fwd_data + [5U]; vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data[4U] = vlTOPp->Vortex__DOT__forwarding_src1_fwd_data [4U]; @@ -7416,6 +12585,15 @@ VL_INLINE_OPT void VVortex::_combo__TOP__10(VVortex__Syms* __restrict vlSymsp) { vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data[0U] = vlTOPp->Vortex__DOT__forwarding_src1_fwd_data [0U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data[7U] + = vlTOPp->Vortex__DOT__forwarding_src2_fwd_data + [7U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data[6U] + = vlTOPp->Vortex__DOT__forwarding_src2_fwd_data + [6U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data[5U] + = vlTOPp->Vortex__DOT__forwarding_src2_fwd_data + [5U]; vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data[4U] = vlTOPp->Vortex__DOT__forwarding_src2_fwd_data [4U]; @@ -7466,6 +12644,27 @@ VL_INLINE_OPT void VVortex::_combo__TOP__10(VVortex__Syms* __restrict vlSymsp) { ? vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data [4U] : vlTOPp->Vortex__DOT__vx_decode__DOT__rd1_register [4U])); + vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_a_reg_data[5U] + = ((0x6fU == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) + ? vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__curr_PC + : ((IData)(vlTOPp->Vortex__DOT__forwarding_src1_fwd) + ? vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data + [5U] : vlTOPp->Vortex__DOT__vx_decode__DOT__rd1_register + [5U])); + vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_a_reg_data[6U] + = ((0x6fU == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) + ? vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__curr_PC + : ((IData)(vlTOPp->Vortex__DOT__forwarding_src1_fwd) + ? vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data + [6U] : vlTOPp->Vortex__DOT__vx_decode__DOT__rd1_register + [6U])); + vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_a_reg_data[7U] + = ((0x6fU == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) + ? vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__curr_PC + : ((IData)(vlTOPp->Vortex__DOT__forwarding_src1_fwd) + ? vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data + [7U] : vlTOPp->Vortex__DOT__vx_decode__DOT__rd1_register + [7U])); vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_b_reg_data[0U] = ((IData)(vlTOPp->Vortex__DOT__forwarding_src2_fwd) ? vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data @@ -7491,6 +12690,27 @@ VL_INLINE_OPT void VVortex::_combo__TOP__10(VVortex__Syms* __restrict vlSymsp) { ? vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data [4U] : vlTOPp->Vortex__DOT__vx_decode__DOT__rd2_register [4U]); + vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_b_reg_data[5U] + = ((IData)(vlTOPp->Vortex__DOT__forwarding_src2_fwd) + ? vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data + [5U] : vlTOPp->Vortex__DOT__vx_decode__DOT__rd2_register + [5U]); + vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_b_reg_data[6U] + = ((IData)(vlTOPp->Vortex__DOT__forwarding_src2_fwd) + ? vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data + [6U] : vlTOPp->Vortex__DOT__vx_decode__DOT__rd2_register + [6U]); + vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_b_reg_data[7U] + = ((IData)(vlTOPp->Vortex__DOT__forwarding_src2_fwd) + ? vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data + [7U] : vlTOPp->Vortex__DOT__vx_decode__DOT__rd2_register + [7U]); + vlTOPp->Vortex__DOT__decode_a_reg_data[7U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_a_reg_data + [7U]; + vlTOPp->Vortex__DOT__decode_a_reg_data[6U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_a_reg_data + [6U]; + vlTOPp->Vortex__DOT__decode_a_reg_data[5U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_a_reg_data + [5U]; vlTOPp->Vortex__DOT__decode_a_reg_data[4U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_a_reg_data [4U]; vlTOPp->Vortex__DOT__decode_a_reg_data[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_a_reg_data @@ -7501,11 +12721,12 @@ VL_INLINE_OPT void VVortex::_combo__TOP__10(VVortex__Syms* __restrict vlSymsp) { [1U]; vlTOPp->Vortex__DOT__decode_a_reg_data[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_a_reg_data [0U]; - // ALWAYS at VX_decode.v:240 - if (VL_UNLIKELY(vlTOPp->Vortex__DOT__vx_decode__DOT__is_jalrs)) { - VL_WRITEF("JALRS WOHOOO: rs2 - %x\n",32,vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_b_reg_data - [0U]); - } + vlTOPp->Vortex__DOT__decode_b_reg_data[7U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_b_reg_data + [7U]; + vlTOPp->Vortex__DOT__decode_b_reg_data[6U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_b_reg_data + [6U]; + vlTOPp->Vortex__DOT__decode_b_reg_data[5U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_b_reg_data + [5U]; vlTOPp->Vortex__DOT__decode_b_reg_data[4U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_b_reg_data [4U]; vlTOPp->Vortex__DOT__decode_b_reg_data[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_b_reg_data @@ -7531,6 +12752,21 @@ VL_INLINE_OPT void VVortex::_combo__TOP__10(VVortex__Syms* __restrict vlSymsp) { vlTOPp->Vortex__DOT__vx_decode__DOT__jalrs_thread_mask[4U] = VL_LTES_III(1,32,32, 4U, vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_b_reg_data [0U]); + vlTOPp->Vortex__DOT__vx_decode__DOT__jalrs_thread_mask[5U] + = VL_LTES_III(1,32,32, 5U, vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_b_reg_data + [0U]); + vlTOPp->Vortex__DOT__vx_decode__DOT__jalrs_thread_mask[6U] + = VL_LTES_III(1,32,32, 6U, vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_b_reg_data + [0U]); + vlTOPp->Vortex__DOT__vx_decode__DOT__jalrs_thread_mask[7U] + = VL_LTES_III(1,32,32, 7U, vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_b_reg_data + [0U]); + vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_a_reg_data[7U] + = vlTOPp->Vortex__DOT__decode_a_reg_data[7U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_a_reg_data[6U] + = vlTOPp->Vortex__DOT__decode_a_reg_data[6U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_a_reg_data[5U] + = vlTOPp->Vortex__DOT__decode_a_reg_data[5U]; vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_a_reg_data[4U] = vlTOPp->Vortex__DOT__decode_a_reg_data[4U]; vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_a_reg_data[3U] @@ -7541,6 +12777,12 @@ VL_INLINE_OPT void VVortex::_combo__TOP__10(VVortex__Syms* __restrict vlSymsp) { = vlTOPp->Vortex__DOT__decode_a_reg_data[1U]; vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_a_reg_data[0U] = vlTOPp->Vortex__DOT__decode_a_reg_data[0U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_b_reg_data[7U] + = vlTOPp->Vortex__DOT__decode_b_reg_data[7U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_b_reg_data[6U] + = vlTOPp->Vortex__DOT__decode_b_reg_data[6U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_b_reg_data[5U] + = vlTOPp->Vortex__DOT__decode_b_reg_data[5U]; vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_b_reg_data[4U] = vlTOPp->Vortex__DOT__decode_b_reg_data[4U]; vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_b_reg_data[3U] @@ -7551,6 +12793,21 @@ VL_INLINE_OPT void VVortex::_combo__TOP__10(VVortex__Syms* __restrict vlSymsp) { = vlTOPp->Vortex__DOT__decode_b_reg_data[1U]; vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_b_reg_data[0U] = vlTOPp->Vortex__DOT__decode_b_reg_data[0U]; + vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_thread_mask[7U] + = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_jalrs) + ? vlTOPp->Vortex__DOT__vx_decode__DOT__jalrs_thread_mask + [7U] : vlTOPp->Vortex__DOT__vx_decode__DOT__jmprt_thread_mask + [7U]); + vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_thread_mask[6U] + = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_jalrs) + ? vlTOPp->Vortex__DOT__vx_decode__DOT__jalrs_thread_mask + [6U] : vlTOPp->Vortex__DOT__vx_decode__DOT__jmprt_thread_mask + [6U]); + vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_thread_mask[5U] + = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_jalrs) + ? vlTOPp->Vortex__DOT__vx_decode__DOT__jalrs_thread_mask + [5U] : vlTOPp->Vortex__DOT__vx_decode__DOT__jmprt_thread_mask + [5U]); vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_thread_mask[4U] = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_jalrs) ? vlTOPp->Vortex__DOT__vx_decode__DOT__jalrs_thread_mask @@ -7576,6 +12833,12 @@ VL_INLINE_OPT void VVortex::_combo__TOP__10(VVortex__Syms* __restrict vlSymsp) { ? vlTOPp->Vortex__DOT__vx_decode__DOT__jalrs_thread_mask [0U] : vlTOPp->Vortex__DOT__vx_decode__DOT__jmprt_thread_mask [0U]); + vlTOPp->Vortex__DOT__decode_thread_mask[7U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_thread_mask + [7U]; + vlTOPp->Vortex__DOT__decode_thread_mask[6U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_thread_mask + [6U]; + vlTOPp->Vortex__DOT__decode_thread_mask[5U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_thread_mask + [5U]; vlTOPp->Vortex__DOT__decode_thread_mask[4U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_thread_mask [4U]; vlTOPp->Vortex__DOT__decode_thread_mask[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_thread_mask @@ -7586,6 +12849,12 @@ VL_INLINE_OPT void VVortex::_combo__TOP__10(VVortex__Syms* __restrict vlSymsp) { [1U]; vlTOPp->Vortex__DOT__decode_thread_mask[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_thread_mask [0U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask[7U] + = vlTOPp->Vortex__DOT__decode_thread_mask[7U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask[6U] + = vlTOPp->Vortex__DOT__decode_thread_mask[6U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask[5U] + = vlTOPp->Vortex__DOT__decode_thread_mask[5U]; vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask[4U] = vlTOPp->Vortex__DOT__decode_thread_mask[4U]; vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask[3U] @@ -7597,10 +12866,16 @@ VL_INLINE_OPT void VVortex::_combo__TOP__10(VVortex__Syms* __restrict vlSymsp) { vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask[0U] = vlTOPp->Vortex__DOT__decode_thread_mask[0U]; // ALWAYS at VX_fetch.v:69 - if (VL_UNLIKELY(vlTOPp->Vortex__DOT__decode_change_mask)) { - VL_WRITEF("CHANGING MASK: [%1# %1#]\n",1,vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask - [0U],1,vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask - [1U]); + if (vlTOPp->Vortex__DOT__decode_change_mask) { + vlTOPp->Vortex__DOT__vx_fetch__DOT__valid[7U] + = vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask + [7U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__valid[6U] + = vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask + [6U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__valid[5U] + = vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask + [5U]; vlTOPp->Vortex__DOT__vx_fetch__DOT__valid[4U] = vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask [4U]; @@ -7647,6 +12922,30 @@ VL_INLINE_OPT void VVortex::_combo__TOP__10(VVortex__Syms* __restrict vlSymsp) { [4U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__stall)) & vlTOPp->Vortex__DOT__vx_fetch__DOT__valid [4U])); + vlTOPp->Vortex__DOT____Vcellout__vx_fetch__out_valid[5U] + = ((IData)(vlTOPp->Vortex__DOT__decode_change_mask) + ? vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask + [5U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__stall)) + & vlTOPp->Vortex__DOT__vx_fetch__DOT__valid + [5U])); + vlTOPp->Vortex__DOT____Vcellout__vx_fetch__out_valid[6U] + = ((IData)(vlTOPp->Vortex__DOT__decode_change_mask) + ? vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask + [6U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__stall)) + & vlTOPp->Vortex__DOT__vx_fetch__DOT__valid + [6U])); + vlTOPp->Vortex__DOT____Vcellout__vx_fetch__out_valid[7U] + = ((IData)(vlTOPp->Vortex__DOT__decode_change_mask) + ? vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask + [7U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__stall)) + & vlTOPp->Vortex__DOT__vx_fetch__DOT__valid + [7U])); + vlTOPp->Vortex__DOT__fetch_valid[7U] = vlTOPp->Vortex__DOT____Vcellout__vx_fetch__out_valid + [7U]; + vlTOPp->Vortex__DOT__fetch_valid[6U] = vlTOPp->Vortex__DOT____Vcellout__vx_fetch__out_valid + [6U]; + vlTOPp->Vortex__DOT__fetch_valid[5U] = vlTOPp->Vortex__DOT____Vcellout__vx_fetch__out_valid + [5U]; vlTOPp->Vortex__DOT__fetch_valid[4U] = vlTOPp->Vortex__DOT____Vcellout__vx_fetch__out_valid [4U]; vlTOPp->Vortex__DOT__fetch_valid[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_fetch__out_valid @@ -7657,6 +12956,12 @@ VL_INLINE_OPT void VVortex::_combo__TOP__10(VVortex__Syms* __restrict vlSymsp) { [1U]; vlTOPp->Vortex__DOT__fetch_valid[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_fetch__out_valid [0U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_f_d_reg__in_valid[7U] + = vlTOPp->Vortex__DOT__fetch_valid[7U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_f_d_reg__in_valid[6U] + = vlTOPp->Vortex__DOT__fetch_valid[6U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_f_d_reg__in_valid[5U] + = vlTOPp->Vortex__DOT__fetch_valid[5U]; vlTOPp->Vortex__DOT____Vcellinp__vx_f_d_reg__in_valid[4U] = vlTOPp->Vortex__DOT__fetch_valid[4U]; vlTOPp->Vortex__DOT____Vcellinp__vx_f_d_reg__in_valid[3U] @@ -7688,10 +12993,7 @@ void VVortex::_eval(VVortex__Syms* __restrict vlSymsp) { | ((IData)(vlTOPp->reset) & (~ (IData)(vlTOPp->__Vclklast__TOP__reset))))) { vlTOPp->_sequent__TOP__7(vlSymsp); } - if (((IData)(vlTOPp->clk) ^ (IData)(vlTOPp->__Vclklast__TOP__clk))) { - vlTOPp->_multiclk__TOP__8(vlSymsp); - } - vlTOPp->_combo__TOP__10(vlSymsp); + vlTOPp->_combo__TOP__9(vlSymsp); // Final vlTOPp->__Vclklast__TOP__clk = vlTOPp->clk; vlTOPp->__Vclklast__TOP__reset = vlTOPp->reset; @@ -7718,7 +13020,7 @@ void VVortex::_eval_settle(VVortex__Syms* __restrict vlSymsp) { VVortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; // Body vlTOPp->_settle__TOP__1(vlSymsp); - vlTOPp->_settle__TOP__9(vlSymsp); + vlTOPp->_settle__TOP__8(vlSymsp); } VL_INLINE_OPT QData VVortex::_change_request(VVortex__Syms* __restrict vlSymsp) { @@ -7747,280 +13049,277 @@ void VVortex::_ctor_var_reset() { clk = VL_RAND_RESET_I(1); reset = VL_RAND_RESET_I(1); fe_instruction = VL_RAND_RESET_I(32); - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { in_cache_driver_out_data[__Vi0] = VL_RAND_RESET_I(32); }} curr_PC = VL_RAND_RESET_I(32); - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { out_cache_driver_in_address[__Vi0] = VL_RAND_RESET_I(32); }} out_cache_driver_in_mem_read = VL_RAND_RESET_I(3); out_cache_driver_in_mem_write = VL_RAND_RESET_I(3); - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { out_cache_driver_in_valid[__Vi0] = VL_RAND_RESET_I(1); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { out_cache_driver_in_data[__Vi0] = VL_RAND_RESET_I(32); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT__fetch_valid[__Vi0] = VL_RAND_RESET_I(1); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT__f_d_valid[__Vi0] = VL_RAND_RESET_I(1); }} Vortex__DOT__decode_branch_stall = VL_RAND_RESET_I(1); Vortex__DOT__decode_csr_address = VL_RAND_RESET_I(12); - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT__decode_a_reg_data[__Vi0] = VL_RAND_RESET_I(32); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT__decode_b_reg_data[__Vi0] = VL_RAND_RESET_I(32); }} Vortex__DOT__decode_itype_immed = VL_RAND_RESET_I(32); Vortex__DOT__decode_branch_type = VL_RAND_RESET_I(3); Vortex__DOT__decode_jal = VL_RAND_RESET_I(1); Vortex__DOT__decode_jal_offset = VL_RAND_RESET_I(32); - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT__decode_valid[__Vi0] = VL_RAND_RESET_I(1); }} Vortex__DOT__decode_clone_stall = VL_RAND_RESET_I(1); Vortex__DOT__decode_change_mask = VL_RAND_RESET_I(1); - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT__decode_thread_mask[__Vi0] = VL_RAND_RESET_I(1); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT__d_e_a_reg_data[__Vi0] = VL_RAND_RESET_I(32); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT__d_e_b_reg_data[__Vi0] = VL_RAND_RESET_I(32); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT__d_e_valid[__Vi0] = VL_RAND_RESET_I(1); }} Vortex__DOT__execute_branch_stall = VL_RAND_RESET_I(1); - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT__execute_alu_result[__Vi0] = VL_RAND_RESET_I(32); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT__execute_b_reg_data[__Vi0] = VL_RAND_RESET_I(32); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT__execute_valid[__Vi0] = VL_RAND_RESET_I(1); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT__e_m_alu_result[__Vi0] = VL_RAND_RESET_I(32); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT__e_m_b_reg_data[__Vi0] = VL_RAND_RESET_I(32); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT__e_m_valid[__Vi0] = VL_RAND_RESET_I(1); }} Vortex__DOT__memory_branch_dir = VL_RAND_RESET_I(1); Vortex__DOT__memory_branch_dest = VL_RAND_RESET_I(32); - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT__memory_alu_result[__Vi0] = VL_RAND_RESET_I(32); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT__memory_mem_result[__Vi0] = VL_RAND_RESET_I(32); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT__memory_valid[__Vi0] = VL_RAND_RESET_I(1); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT__m_w_alu_result[__Vi0] = VL_RAND_RESET_I(32); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT__m_w_mem_result[__Vi0] = VL_RAND_RESET_I(32); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT__m_w_valid[__Vi0] = VL_RAND_RESET_I(1); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT__writeback_write_data[__Vi0] = VL_RAND_RESET_I(32); }} Vortex__DOT__csr_decode_csr_data = VL_RAND_RESET_I(32); Vortex__DOT__forwarding_fwd_stall = VL_RAND_RESET_I(1); Vortex__DOT__forwarding_src1_fwd = VL_RAND_RESET_I(1); Vortex__DOT__forwarding_src2_fwd = VL_RAND_RESET_I(1); - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT__forwarding_src1_fwd_data[__Vi0] = VL_RAND_RESET_I(32); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT__forwarding_src2_fwd_data[__Vi0] = VL_RAND_RESET_I(32); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT____Vcellout__vx_fetch__out_valid[__Vi0] = VL_RAND_RESET_I(1); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask[__Vi0] = VL_RAND_RESET_I(1); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT____Vcellout__vx_f_d_reg__out_valid[__Vi0] = VL_RAND_RESET_I(1); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT____Vcellinp__vx_f_d_reg__in_valid[__Vi0] = VL_RAND_RESET_I(1); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT____Vcellout__vx_decode__out_thread_mask[__Vi0] = VL_RAND_RESET_I(1); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT____Vcellout__vx_decode__out_valid[__Vi0] = VL_RAND_RESET_I(1); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT____Vcellout__vx_decode__out_b_reg_data[__Vi0] = VL_RAND_RESET_I(32); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT____Vcellout__vx_decode__out_a_reg_data[__Vi0] = VL_RAND_RESET_I(32); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data[__Vi0] = VL_RAND_RESET_I(32); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data[__Vi0] = VL_RAND_RESET_I(32); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT____Vcellinp__vx_decode__in_wb_valid[__Vi0] = VL_RAND_RESET_I(1); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT____Vcellinp__vx_decode__in_write_data[__Vi0] = VL_RAND_RESET_I(32); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT____Vcellinp__vx_decode__in_valid[__Vi0] = VL_RAND_RESET_I(1); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT____Vcellout__vx_d_e_reg__out_valid[__Vi0] = VL_RAND_RESET_I(1); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT____Vcellout__vx_d_e_reg__out_b_reg_data[__Vi0] = VL_RAND_RESET_I(32); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT____Vcellout__vx_d_e_reg__out_a_reg_data[__Vi0] = VL_RAND_RESET_I(32); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT____Vcellinp__vx_d_e_reg__in_valid[__Vi0] = VL_RAND_RESET_I(1); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT____Vcellinp__vx_d_e_reg__in_b_reg_data[__Vi0] = VL_RAND_RESET_I(32); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT____Vcellinp__vx_d_e_reg__in_a_reg_data[__Vi0] = VL_RAND_RESET_I(32); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT____Vcellout__vx_execute__out_valid[__Vi0] = VL_RAND_RESET_I(1); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT____Vcellout__vx_execute__out_b_reg_data[__Vi0] = VL_RAND_RESET_I(32); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT____Vcellout__vx_execute__out_alu_result[__Vi0] = VL_RAND_RESET_I(32); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT____Vcellinp__vx_execute__in_valid[__Vi0] = VL_RAND_RESET_I(1); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT____Vcellinp__vx_execute__in_b_reg_data[__Vi0] = VL_RAND_RESET_I(32); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data[__Vi0] = VL_RAND_RESET_I(32); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT____Vcellout__vx_e_m_reg__out_valid[__Vi0] = VL_RAND_RESET_I(1); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT____Vcellout__vx_e_m_reg__out_b_reg_data[__Vi0] = VL_RAND_RESET_I(32); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT____Vcellout__vx_e_m_reg__out_alu_result[__Vi0] = VL_RAND_RESET_I(32); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT____Vcellinp__vx_e_m_reg__in_valid[__Vi0] = VL_RAND_RESET_I(1); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT____Vcellinp__vx_e_m_reg__in_b_reg_data[__Vi0] = VL_RAND_RESET_I(32); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT____Vcellinp__vx_e_m_reg__in_alu_result[__Vi0] = VL_RAND_RESET_I(32); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid[__Vi0] = VL_RAND_RESET_I(1); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data[__Vi0] = VL_RAND_RESET_I(32); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address[__Vi0] = VL_RAND_RESET_I(32); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT____Vcellout__vx_memory__out_valid[__Vi0] = VL_RAND_RESET_I(1); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT____Vcellout__vx_memory__out_mem_result[__Vi0] = VL_RAND_RESET_I(32); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT____Vcellout__vx_memory__out_alu_result[__Vi0] = VL_RAND_RESET_I(32); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data[__Vi0] = VL_RAND_RESET_I(32); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT____Vcellinp__vx_memory__in_valid[__Vi0] = VL_RAND_RESET_I(1); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT____Vcellinp__vx_memory__in_rd2[__Vi0] = VL_RAND_RESET_I(32); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT____Vcellinp__vx_memory__in_alu_result[__Vi0] = VL_RAND_RESET_I(32); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT____Vcellout__vx_m_w_reg__out_valid[__Vi0] = VL_RAND_RESET_I(1); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT____Vcellout__vx_m_w_reg__out_mem_result[__Vi0] = VL_RAND_RESET_I(32); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT____Vcellout__vx_m_w_reg__out_alu_result[__Vi0] = VL_RAND_RESET_I(32); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT____Vcellinp__vx_m_w_reg__in_valid[__Vi0] = VL_RAND_RESET_I(1); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT____Vcellinp__vx_m_w_reg__in_mem_result[__Vi0] = VL_RAND_RESET_I(32); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT____Vcellinp__vx_m_w_reg__in_alu_result[__Vi0] = VL_RAND_RESET_I(32); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT____Vcellout__vx_writeback__out_write_data[__Vi0] = VL_RAND_RESET_I(32); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { - Vortex__DOT____Vcellinp__vx_writeback__in_valid[__Vi0] = VL_RAND_RESET_I(1); - }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT____Vcellinp__vx_writeback__in_mem_result[__Vi0] = VL_RAND_RESET_I(32); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT____Vcellinp__vx_writeback__in_alu_result[__Vi0] = VL_RAND_RESET_I(32); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT____Vcellout__vx_forwarding__out_src2_fwd_data[__Vi0] = VL_RAND_RESET_I(32); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT____Vcellout__vx_forwarding__out_src1_fwd_data[__Vi0] = VL_RAND_RESET_I(32); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_mem_data[__Vi0] = VL_RAND_RESET_I(32); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_alu_result[__Vi0] = VL_RAND_RESET_I(32); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT____Vcellinp__vx_forwarding__in_memory_mem_data[__Vi0] = VL_RAND_RESET_I(32); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT____Vcellinp__vx_forwarding__in_memory_alu_result[__Vi0] = VL_RAND_RESET_I(32); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result[__Vi0] = VL_RAND_RESET_I(32); }} Vortex__DOT__vx_fetch__DOT__stall_reg = VL_RAND_RESET_I(1); @@ -8034,18 +13333,18 @@ void VVortex::_ctor_var_reset() { Vortex__DOT__vx_fetch__DOT__PC_to_use = VL_RAND_RESET_I(32); Vortex__DOT__vx_fetch__DOT__stall = VL_RAND_RESET_I(1); Vortex__DOT__vx_fetch__DOT__temp_PC = VL_RAND_RESET_I(32); - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT__vx_fetch__DOT__valid[__Vi0] = VL_RAND_RESET_I(1); }} Vortex__DOT__vx_f_d_reg__DOT__instruction = VL_RAND_RESET_I(32); Vortex__DOT__vx_f_d_reg__DOT__curr_PC = VL_RAND_RESET_I(32); - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT__vx_f_d_reg__DOT__valid[__Vi0] = VL_RAND_RESET_I(1); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT__vx_decode__DOT__rd1_register[__Vi0] = VL_RAND_RESET_I(32); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT__vx_decode__DOT__rd2_register[__Vi0] = VL_RAND_RESET_I(32); }} Vortex__DOT__vx_decode__DOT__is_itype = VL_RAND_RESET_I(1); @@ -8063,31 +13362,78 @@ void VVortex::_ctor_var_reset() { { int __Vi0=0; for (; __Vi0<32; ++__Vi0) { Vortex__DOT__vx_decode__DOT____Vcellout__vx_register_file_master__out_regs[__Vi0] = VL_RAND_RESET_I(32); }} - Vortex__DOT__vx_decode__DOT__to_clone_1 = VL_RAND_RESET_I(1); - Vortex__DOT__vx_decode__DOT____Vcellout__vx_register_file_slave__out_src2_data = VL_RAND_RESET_I(32); - Vortex__DOT__vx_decode__DOT____Vcellout__vx_register_file_slave__out_src1_data = VL_RAND_RESET_I(32); - { int __Vi0=0; for (; __Vi0<32; ++__Vi0) { - Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT__vx_decode__DOT__jalrs_thread_mask[__Vi0] = VL_RAND_RESET_I(1); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT__vx_decode__DOT__jmprt_thread_mask[__Vi0] = VL_RAND_RESET_I(1); }} Vortex__DOT__vx_decode__DOT__state_stall = VL_RAND_RESET_I(6); Vortex__DOT__vx_decode__DOT__temp_final_alu = VL_RAND_RESET_I(5); + Vortex__DOT__vx_decode__DOT____Vcellout__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__out_src2_data = VL_RAND_RESET_I(32); + Vortex__DOT__vx_decode__DOT____Vcellout__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__out_src1_data = VL_RAND_RESET_I(32); + { int __Vi0=0; for (; __Vi0<32; ++__Vi0) { + Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[__Vi0] = VL_RAND_RESET_I(32); + }} + Vortex__DOT__vx_decode__DOT____Vcellout__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__out_src2_data = VL_RAND_RESET_I(32); + Vortex__DOT__vx_decode__DOT____Vcellout__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__out_src1_data = VL_RAND_RESET_I(32); + { int __Vi0=0; for (; __Vi0<32; ++__Vi0) { + Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[__Vi0] = VL_RAND_RESET_I(32); + }} + Vortex__DOT__vx_decode__DOT____Vcellout__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__out_src2_data = VL_RAND_RESET_I(32); + Vortex__DOT__vx_decode__DOT____Vcellout__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__out_src1_data = VL_RAND_RESET_I(32); + { int __Vi0=0; for (; __Vi0<32; ++__Vi0) { + Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[__Vi0] = VL_RAND_RESET_I(32); + }} + Vortex__DOT__vx_decode__DOT____Vcellout__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__out_src2_data = VL_RAND_RESET_I(32); + Vortex__DOT__vx_decode__DOT____Vcellout__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__out_src1_data = VL_RAND_RESET_I(32); + { int __Vi0=0; for (; __Vi0<32; ++__Vi0) { + Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs[__Vi0] = VL_RAND_RESET_I(32); + }} + Vortex__DOT__vx_decode__DOT____Vcellout__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__out_src2_data = VL_RAND_RESET_I(32); + Vortex__DOT__vx_decode__DOT____Vcellout__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__out_src1_data = VL_RAND_RESET_I(32); + { int __Vi0=0; for (; __Vi0<32; ++__Vi0) { + Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs[__Vi0] = VL_RAND_RESET_I(32); + }} + Vortex__DOT__vx_decode__DOT____Vcellout__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__out_src2_data = VL_RAND_RESET_I(32); + Vortex__DOT__vx_decode__DOT____Vcellout__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__out_src1_data = VL_RAND_RESET_I(32); + { int __Vi0=0; for (; __Vi0<32; ++__Vi0) { + Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs[__Vi0] = VL_RAND_RESET_I(32); + }} + Vortex__DOT__vx_decode__DOT____Vcellout__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__out_src2_data = VL_RAND_RESET_I(32); + Vortex__DOT__vx_decode__DOT____Vcellout__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__out_src1_data = VL_RAND_RESET_I(32); + { int __Vi0=0; for (; __Vi0<32; ++__Vi0) { + Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs[__Vi0] = VL_RAND_RESET_I(32); + }} { int __Vi0=0; for (; __Vi0<32; ++__Vi0) { Vortex__DOT__vx_decode__DOT__vx_register_file_master__DOT__registers[__Vi0] = VL_RAND_RESET_I(32); }} { int __Vi0=0; for (; __Vi0<32; ++__Vi0) { - Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers[__Vi0] = VL_RAND_RESET_I(32); + Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[__Vi0] = VL_RAND_RESET_I(32); + }} + { int __Vi0=0; for (; __Vi0<32; ++__Vi0) { + Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[__Vi0] = VL_RAND_RESET_I(32); + }} + { int __Vi0=0; for (; __Vi0<32; ++__Vi0) { + Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[__Vi0] = VL_RAND_RESET_I(32); + }} + { int __Vi0=0; for (; __Vi0<32; ++__Vi0) { + Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers[__Vi0] = VL_RAND_RESET_I(32); + }} + { int __Vi0=0; for (; __Vi0<32; ++__Vi0) { + Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers[__Vi0] = VL_RAND_RESET_I(32); + }} + { int __Vi0=0; for (; __Vi0<32; ++__Vi0) { + Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers[__Vi0] = VL_RAND_RESET_I(32); + }} + { int __Vi0=0; for (; __Vi0<32; ++__Vi0) { + Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers[__Vi0] = VL_RAND_RESET_I(32); }} Vortex__DOT__vx_d_e_reg__DOT__rd = VL_RAND_RESET_I(5); - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT__vx_d_e_reg__DOT__a_reg_data[__Vi0] = VL_RAND_RESET_I(32); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT__vx_d_e_reg__DOT__b_reg_data[__Vi0] = VL_RAND_RESET_I(32); }} Vortex__DOT__vx_d_e_reg__DOT__alu_op = VL_RAND_RESET_I(5); @@ -8105,13 +13451,13 @@ void VVortex::_ctor_var_reset() { Vortex__DOT__vx_d_e_reg__DOT__curr_PC = VL_RAND_RESET_I(32); Vortex__DOT__vx_d_e_reg__DOT__jal = VL_RAND_RESET_I(1); Vortex__DOT__vx_d_e_reg__DOT__jal_offset = VL_RAND_RESET_I(32); - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT__vx_d_e_reg__DOT__valid[__Vi0] = VL_RAND_RESET_I(1); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT__vx_d_e_reg__DOT__reg_data_z[__Vi0] = VL_RAND_RESET_I(32); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT__vx_d_e_reg__DOT__valid_z[__Vi0] = VL_RAND_RESET_I(1); }} Vortex__DOT__vx_d_e_reg__DOT__stalling = VL_RAND_RESET_I(1); @@ -8120,6 +13466,9 @@ void VVortex::_ctor_var_reset() { Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__2__KET____DOT__vx_alu__out_alu_result = VL_RAND_RESET_I(32); Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__3__KET____DOT__vx_alu__out_alu_result = VL_RAND_RESET_I(32); Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__4__KET____DOT__vx_alu__out_alu_result = VL_RAND_RESET_I(32); + Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__5__KET____DOT__vx_alu__out_alu_result = VL_RAND_RESET_I(32); + Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__6__KET____DOT__vx_alu__out_alu_result = VL_RAND_RESET_I(32); + Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__7__KET____DOT__vx_alu__out_alu_result = VL_RAND_RESET_I(32); Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2 = VL_RAND_RESET_I(32); Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__mult_signed_result = VL_RAND_RESET_Q(64); Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2 = VL_RAND_RESET_I(32); @@ -8130,14 +13479,20 @@ void VVortex::_ctor_var_reset() { Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__mult_signed_result = VL_RAND_RESET_Q(64); Vortex__DOT__vx_execute__DOT__genblk1__BRA__4__KET____DOT__vx_alu__DOT__ALU_in2 = VL_RAND_RESET_I(32); Vortex__DOT__vx_execute__DOT__genblk1__BRA__4__KET____DOT__vx_alu__DOT__mult_signed_result = VL_RAND_RESET_Q(64); - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + Vortex__DOT__vx_execute__DOT__genblk1__BRA__5__KET____DOT__vx_alu__DOT__ALU_in2 = VL_RAND_RESET_I(32); + Vortex__DOT__vx_execute__DOT__genblk1__BRA__5__KET____DOT__vx_alu__DOT__mult_signed_result = VL_RAND_RESET_Q(64); + Vortex__DOT__vx_execute__DOT__genblk1__BRA__6__KET____DOT__vx_alu__DOT__ALU_in2 = VL_RAND_RESET_I(32); + Vortex__DOT__vx_execute__DOT__genblk1__BRA__6__KET____DOT__vx_alu__DOT__mult_signed_result = VL_RAND_RESET_Q(64); + Vortex__DOT__vx_execute__DOT__genblk1__BRA__7__KET____DOT__vx_alu__DOT__ALU_in2 = VL_RAND_RESET_I(32); + Vortex__DOT__vx_execute__DOT__genblk1__BRA__7__KET____DOT__vx_alu__DOT__mult_signed_result = VL_RAND_RESET_Q(64); + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT__vx_e_m_reg__DOT__alu_result[__Vi0] = VL_RAND_RESET_I(32); }} Vortex__DOT__vx_e_m_reg__DOT__rd = VL_RAND_RESET_I(5); - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT__vx_e_m_reg__DOT__a_reg_data[__Vi0] = VL_RAND_RESET_I(32); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT__vx_e_m_reg__DOT__b_reg_data[__Vi0] = VL_RAND_RESET_I(32); }} Vortex__DOT__vx_e_m_reg__DOT__wb = VL_RAND_RESET_I(2); @@ -8152,22 +13507,22 @@ void VVortex::_ctor_var_reset() { Vortex__DOT__vx_e_m_reg__DOT__branch_type = VL_RAND_RESET_I(3); Vortex__DOT__vx_e_m_reg__DOT__jal = VL_RAND_RESET_I(1); Vortex__DOT__vx_e_m_reg__DOT__jal_dest = VL_RAND_RESET_I(32); - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT__vx_e_m_reg__DOT__valid[__Vi0] = VL_RAND_RESET_I(1); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT__vx_m_w_reg__DOT__alu_result[__Vi0] = VL_RAND_RESET_I(32); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT__vx_m_w_reg__DOT__mem_result[__Vi0] = VL_RAND_RESET_I(32); }} Vortex__DOT__vx_m_w_reg__DOT__rd = VL_RAND_RESET_I(5); Vortex__DOT__vx_m_w_reg__DOT__wb = VL_RAND_RESET_I(2); Vortex__DOT__vx_m_w_reg__DOT__PC_next = VL_RAND_RESET_I(32); - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT__vx_m_w_reg__DOT__valid[__Vi0] = VL_RAND_RESET_I(1); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT__vx_writeback__DOT__out_pc_data[__Vi0] = VL_RAND_RESET_I(32); }} Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd = VL_RAND_RESET_I(1); @@ -8176,13 +13531,13 @@ void VVortex::_ctor_var_reset() { Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd = VL_RAND_RESET_I(1); Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd = VL_RAND_RESET_I(1); Vortex__DOT__vx_forwarding__DOT__src2_wb_fwd = VL_RAND_RESET_I(1); - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next[__Vi0] = VL_RAND_RESET_I(32); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[__Vi0] = VL_RAND_RESET_I(32); }} - { int __Vi0=0; for (; __Vi0<5; ++__Vi0) { + { int __Vi0=0; for (; __Vi0<8; ++__Vi0) { Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next[__Vi0] = VL_RAND_RESET_I(32); }} { int __Vi0=0; for (; __Vi0<4096; ++__Vi0) { @@ -8201,6 +13556,6 @@ void VVortex::_ctor_var_reset() { __Vtable1_Vortex__DOT__vx_decode__DOT__mul_alu[6] = 0x16U; __Vtable1_Vortex__DOT__vx_decode__DOT__mul_alu[7] = 0x17U; __Vdlyvset__Vortex__DOT__vx_f_d_reg__DOT__valid__v0 = VL_RAND_RESET_I(1); - __Vdlyvset__Vortex__DOT__vx_f_d_reg__DOT__valid__v5 = VL_RAND_RESET_I(1); - __Vdlyvset__Vortex__DOT__vx_f_d_reg__DOT__valid__v6 = VL_RAND_RESET_I(1); + __Vdlyvset__Vortex__DOT__vx_f_d_reg__DOT__valid__v8 = VL_RAND_RESET_I(1); + __Vdlyvset__Vortex__DOT__vx_f_d_reg__DOT__valid__v9 = VL_RAND_RESET_I(1); } diff --git a/rtl/obj_dir/VVortex.h b/rtl/obj_dir/VVortex.h index 4117f4d5..3d0ba3fa 100644 --- a/rtl/obj_dir/VVortex.h +++ b/rtl/obj_dir/VVortex.h @@ -27,10 +27,10 @@ VL_MODULE(VVortex) { VL_OUT8(out_cache_driver_in_mem_write,2,0); VL_IN(fe_instruction,31,0); VL_OUT(curr_PC,31,0); - VL_IN(in_cache_driver_out_data[5],31,0); - VL_OUT(out_cache_driver_in_address[5],31,0); - VL_OUT8(out_cache_driver_in_valid[5],0,0); - VL_OUT(out_cache_driver_in_data[5],31,0); + VL_IN(in_cache_driver_out_data[8],31,0); + VL_OUT(out_cache_driver_in_address[8],31,0); + VL_OUT8(out_cache_driver_in_valid[8],0,0); + VL_OUT(out_cache_driver_in_data[8],31,0); // LOCAL SIGNALS // Internals; generally not touched by application code @@ -58,7 +58,6 @@ VL_MODULE(VVortex) { VL_SIG8(Vortex__DOT__vx_decode__DOT__is_jalrs,0,0); VL_SIG8(Vortex__DOT__vx_decode__DOT__is_jmprt,0,0); VL_SIG8(Vortex__DOT__vx_decode__DOT__mul_alu,4,0); - VL_SIG8(Vortex__DOT__vx_decode__DOT__to_clone_1,0,0); VL_SIG8(Vortex__DOT__vx_decode__DOT__state_stall,5,0); VL_SIG8(Vortex__DOT__vx_decode__DOT__temp_final_alu,4,0); VL_SIG8(Vortex__DOT__vx_d_e_reg__DOT__rd,4,0); @@ -101,9 +100,9 @@ VL_MODULE(VVortex) { VL_SIG(Vortex__DOT__vx_fetch__DOT__BR_reg,31,0); VL_SIG(Vortex__DOT__vx_fetch__DOT__PC_to_use,31,0); VL_SIG(Vortex__DOT__vx_fetch__DOT__temp_PC,31,0); + VL_SIG(Vortex__DOT__vx_f_d_reg__DOT__instruction,31,0); }; struct { - VL_SIG(Vortex__DOT__vx_f_d_reg__DOT__instruction,31,0); VL_SIG(Vortex__DOT__vx_f_d_reg__DOT__curr_PC,31,0); VL_SIG(Vortex__DOT__vx_d_e_reg__DOT__PC_next_out,31,0); VL_SIG(Vortex__DOT__vx_d_e_reg__DOT__itype_immed,31,0); @@ -116,6 +115,9 @@ VL_MODULE(VVortex) { VL_SIG(Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2,31,0); VL_SIG(Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2,31,0); VL_SIG(Vortex__DOT__vx_execute__DOT__genblk1__BRA__4__KET____DOT__vx_alu__DOT__ALU_in2,31,0); + VL_SIG(Vortex__DOT__vx_execute__DOT__genblk1__BRA__5__KET____DOT__vx_alu__DOT__ALU_in2,31,0); + VL_SIG(Vortex__DOT__vx_execute__DOT__genblk1__BRA__6__KET____DOT__vx_alu__DOT__ALU_in2,31,0); + VL_SIG(Vortex__DOT__vx_execute__DOT__genblk1__BRA__7__KET____DOT__vx_alu__DOT__ALU_in2,31,0); VL_SIG(Vortex__DOT__vx_e_m_reg__DOT__PC_next,31,0); VL_SIG(Vortex__DOT__vx_e_m_reg__DOT__csr_result,31,0); VL_SIG(Vortex__DOT__vx_e_m_reg__DOT__curr_PC,31,0); @@ -127,59 +129,68 @@ VL_MODULE(VVortex) { VL_SIG64(Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__mult_signed_result,63,0); VL_SIG64(Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__mult_signed_result,63,0); VL_SIG64(Vortex__DOT__vx_execute__DOT__genblk1__BRA__4__KET____DOT__vx_alu__DOT__mult_signed_result,63,0); + VL_SIG64(Vortex__DOT__vx_execute__DOT__genblk1__BRA__5__KET____DOT__vx_alu__DOT__mult_signed_result,63,0); + VL_SIG64(Vortex__DOT__vx_execute__DOT__genblk1__BRA__6__KET____DOT__vx_alu__DOT__mult_signed_result,63,0); + VL_SIG64(Vortex__DOT__vx_execute__DOT__genblk1__BRA__7__KET____DOT__vx_alu__DOT__mult_signed_result,63,0); VL_SIG64(Vortex__DOT__vx_csr_handler__DOT__cycle,63,0); VL_SIG64(Vortex__DOT__vx_csr_handler__DOT__instret,63,0); - VL_SIG8(Vortex__DOT__fetch_valid[5],0,0); - VL_SIG8(Vortex__DOT__f_d_valid[5],0,0); - VL_SIG(Vortex__DOT__decode_a_reg_data[5],31,0); - VL_SIG(Vortex__DOT__decode_b_reg_data[5],31,0); - VL_SIG8(Vortex__DOT__decode_valid[5],0,0); - VL_SIG8(Vortex__DOT__decode_thread_mask[5],0,0); - VL_SIG(Vortex__DOT__d_e_a_reg_data[5],31,0); - VL_SIG(Vortex__DOT__d_e_b_reg_data[5],31,0); - VL_SIG8(Vortex__DOT__d_e_valid[5],0,0); - VL_SIG(Vortex__DOT__execute_alu_result[5],31,0); - VL_SIG(Vortex__DOT__execute_b_reg_data[5],31,0); - VL_SIG8(Vortex__DOT__execute_valid[5],0,0); - VL_SIG(Vortex__DOT__e_m_alu_result[5],31,0); - VL_SIG(Vortex__DOT__e_m_b_reg_data[5],31,0); - VL_SIG8(Vortex__DOT__e_m_valid[5],0,0); - VL_SIG(Vortex__DOT__memory_alu_result[5],31,0); - VL_SIG(Vortex__DOT__memory_mem_result[5],31,0); - VL_SIG8(Vortex__DOT__memory_valid[5],0,0); - VL_SIG(Vortex__DOT__m_w_alu_result[5],31,0); - VL_SIG(Vortex__DOT__m_w_mem_result[5],31,0); - VL_SIG8(Vortex__DOT__m_w_valid[5],0,0); - VL_SIG(Vortex__DOT__writeback_write_data[5],31,0); - VL_SIG(Vortex__DOT__forwarding_src1_fwd_data[5],31,0); - VL_SIG(Vortex__DOT__forwarding_src2_fwd_data[5],31,0); - VL_SIG8(Vortex__DOT__vx_fetch__DOT__valid[5],0,0); - VL_SIG8(Vortex__DOT__vx_f_d_reg__DOT__valid[5],0,0); - VL_SIG(Vortex__DOT__vx_decode__DOT__rd1_register[5],31,0); - VL_SIG(Vortex__DOT__vx_decode__DOT__rd2_register[5],31,0); + VL_SIG8(Vortex__DOT__fetch_valid[8],0,0); + VL_SIG8(Vortex__DOT__f_d_valid[8],0,0); + VL_SIG(Vortex__DOT__decode_a_reg_data[8],31,0); + VL_SIG(Vortex__DOT__decode_b_reg_data[8],31,0); + VL_SIG8(Vortex__DOT__decode_valid[8],0,0); + VL_SIG8(Vortex__DOT__decode_thread_mask[8],0,0); + VL_SIG(Vortex__DOT__d_e_a_reg_data[8],31,0); + VL_SIG(Vortex__DOT__d_e_b_reg_data[8],31,0); + VL_SIG8(Vortex__DOT__d_e_valid[8],0,0); + VL_SIG(Vortex__DOT__execute_alu_result[8],31,0); + VL_SIG(Vortex__DOT__execute_b_reg_data[8],31,0); + VL_SIG8(Vortex__DOT__execute_valid[8],0,0); + VL_SIG(Vortex__DOT__e_m_alu_result[8],31,0); + VL_SIG(Vortex__DOT__e_m_b_reg_data[8],31,0); + VL_SIG8(Vortex__DOT__e_m_valid[8],0,0); + VL_SIG(Vortex__DOT__memory_alu_result[8],31,0); + VL_SIG(Vortex__DOT__memory_mem_result[8],31,0); + VL_SIG8(Vortex__DOT__memory_valid[8],0,0); + VL_SIG(Vortex__DOT__m_w_alu_result[8],31,0); + VL_SIG(Vortex__DOT__m_w_mem_result[8],31,0); + VL_SIG8(Vortex__DOT__m_w_valid[8],0,0); + VL_SIG(Vortex__DOT__writeback_write_data[8],31,0); + VL_SIG(Vortex__DOT__forwarding_src1_fwd_data[8],31,0); + VL_SIG(Vortex__DOT__forwarding_src2_fwd_data[8],31,0); + VL_SIG8(Vortex__DOT__vx_fetch__DOT__valid[8],0,0); + VL_SIG8(Vortex__DOT__vx_f_d_reg__DOT__valid[8],0,0); + VL_SIG(Vortex__DOT__vx_decode__DOT__rd1_register[8],31,0); + VL_SIG(Vortex__DOT__vx_decode__DOT__rd2_register[8],31,0); VL_SIG(Vortex__DOT__vx_decode__DOT__clone_regsiters[32],31,0); - VL_SIG8(Vortex__DOT__vx_decode__DOT__jalrs_thread_mask[5],0,0); - VL_SIG8(Vortex__DOT__vx_decode__DOT__jmprt_thread_mask[5],0,0); + VL_SIG8(Vortex__DOT__vx_decode__DOT__jalrs_thread_mask[8],0,0); + VL_SIG8(Vortex__DOT__vx_decode__DOT__jmprt_thread_mask[8],0,0); VL_SIG(Vortex__DOT__vx_decode__DOT__vx_register_file_master__DOT__registers[32],31,0); - VL_SIG(Vortex__DOT__vx_decode__DOT__vx_register_file_slave__DOT__registers[32],31,0); - VL_SIG(Vortex__DOT__vx_d_e_reg__DOT__a_reg_data[5],31,0); - VL_SIG(Vortex__DOT__vx_d_e_reg__DOT__b_reg_data[5],31,0); - VL_SIG8(Vortex__DOT__vx_d_e_reg__DOT__valid[5],0,0); - VL_SIG(Vortex__DOT__vx_d_e_reg__DOT__reg_data_z[5],31,0); - VL_SIG8(Vortex__DOT__vx_d_e_reg__DOT__valid_z[5],0,0); + VL_SIG(Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers[32],31,0); }; struct { - VL_SIG(Vortex__DOT__vx_e_m_reg__DOT__alu_result[5],31,0); - VL_SIG(Vortex__DOT__vx_e_m_reg__DOT__a_reg_data[5],31,0); - VL_SIG(Vortex__DOT__vx_e_m_reg__DOT__b_reg_data[5],31,0); - VL_SIG8(Vortex__DOT__vx_e_m_reg__DOT__valid[5],0,0); - VL_SIG(Vortex__DOT__vx_m_w_reg__DOT__alu_result[5],31,0); - VL_SIG(Vortex__DOT__vx_m_w_reg__DOT__mem_result[5],31,0); - VL_SIG8(Vortex__DOT__vx_m_w_reg__DOT__valid[5],0,0); - VL_SIG(Vortex__DOT__vx_writeback__DOT__out_pc_data[5],31,0); - VL_SIG(Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next[5],31,0); - VL_SIG(Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[5],31,0); - VL_SIG(Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next[5],31,0); + VL_SIG(Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers[32],31,0); + VL_SIG(Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers[32],31,0); + VL_SIG(Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__DOT__registers[32],31,0); + VL_SIG(Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__DOT__registers[32],31,0); + VL_SIG(Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__DOT__registers[32],31,0); + VL_SIG(Vortex__DOT__vx_decode__DOT__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__DOT__registers[32],31,0); + VL_SIG(Vortex__DOT__vx_d_e_reg__DOT__a_reg_data[8],31,0); + VL_SIG(Vortex__DOT__vx_d_e_reg__DOT__b_reg_data[8],31,0); + VL_SIG8(Vortex__DOT__vx_d_e_reg__DOT__valid[8],0,0); + VL_SIG(Vortex__DOT__vx_d_e_reg__DOT__reg_data_z[8],31,0); + VL_SIG8(Vortex__DOT__vx_d_e_reg__DOT__valid_z[8],0,0); + VL_SIG(Vortex__DOT__vx_e_m_reg__DOT__alu_result[8],31,0); + VL_SIG(Vortex__DOT__vx_e_m_reg__DOT__a_reg_data[8],31,0); + VL_SIG(Vortex__DOT__vx_e_m_reg__DOT__b_reg_data[8],31,0); + VL_SIG8(Vortex__DOT__vx_e_m_reg__DOT__valid[8],0,0); + VL_SIG(Vortex__DOT__vx_m_w_reg__DOT__alu_result[8],31,0); + VL_SIG(Vortex__DOT__vx_m_w_reg__DOT__mem_result[8],31,0); + VL_SIG8(Vortex__DOT__vx_m_w_reg__DOT__valid[8],0,0); + VL_SIG(Vortex__DOT__vx_writeback__DOT__out_pc_data[8],31,0); + VL_SIG(Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next[8],31,0); + VL_SIG(Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[8],31,0); + VL_SIG(Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next[8],31,0); VL_SIG16(Vortex__DOT__vx_csr_handler__DOT__csr[4096],11,0); }; @@ -190,81 +201,101 @@ VL_MODULE(VVortex) { // Begin mtask footprint all: VL_SIG8(__Vtableidx1,2,0); VL_SIG8(__Vdlyvset__Vortex__DOT__vx_f_d_reg__DOT__valid__v0,0,0); - VL_SIG8(__Vdlyvset__Vortex__DOT__vx_f_d_reg__DOT__valid__v5,0,0); - VL_SIG8(__Vdlyvset__Vortex__DOT__vx_f_d_reg__DOT__valid__v6,0,0); + VL_SIG8(__Vdlyvset__Vortex__DOT__vx_f_d_reg__DOT__valid__v8,0,0); + VL_SIG8(__Vdlyvset__Vortex__DOT__vx_f_d_reg__DOT__valid__v9,0,0); VL_SIG8(__Vclklast__TOP__clk,0,0); VL_SIG8(__Vclklast__TOP__reset,0,0); VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellout__vx_register_file_master__out_src2_data,31,0); VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellout__vx_register_file_master__out_src1_data,31,0); - VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellout__vx_register_file_slave__out_src2_data,31,0); - VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellout__vx_register_file_slave__out_src1_data,31,0); + VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellout__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__out_src2_data,31,0); + VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellout__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__out_src1_data,31,0); + VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellout__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__out_src2_data,31,0); + VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellout__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__out_src1_data,31,0); + VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellout__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__out_src2_data,31,0); + VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellout__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__out_src1_data,31,0); + VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellout__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__out_src2_data,31,0); + VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellout__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__out_src1_data,31,0); + VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellout__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__out_src2_data,31,0); + VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellout__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__out_src1_data,31,0); + VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellout__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__out_src2_data,31,0); + VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellout__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__out_src1_data,31,0); + VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellout__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__out_src2_data,31,0); + VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellout__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__out_src1_data,31,0); VL_SIG(Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__0__KET____DOT__vx_alu__out_alu_result,31,0); VL_SIG(Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__1__KET____DOT__vx_alu__out_alu_result,31,0); VL_SIG(Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__2__KET____DOT__vx_alu__out_alu_result,31,0); VL_SIG(Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__3__KET____DOT__vx_alu__out_alu_result,31,0); VL_SIG(Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__4__KET____DOT__vx_alu__out_alu_result,31,0); - VL_SIG8(Vortex__DOT____Vcellout__vx_fetch__out_valid[5],0,0); - VL_SIG8(Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask[5],0,0); - VL_SIG8(Vortex__DOT____Vcellout__vx_f_d_reg__out_valid[5],0,0); - VL_SIG8(Vortex__DOT____Vcellinp__vx_f_d_reg__in_valid[5],0,0); - VL_SIG8(Vortex__DOT____Vcellout__vx_decode__out_thread_mask[5],0,0); - VL_SIG8(Vortex__DOT____Vcellout__vx_decode__out_valid[5],0,0); - VL_SIG(Vortex__DOT____Vcellout__vx_decode__out_b_reg_data[5],31,0); - VL_SIG(Vortex__DOT____Vcellout__vx_decode__out_a_reg_data[5],31,0); - VL_SIG(Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data[5],31,0); - VL_SIG(Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data[5],31,0); - VL_SIG8(Vortex__DOT____Vcellinp__vx_decode__in_wb_valid[5],0,0); - VL_SIG(Vortex__DOT____Vcellinp__vx_decode__in_write_data[5],31,0); - VL_SIG8(Vortex__DOT____Vcellinp__vx_decode__in_valid[5],0,0); - VL_SIG8(Vortex__DOT____Vcellout__vx_d_e_reg__out_valid[5],0,0); - VL_SIG(Vortex__DOT____Vcellout__vx_d_e_reg__out_b_reg_data[5],31,0); - VL_SIG(Vortex__DOT____Vcellout__vx_d_e_reg__out_a_reg_data[5],31,0); - VL_SIG8(Vortex__DOT____Vcellinp__vx_d_e_reg__in_valid[5],0,0); - VL_SIG(Vortex__DOT____Vcellinp__vx_d_e_reg__in_b_reg_data[5],31,0); - VL_SIG(Vortex__DOT____Vcellinp__vx_d_e_reg__in_a_reg_data[5],31,0); - VL_SIG8(Vortex__DOT____Vcellout__vx_execute__out_valid[5],0,0); - VL_SIG(Vortex__DOT____Vcellout__vx_execute__out_b_reg_data[5],31,0); - VL_SIG(Vortex__DOT____Vcellout__vx_execute__out_alu_result[5],31,0); - VL_SIG8(Vortex__DOT____Vcellinp__vx_execute__in_valid[5],0,0); - VL_SIG(Vortex__DOT____Vcellinp__vx_execute__in_b_reg_data[5],31,0); - VL_SIG(Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data[5],31,0); - VL_SIG8(Vortex__DOT____Vcellout__vx_e_m_reg__out_valid[5],0,0); - VL_SIG(Vortex__DOT____Vcellout__vx_e_m_reg__out_b_reg_data[5],31,0); - VL_SIG(Vortex__DOT____Vcellout__vx_e_m_reg__out_alu_result[5],31,0); - VL_SIG8(Vortex__DOT____Vcellinp__vx_e_m_reg__in_valid[5],0,0); - VL_SIG(Vortex__DOT____Vcellinp__vx_e_m_reg__in_b_reg_data[5],31,0); - VL_SIG(Vortex__DOT____Vcellinp__vx_e_m_reg__in_alu_result[5],31,0); - VL_SIG8(Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid[5],0,0); - VL_SIG(Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data[5],31,0); - VL_SIG(Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address[5],31,0); - VL_SIG8(Vortex__DOT____Vcellout__vx_memory__out_valid[5],0,0); - VL_SIG(Vortex__DOT____Vcellout__vx_memory__out_mem_result[5],31,0); - VL_SIG(Vortex__DOT____Vcellout__vx_memory__out_alu_result[5],31,0); - VL_SIG(Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data[5],31,0); - VL_SIG8(Vortex__DOT____Vcellinp__vx_memory__in_valid[5],0,0); - VL_SIG(Vortex__DOT____Vcellinp__vx_memory__in_rd2[5],31,0); - VL_SIG(Vortex__DOT____Vcellinp__vx_memory__in_alu_result[5],31,0); - VL_SIG8(Vortex__DOT____Vcellout__vx_m_w_reg__out_valid[5],0,0); - VL_SIG(Vortex__DOT____Vcellout__vx_m_w_reg__out_mem_result[5],31,0); - VL_SIG(Vortex__DOT____Vcellout__vx_m_w_reg__out_alu_result[5],31,0); - VL_SIG8(Vortex__DOT____Vcellinp__vx_m_w_reg__in_valid[5],0,0); - VL_SIG(Vortex__DOT____Vcellinp__vx_m_w_reg__in_mem_result[5],31,0); - VL_SIG(Vortex__DOT____Vcellinp__vx_m_w_reg__in_alu_result[5],31,0); - VL_SIG(Vortex__DOT____Vcellout__vx_writeback__out_write_data[5],31,0); - VL_SIG8(Vortex__DOT____Vcellinp__vx_writeback__in_valid[5],0,0); + VL_SIG(Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__5__KET____DOT__vx_alu__out_alu_result,31,0); + VL_SIG(Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__6__KET____DOT__vx_alu__out_alu_result,31,0); + VL_SIG(Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__7__KET____DOT__vx_alu__out_alu_result,31,0); + VL_SIG8(Vortex__DOT____Vcellout__vx_fetch__out_valid[8],0,0); + VL_SIG8(Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask[8],0,0); + VL_SIG8(Vortex__DOT____Vcellout__vx_f_d_reg__out_valid[8],0,0); + VL_SIG8(Vortex__DOT____Vcellinp__vx_f_d_reg__in_valid[8],0,0); + VL_SIG8(Vortex__DOT____Vcellout__vx_decode__out_thread_mask[8],0,0); + VL_SIG8(Vortex__DOT____Vcellout__vx_decode__out_valid[8],0,0); + VL_SIG(Vortex__DOT____Vcellout__vx_decode__out_b_reg_data[8],31,0); + VL_SIG(Vortex__DOT____Vcellout__vx_decode__out_a_reg_data[8],31,0); + VL_SIG(Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data[8],31,0); + VL_SIG(Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data[8],31,0); + VL_SIG8(Vortex__DOT____Vcellinp__vx_decode__in_wb_valid[8],0,0); + VL_SIG(Vortex__DOT____Vcellinp__vx_decode__in_write_data[8],31,0); + VL_SIG8(Vortex__DOT____Vcellinp__vx_decode__in_valid[8],0,0); + VL_SIG8(Vortex__DOT____Vcellout__vx_d_e_reg__out_valid[8],0,0); + VL_SIG(Vortex__DOT____Vcellout__vx_d_e_reg__out_b_reg_data[8],31,0); + VL_SIG(Vortex__DOT____Vcellout__vx_d_e_reg__out_a_reg_data[8],31,0); + VL_SIG8(Vortex__DOT____Vcellinp__vx_d_e_reg__in_valid[8],0,0); + VL_SIG(Vortex__DOT____Vcellinp__vx_d_e_reg__in_b_reg_data[8],31,0); + VL_SIG(Vortex__DOT____Vcellinp__vx_d_e_reg__in_a_reg_data[8],31,0); + VL_SIG8(Vortex__DOT____Vcellout__vx_execute__out_valid[8],0,0); + VL_SIG(Vortex__DOT____Vcellout__vx_execute__out_b_reg_data[8],31,0); + VL_SIG(Vortex__DOT____Vcellout__vx_execute__out_alu_result[8],31,0); + VL_SIG8(Vortex__DOT____Vcellinp__vx_execute__in_valid[8],0,0); + VL_SIG(Vortex__DOT____Vcellinp__vx_execute__in_b_reg_data[8],31,0); + VL_SIG(Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data[8],31,0); + VL_SIG8(Vortex__DOT____Vcellout__vx_e_m_reg__out_valid[8],0,0); + VL_SIG(Vortex__DOT____Vcellout__vx_e_m_reg__out_b_reg_data[8],31,0); + VL_SIG(Vortex__DOT____Vcellout__vx_e_m_reg__out_alu_result[8],31,0); + VL_SIG8(Vortex__DOT____Vcellinp__vx_e_m_reg__in_valid[8],0,0); + VL_SIG(Vortex__DOT____Vcellinp__vx_e_m_reg__in_b_reg_data[8],31,0); + VL_SIG(Vortex__DOT____Vcellinp__vx_e_m_reg__in_alu_result[8],31,0); + VL_SIG8(Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid[8],0,0); + VL_SIG(Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data[8],31,0); + VL_SIG(Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address[8],31,0); }; struct { - VL_SIG(Vortex__DOT____Vcellinp__vx_writeback__in_mem_result[5],31,0); - VL_SIG(Vortex__DOT____Vcellinp__vx_writeback__in_alu_result[5],31,0); - VL_SIG(Vortex__DOT____Vcellout__vx_forwarding__out_src2_fwd_data[5],31,0); - VL_SIG(Vortex__DOT____Vcellout__vx_forwarding__out_src1_fwd_data[5],31,0); - VL_SIG(Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_mem_data[5],31,0); - VL_SIG(Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_alu_result[5],31,0); - VL_SIG(Vortex__DOT____Vcellinp__vx_forwarding__in_memory_mem_data[5],31,0); - VL_SIG(Vortex__DOT____Vcellinp__vx_forwarding__in_memory_alu_result[5],31,0); - VL_SIG(Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result[5],31,0); + VL_SIG8(Vortex__DOT____Vcellout__vx_memory__out_valid[8],0,0); + VL_SIG(Vortex__DOT____Vcellout__vx_memory__out_mem_result[8],31,0); + VL_SIG(Vortex__DOT____Vcellout__vx_memory__out_alu_result[8],31,0); + VL_SIG(Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data[8],31,0); + VL_SIG8(Vortex__DOT____Vcellinp__vx_memory__in_valid[8],0,0); + VL_SIG(Vortex__DOT____Vcellinp__vx_memory__in_rd2[8],31,0); + VL_SIG(Vortex__DOT____Vcellinp__vx_memory__in_alu_result[8],31,0); + VL_SIG8(Vortex__DOT____Vcellout__vx_m_w_reg__out_valid[8],0,0); + VL_SIG(Vortex__DOT____Vcellout__vx_m_w_reg__out_mem_result[8],31,0); + VL_SIG(Vortex__DOT____Vcellout__vx_m_w_reg__out_alu_result[8],31,0); + VL_SIG8(Vortex__DOT____Vcellinp__vx_m_w_reg__in_valid[8],0,0); + VL_SIG(Vortex__DOT____Vcellinp__vx_m_w_reg__in_mem_result[8],31,0); + VL_SIG(Vortex__DOT____Vcellinp__vx_m_w_reg__in_alu_result[8],31,0); + VL_SIG(Vortex__DOT____Vcellout__vx_writeback__out_write_data[8],31,0); + VL_SIG(Vortex__DOT____Vcellinp__vx_writeback__in_mem_result[8],31,0); + VL_SIG(Vortex__DOT____Vcellinp__vx_writeback__in_alu_result[8],31,0); + VL_SIG(Vortex__DOT____Vcellout__vx_forwarding__out_src2_fwd_data[8],31,0); + VL_SIG(Vortex__DOT____Vcellout__vx_forwarding__out_src1_fwd_data[8],31,0); + VL_SIG(Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_mem_data[8],31,0); + VL_SIG(Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_alu_result[8],31,0); + VL_SIG(Vortex__DOT____Vcellinp__vx_forwarding__in_memory_mem_data[8],31,0); + VL_SIG(Vortex__DOT____Vcellinp__vx_forwarding__in_memory_alu_result[8],31,0); + VL_SIG(Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result[8],31,0); VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellout__vx_register_file_master__out_regs[32],31,0); - VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellinp__vx_register_file_slave__in_regs[32],31,0); + VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__in_regs[32],31,0); + VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__in_regs[32],31,0); + VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__in_regs[32],31,0); + VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__4__KET____DOT__vx_register_file_slave__in_regs[32],31,0); + VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__5__KET____DOT__vx_register_file_slave__in_regs[32],31,0); + VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__6__KET____DOT__vx_register_file_slave__in_regs[32],31,0); + VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellinp__gen_code_label__BRA__7__KET____DOT__vx_register_file_slave__in_regs[32],31,0); }; static VL_ST_SIG8(__Vtable1_Vortex__DOT__vx_decode__DOT__mul_alu[8],4,0); @@ -300,8 +331,8 @@ VL_MODULE(VVortex) { private: static QData _change_request(VVortex__Syms* __restrict vlSymsp); public: - static void _combo__TOP__10(VVortex__Syms* __restrict vlSymsp); static void _combo__TOP__5(VVortex__Syms* __restrict vlSymsp); + static void _combo__TOP__9(VVortex__Syms* __restrict vlSymsp); private: void _ctor_var_reset(); public: @@ -314,13 +345,12 @@ VL_MODULE(VVortex) { static void _eval_initial(VVortex__Syms* __restrict vlSymsp); static void _eval_settle(VVortex__Syms* __restrict vlSymsp); static void _initial__TOP__6(VVortex__Syms* __restrict vlSymsp); - static void _multiclk__TOP__8(VVortex__Syms* __restrict vlSymsp); static void _sequent__TOP__2(VVortex__Syms* __restrict vlSymsp); static void _sequent__TOP__3(VVortex__Syms* __restrict vlSymsp); static void _sequent__TOP__4(VVortex__Syms* __restrict vlSymsp); static void _sequent__TOP__7(VVortex__Syms* __restrict vlSymsp); static void _settle__TOP__1(VVortex__Syms* __restrict vlSymsp); - static void _settle__TOP__9(VVortex__Syms* __restrict vlSymsp); + static void _settle__TOP__8(VVortex__Syms* __restrict vlSymsp); } VL_ATTR_ALIGNED(128); #endif // guard diff --git a/rtl/obj_dir/VVortex__ALL.a b/rtl/obj_dir/VVortex__ALL.a index 0f35dde8..de1fba73 100644 Binary files a/rtl/obj_dir/VVortex__ALL.a and b/rtl/obj_dir/VVortex__ALL.a differ diff --git a/rtl/obj_dir/VVortex__ALLcls.o b/rtl/obj_dir/VVortex__ALLcls.o index 314cc662..6a830dee 100644 Binary files a/rtl/obj_dir/VVortex__ALLcls.o and b/rtl/obj_dir/VVortex__ALLcls.o differ diff --git a/rtl/obj_dir/VVortex__verFiles.dat b/rtl/obj_dir/VVortex__verFiles.dat index f99dcc95..7f1e25e0 100644 --- a/rtl/obj_dir/VVortex__verFiles.dat +++ b/rtl/obj_dir/VVortex__verFiles.dat @@ -1,27 +1,27 @@ # DESCRIPTION: Verilator output: Timestamp data for --skip-identical. Delete at will. C "-Wall -cc Vortex.v --exe test_bench.cpp" S 4608404 12889046060 1553037052 0 1548678579 0 "/usr/local/Cellar/verilator/4.010/bin/verilator_bin" -S 2862 12889318286 1553966962 0 1553966962 0 "VX_alu.v" -S 1495 12889087229 1553211178 0 1553211178 0 "VX_csr_handler.v" -S 5105 12889318287 1554013046 0 1554013046 0 "VX_d_e_reg.v" -S 15001 12889419225 1554022101 0 1554022101 0 "VX_decode.v" -S 1557 12889419227 1554008503 0 1554008503 0 "VX_define.v" -S 4077 12889318289 1553997299 0 1553997299 0 "VX_e_m_reg.v" -S 3288 12889318290 1554000824 0 1554000824 0 "VX_execute.v" -S 1540 12889050060 1554018831 0 1554018831 0 "VX_f_d_reg.v" -S 4588 12889419228 1554021543 0 1554021543 0 "VX_fetch.v" -S 5632 12889086478 1553672336 0 1553672336 0 "VX_forwarding.v" -S 1677 12889085814 1553673165 0 1553673165 0 "VX_m_w_reg.v" -S 3002 12889084513 1553997670 0 1553997670 0 "VX_memory.v" -S 1075 12889419229 1554007548 0 1554007548 0 "VX_register_file.v" -S 1381 12889437241 1554016243 0 1554016243 0 "VX_register_file_slave.v" -S 1173 12889419230 1553930874 0 1553930874 0 "VX_writeback.v" -S 16910 12889419231 1554021042 0 1554021042 0 "Vortex.v" -T 416263 12889432530 1554022103 0 1554022103 0 "obj_dir/VVortex.cpp" -T 17158 12889432529 1554022103 0 1554022103 0 "obj_dir/VVortex.h" -T 1800 12889432532 1554022103 0 1554022103 0 "obj_dir/VVortex.mk" -T 530 12889432528 1554022103 0 1554022103 0 "obj_dir/VVortex__Syms.cpp" -T 717 12889432527 1554022103 0 1554022103 0 "obj_dir/VVortex__Syms.h" -T 489 12889432533 1554022103 0 1554022103 0 "obj_dir/VVortex__ver.d" -T 0 0 1554022103 0 1554022103 0 "obj_dir/VVortex__verFiles.dat" -T 1159 12889432531 1554022103 0 1554022103 0 "obj_dir/VVortex_classes.mk" +S 2862 12889457986 1554023089 0 1554023089 0 "VX_alu.v" +S 1495 12889457987 1554023089 0 1554023089 0 "VX_csr_handler.v" +S 5105 12889457988 1554023089 0 1554023089 0 "VX_d_e_reg.v" +S 15102 12889457989 1554023916 0 1554023916 0 "VX_decode.v" +S 1557 12889457991 1554023528 0 1554023528 0 "VX_define.v" +S 4077 12889457992 1554023089 0 1554023089 0 "VX_e_m_reg.v" +S 3288 12889457993 1554023938 0 1554023938 0 "VX_execute.v" +S 1540 12889457994 1554023089 0 1554023089 0 "VX_f_d_reg.v" +S 4606 12889457995 1554023897 0 1554023897 0 "VX_fetch.v" +S 5632 12889457996 1554023089 0 1554023089 0 "VX_forwarding.v" +S 1677 12889457997 1554023089 0 1554023089 0 "VX_m_w_reg.v" +S 3002 12889457998 1554023089 0 1554023089 0 "VX_memory.v" +S 1078 12889457999 1554023928 0 1554023928 0 "VX_register_file.v" +S 1387 12889458000 1554023933 0 1554023933 0 "VX_register_file_slave.v" +S 1323 12889458001 1554023982 0 1554023982 0 "VX_writeback.v" +S 16910 12889458002 1554023089 0 1554023089 0 "Vortex.v" +T 797432 12889458029 1554023984 0 1554023984 0 "obj_dir/VVortex.cpp" +T 21112 12889458030 1554023984 0 1554023984 0 "obj_dir/VVortex.h" +T 1800 12889458031 1554023984 0 1554023984 0 "obj_dir/VVortex.mk" +T 530 12889458039 1554023984 0 1554023984 0 "obj_dir/VVortex__Syms.cpp" +T 717 12889458040 1554023984 0 1554023984 0 "obj_dir/VVortex__Syms.h" +T 489 12889458041 1554023984 0 1554023984 0 "obj_dir/VVortex__ver.d" +T 0 0 1554023984 0 1554023984 0 "obj_dir/VVortex__verFiles.dat" +T 1159 12889458043 1554023984 0 1554023984 0 "obj_dir/VVortex_classes.mk" diff --git a/rtl/obj_dir/test_bench.o b/rtl/obj_dir/test_bench.o index 0b5dd948..a6da5b67 100644 Binary files a/rtl/obj_dir/test_bench.o and b/rtl/obj_dir/test_bench.o differ diff --git a/rtl/results.txt b/rtl/results.txt index 3fff848d..65f1ab43 100644 --- a/rtl/results.txt +++ b/rtl/results.txt @@ -1,9 +1,9 @@ **************** ../../kernel/vortex_test.hex **************** -# Dynamic Instructions: 482804 -# of total cycles: 482816 +# Dynamic Instructions: 365972 +# of total cycles: 365984 # of forwarding stalls: 0 # of branch stalls: 0 -# CPI: 1.00002 +# CPI: 1.00003 # time to simulate: 6.95312e-310 milliseconds # GRADE: Failed on test: 0 diff --git a/rtl/test_bench.h b/rtl/test_bench.h index e020f898..f35a6ff1 100644 --- a/rtl/test_bench.h +++ b/rtl/test_bench.h @@ -198,7 +198,7 @@ bool Vortex::dbus_driver() ram.writeHalf( addr, &data_write); } else if (vortex->out_cache_driver_in_mem_write == SW_MEM_WRITE) { - printf("STORING %x in %x \n", data_write, addr); + // printf("STORING %x in %x \n", data_write, addr); data_write = data_write; ram.writeWord( addr, &data_write); } @@ -232,7 +232,7 @@ bool Vortex::dbus_driver() } else if (vortex->out_cache_driver_in_mem_read == LW_MEM_READ) { // printf("Reading mem - Addr: %x = %x\n", addr, data_read); - std::cout << "READING - Addr: " << std::hex << addr << " = " << data_read << "\n"; + // std::cout << "READING - Addr: " << std::hex << addr << " = " << data_read << "\n"; std::cout << std::dec; vortex->in_cache_driver_out_data[curr_th] = data_read;