lkg build rollout with 16cores optimization on arria10

2021-01-24 16:49:22 -08:00
parent 74a687e395
commit 8775f63ec4
55 changed files with 1021 additions and 868 deletions
--- a/hw/rtl/VX_databus_arb.v
+++ b/hw/rtl/VX_databus_arb.v
@@ -39,7 +39,8 @@ module VX_databus_arb (
                         && (core_req_if.addr[i][REQ_ADDRW-1:SMEM_ASHIFT-REQ_ASHIFT] < (32-SMEM_ASHIFT)'(`SHARED_MEM_BASE_ADDR >> SMEM_ASHIFT));

        VX_skid_buffer #(
-            .DATAW (REQ_DATAW)
+            .DATAW    (REQ_DATAW),
+            .BUFFERED (1)
        ) cache_out_buffer (
            .clk       (clk),
            .reset     (reset),
@@ -52,7 +53,8 @@ module VX_databus_arb (
        );

        VX_skid_buffer #(
-            .DATAW (REQ_DATAW)
+            .DATAW    (REQ_DATAW),
+            .BUFFERED (1)
        ) smem_out_buffer (
            .clk       (clk),
            .reset     (reset),