lkg build rollout with 16cores optimization on arria10
This commit is contained in:
@@ -10,20 +10,21 @@ endif
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all: ase-1c
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sources.txt:
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./gen_sources.sh > sources.txt
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gen_sources_a10:
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./gen_sources.sh arria10 > sources.txt
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gen_sources: sources.txt
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gen_sources_s10:
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./gen_sources.sh stratix10 > sources.txt
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ase-1c: gen_sources setup-ase-1c
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ase-1c: gen_sources_a10 setup-ase-1c
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make -C $(ASE_BUILD_DIR)_1c
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cp $(RTL_DIR)/fp_cores/altera/arria10/*.hex $(ASE_BUILD_DIR)_1c/work
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ase-2c: gen_sources setup-ase-2c
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ase-2c: gen_sources_a10 setup-ase-2c
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make -C $(ASE_BUILD_DIR)_2c
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cp $(RTL_DIR)/fp_cores/altera/arria10/*.hex $(ASE_BUILD_DIR)_2c/work
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ase-4c: gen_sources setup-ase-4c
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ase-4c: gen_sources_a10 setup-ase-4c
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make -C $(ASE_BUILD_DIR)_4c
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cp $(RTL_DIR)/fp_cores/altera/arria10/*.hex $(ASE_BUILD_DIR)_4c/work
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@@ -33,29 +34,35 @@ setup-ase-2c: $(ASE_BUILD_DIR)_2c/Makefile
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setup-ase-4c: $(ASE_BUILD_DIR)_4c/Makefile
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$(ASE_BUILD_DIR)_1c/Makefile: sources.txt
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$(ASE_BUILD_DIR)_1c/Makefile:
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afu_sim_setup -s sources_1c.txt $(ASE_BUILD_DIR)_1c
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$(ASE_BUILD_DIR)_2c/Makefile: sources.txt
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$(ASE_BUILD_DIR)_2c/Makefile:
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afu_sim_setup -s sources_2c.txt $(ASE_BUILD_DIR)_2c
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$(ASE_BUILD_DIR)_4c/Makefile: sources.txt
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$(ASE_BUILD_DIR)_4c/Makefile:
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afu_sim_setup -s sources_4c.txt $(ASE_BUILD_DIR)_4c
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fpga-1c: gen_sources setup-fpga-1c
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fpga-1c: gen_sources_a10 setup-fpga-1c
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cd $(FPGA_BUILD_DIR)_1c && $(RUN_SYNTH)
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fpga-2c: gen_sources setup-fpga-2c
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fpga-2c: gen_sources_a10 setup-fpga-2c
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cd $(FPGA_BUILD_DIR)_2c && $(RUN_SYNTH)
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fpga-4c: gen_sources setup-fpga-4c
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fpga-4c: gen_sources_a10 setup-fpga-4c
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cd $(FPGA_BUILD_DIR)_4c && $(RUN_SYNTH)
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fpga-8c: gen_sources setup-fpga-8c
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fpga-8c: gen_sources_a10 setup-fpga-8c
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cd $(FPGA_BUILD_DIR)_8c && $(RUN_SYNTH)
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fpga-16c: gen_sources setup-fpga-16c
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fpga-16c: gen_sources_a10 setup-fpga-16c
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cd $(FPGA_BUILD_DIR)_16c && $(RUN_SYNTH)
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fpga-32c: gen_sources_s10 setup-fpga-32c
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cd $(FPGA_BUILD_DIR)_32c && $(RUN_SYNTH)
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fpga-64c: gen_sources_s10 setup-fpga-64c
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cd $(FPGA_BUILD_DIR)_64c && $(RUN_SYNTH)
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setup-fpga-1c: $(FPGA_BUILD_DIR)_1c/build/dcp.qpf
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@@ -67,6 +74,10 @@ setup-fpga-8c: $(FPGA_BUILD_DIR)_8c/build/dcp.qpf
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setup-fpga-16c: $(FPGA_BUILD_DIR)_16c/build/dcp.qpf
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setup-fpga-32c: $(FPGA_BUILD_DIR)_32c/build/dcp.qpf
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setup-fpga-64c: $(FPGA_BUILD_DIR)_64c/build/dcp.qpf
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$(FPGA_BUILD_DIR)_1c/build/dcp.qpf:
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afu_synth_setup -s sources_1c.txt $(FPGA_BUILD_DIR)_1c
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@@ -82,6 +93,12 @@ $(FPGA_BUILD_DIR)_8c/build/dcp.qpf:
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$(FPGA_BUILD_DIR)_16c/build/dcp.qpf:
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afu_synth_setup -s sources_16c.txt $(FPGA_BUILD_DIR)_16c
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$(FPGA_BUILD_DIR)_32c/build/dcp.qpf:
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afu_synth_setup -s sources_32c.txt $(FPGA_BUILD_DIR)_32c
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$(FPGA_BUILD_DIR)_64c/build/dcp.qpf:
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afu_synth_setup -s sources_64c.txt $(FPGA_BUILD_DIR)_64c
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run-ase-1c:
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cd $(ASE_BUILD_DIR)_1c && make sim
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@@ -115,5 +132,11 @@ clean-fpga-8c:
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clean-fpga-16c:
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rm -rf $(FPGA_BUILD_DIR)_16c sources.txt
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clean: clean-ase-1c clean-ase-2c clean-ase-4c clean-fpga-1c clean-fpga-2c clean-fpga-4c clean-fpga-8c clean-fpga-16c
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clean-fpga-32c:
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rm -rf $(FPGA_BUILD_DIR)_32c sources.txt
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clean-fpga-64c:
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rm -rf $(FPGA_BUILD_DIR)_64c sources.txt
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clean: clean-ase-1c clean-ase-2c clean-ase-4c clean-fpga-1c clean-fpga-2c clean-fpga-4c clean-fpga-8c clean-fpga-16c clean-fpga-32c clean-fpga-64c
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rm sources.txt
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@@ -110,6 +110,7 @@ make -C core8 clean && make -C core8 > core8/build.log 2>&1 &
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make -C vortex clean && make -C vortex > vortex/build.log 2>&1 &
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make -C top clean && make -C top > top/build.log 2>&1 &
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make -C top1 clean && make -C top1 > top1/build.log 2>&1 &
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make -C top2 clean && make -C top2 > top2/build.log 2>&1 &
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make -C top8 clean && make -C top8 > top8/build.log 2>&1 &
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make -C top16 clean && make -C top16 > top16/build.log 2>&1 &
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make -C top32 clean && make -C top32 > top32/build.log 2>&1 &
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@@ -29,8 +29,7 @@ add_files()
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done
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}
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add_dirs $rtl_dir/fp_cores/altera/arria10
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#add_dirs $rtl_dir/fp_cores/altera/stratix10
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add_dirs $rtl_dir/fp_cores/altera/$1
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add_dirs $rtl_dir/libs $rtl_dir/interfaces $rtl_dir/fp_cores $rtl_dir/cache $rtl_dir $rtl_dir/afu
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@@ -1,6 +1,6 @@
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+define+NUM_CORES=4
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+define+NUM_CLUSTERS=4
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+define+L3_ENABLE=1
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#+define+L3_ENABLE=1
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+define+SYNTHESIS
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+define+QUARTUS
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12
hw/opae/sources_32c.txt
Normal file
12
hw/opae/sources_32c.txt
Normal file
@@ -0,0 +1,12 @@
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+define+NUM_CORES=8
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+define+NUM_CLUSTERS=4
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#+define+L3_ENABLE=1
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+define+SYNTHESIS
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+define+QUARTUS
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#+define+PERF_ENABLE
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vortex_afu.json
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QI:vortex_afu.qsf
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C:sources.txt
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12
hw/opae/sources_64c.txt
Normal file
12
hw/opae/sources_64c.txt
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@@ -0,0 +1,12 @@
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+define+NUM_CORES=8
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+define+NUM_CLUSTERS=8
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#+define+L3_ENABLE=1
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+define+SYNTHESIS
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+define+QUARTUS
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#+define+PERF_ENABLE
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vortex_afu.json
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QI:vortex_afu.qsf
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C:sources.txt
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@@ -1,6 +1,6 @@
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+define+NUM_CORES=4
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+define+NUM_CLUSTERS=2
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+define+L3_ENABLE=1
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#+define+L3_ENABLE=1
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+define+SYNTHESIS
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+define+QUARTUS
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