Added CSR TID/WID reads

2019-10-21 02:10:05 -04:00
parent 405926f66f
commit 84f5ccb484
25 changed files with 2339 additions and 2241 deletions
--- a/rtl/VX_front_end.v
+++ b/rtl/VX_front_end.v
@@ -16,8 +16,6 @@ module VX_front_end (

 	VX_frE_to_bckE_req_inter  VX_bckE_req,

-
-	output wire[11:0] decode_csr_address,
 	output wire fetch_ebreak
 );

@@ -81,10 +79,6 @@ VX_d_e_reg vx_d_e_reg(
 		.VX_bckE_req       (VX_bckE_req)
 	);

-
-assign decode_csr_address = VX_frE_to_bckE_req.csr_address;
-
-
 endmodule