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minor updates

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This commit is contained in:
Blaise Tine
2020-07-31 13:39:52 -07:00
parent c9755a0c48
commit 836a735555
19 changed files with 710 additions and 189 deletions
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2
hw/rtl/VX_csr_data.v
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@@ -37,7 +37,7 @@ module VX_csr_data #(
reg [`FRM_BITS+`FFG_BITS-1:0] csr_fcsr [`NUM_WARPS-1:0]; // fflags + frm
always @(posedge clk) begin
if (cmt_to_csr_if.upd_fflags) begin
if (cmt_to_csr_if.has_fflags) begin
csr_fflags[cmt_to_csr_if.warp_num] <= cmt_to_csr_if.fflags;
csr_fcsr[cmt_to_csr_if.warp_num][`FFG_BITS-1:0] <= cmt_to_csr_if.fflags;
end