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fpga fixes

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This commit is contained in:
Blaise Tine
2020-06-27 14:03:20 -07:00
parent d4e006d92d
commit 8302641510
28 changed files with 589 additions and 447 deletions
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38
driver/opae/scope.cpp
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@@ -37,9 +37,9 @@ static const scope_signal_t scope_signals[] = {
{ 32, "dram_req_addr" },
{ 1, "dram_req_rw" },
{ 16, "dram_req_byteen" },
{ 32, "dram_req_data" },
{ 128, "dram_req_data" },
{ 29, "dram_req_tag" },
{ 32, "dram_rsp_data" },
{ 128, "dram_rsp_data" },
{ 29, "dram_rsp_tag" },
{ 32, "snp_req_addr" },
@@ -55,12 +55,12 @@ static const scope_signal_t scope_signals[] = {
{ NW_BITS, "dcache_req_warp_num" },
{ 32, "dcache_req_curr_PC" },
{ 32, "dcache_req_addr" },
{ 64, "dcache_req_addr" },
{ 1, "dcache_req_rw" },
{ 4, "dcache_req_byteen" },
{ 32, "dcache_req_data" },
{ 8, "dcache_req_byteen" },
{ 64, "dcache_req_data" },
{ NW_BITS, "dcache_req_tag" },
{ 32, "dcache_rsp_data" },
{ 64, "dcache_rsp_data" },
{ NW_BITS, "dcache_rsp_tag" },
{ NW_BITS, "decode_warp_num" },
@@ -70,14 +70,26 @@ static const scope_signal_t scope_signals[] = {
{ 5, "decode_rs2" },
{ NW_BITS, "execute_warp_num" },
{ 32, "execute_curr_PC" },
{ 5, "execute_rd" },
{ 32, "execute_a" },
{ 32, "execute_b" },
{ 64, "execute_a" },
{ 64, "execute_b" },
{ NW_BITS, "writeback_warp_num" },
{ 32, "writeback_curr_PC" },
{ 2, "writeback_wb" },
{ 5, "writeback_rd" },
{ 32, "writeback_data" },
{ 64, "writeback_data" },
{ 32, "bank_addr_st0" },
{ 32, "bank_addr_st1" },
{ 32, "bank_addr_st2" },
{ 1, "scope_bank_is_mrvq_st1" },
{ 1, "scope_bank_miss_st1" },
{ 1, "scope_bank_dirty_st1" },
{ 1, "scope_bank_tag_valid_st1" },
{ 1, "scope_bank_tag_match_st1" },
{ 1, "scope_bank_force_miss_st1" },
///////////////////////////////////////////////////////////////////////////
@@ -103,12 +115,18 @@ static const scope_signal_t scope_signals[] = {
{ NUM_THREADS, "decode_valid" },
{ NUM_THREADS, "execute_valid" },
{ NUM_THREADS, "writeback_valid" },
{ NUM_THREADS, "writeback_valid" },
{ 1, "schedule_delay" },
{ 1, "memory_delay" },
{ 1, "exec_delay" },
{ 1, "gpr_stage_delay" },
{ 1, "busy" },
{ 1, "bank_valid_st0" },
{ 1, "bank_valid_st1" },
{ 1, "bank_valid_st2" },
{ 1, "bank_stall_pipe" },
};
static const int num_signals = sizeof(scope_signals) / sizeof(scope_signal_t);

4
driver/opae/vortex.cpp
View File

@@ -306,7 +306,7 @@ extern int vx_copy_to_dev(vx_buffer_h hbuffer, size_t dev_maddr, size_t size, si
auto ls_shift = (int)std::log2(line_size);
CHECK_RES(fpgaWriteMMIO64(device->fpga, 0, MMIO_CSR_IO_ADDR, (buffer->io_addr + src_offset) >> ls_shift));
CHECK_RES(fpgaWriteMMIO64(device->fpga, 0, MMIO_CSR_MEM_ADDR, (dev_maddr >> ls_shift) ));
CHECK_RES(fpgaWriteMMIO64(device->fpga, 0, MMIO_CSR_MEM_ADDR, dev_maddr >> ls_shift));
CHECK_RES(fpgaWriteMMIO64(device->fpga, 0, MMIO_CSR_DATA_SIZE, asize >> ls_shift));
CHECK_RES(fpgaWriteMMIO64(device->fpga, 0, MMIO_CSR_CMD, CMD_TYPE_WRITE));
@@ -349,7 +349,7 @@ extern int vx_copy_from_dev(vx_buffer_h hbuffer, size_t dev_maddr, size_t size,
auto ls_shift = (int)std::log2(line_size);
CHECK_RES(fpgaWriteMMIO64(device->fpga, 0, MMIO_CSR_IO_ADDR, (buffer->io_addr + dest_offset) >> ls_shift));
CHECK_RES(fpgaWriteMMIO64(device->fpga, 0, MMIO_CSR_MEM_ADDR, (dev_maddr) >> ls_shift));
CHECK_RES(fpgaWriteMMIO64(device->fpga, 0, MMIO_CSR_MEM_ADDR, dev_maddr >> ls_shift));
CHECK_RES(fpgaWriteMMIO64(device->fpga, 0, MMIO_CSR_DATA_SIZE, asize >> ls_shift));
CHECK_RES(fpgaWriteMMIO64(device->fpga, 0, MMIO_CSR_CMD, CMD_TYPE_READ));