added config.vh
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@@ -1,5 +1,5 @@
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`include "VX_cache_config.v"
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`include "VX_cache_config.vh"
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module VX_cache_miss_resrv
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#(
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@@ -56,7 +56,7 @@ module VX_cache_miss_resrv
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input wire[`vx_clog2(NUMBER_REQUESTS)-1:0] miss_add_tid,
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input wire[4:0] miss_add_rd,
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input wire[1:0] miss_add_wb,
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input wire[`NW_M1:0] miss_add_warp_num,
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input wire[`NW_BITS-1:0] miss_add_warp_num,
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input wire[2:0] miss_add_mem_read,
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input wire[2:0] miss_add_mem_write,
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input wire[31:0] miss_add_pc,
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@@ -75,14 +75,14 @@ module VX_cache_miss_resrv
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output wire[`vx_clog2(NUMBER_REQUESTS)-1:0] miss_resrv_tid_st0,
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output wire[4:0] miss_resrv_rd_st0,
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output wire[1:0] miss_resrv_wb_st0,
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output wire[`NW_M1:0] miss_resrv_warp_num_st0,
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output wire[`NW_BITS-1:0] miss_resrv_warp_num_st0,
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output wire[2:0] miss_resrv_mem_read_st0,
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output wire[31:0] miss_resrv_pc_st0,
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output wire[2:0] miss_resrv_mem_write_st0
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);
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// Size of metadata = 32 + `vx_clog2(NUMBER_REQUESTS) + 5 + 2 + (`NW_M1 + 1)
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// Size of metadata = 32 + `vx_clog2(NUMBER_REQUESTS) + 5 + 2 + (`NW_BITS-1 + 1)
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reg[`MRVQ_METADATA_SIZE-1:0] metadata_table[MRVQ_SIZE-1:0];
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reg[MRVQ_SIZE-1:0][31:0] addr_table;
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reg[MRVQ_SIZE-1:0][31:0] pc_table;
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