minor update

hw/rtl/interfaces/VX_mem_req_if.v

@@ -4,19 +4,19 @@
 `include "../cache/VX_cache_define.vh"
 
 interface VX_mem_req_if #(
-    parameter MEM_LINE_WIDTH = 1,
-    parameter MEM_ADDR_WIDTH = 1,
-    parameter MEM_TAG_WIDTH  = 1,
-    parameter MEM_LINE_SIZE  = MEM_LINE_WIDTH / 8
+    parameter LINE_WIDTH = 1,
+    parameter ADDR_WIDTH = 1,
+    parameter TAG_WIDTH  = 1,
+    parameter LINE_SIZE  = LINE_WIDTH / 8
 ) ();
 
-    wire                        valid;    
-    wire                        rw;    
-    wire [MEM_LINE_SIZE-1:0]    byteen;
-    wire [MEM_ADDR_WIDTH-1:0]   addr;
-    wire [MEM_LINE_WIDTH-1:0]   data;  
-    wire [MEM_TAG_WIDTH-1:0]    tag;  
-    wire                        ready;
+    wire                    valid;    
+    wire                    rw;    
+    wire [LINE_SIZE-1:0]    byteen;
+    wire [ADDR_WIDTH-1:0]   addr;
+    wire [LINE_WIDTH-1:0]   data;  
+    wire [TAG_WIDTH-1:0]    tag;  
+    wire                    ready;
 
 endinterface