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tex_unit address generation complete

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Blaise Tine
2021-03-20 18:56:34 -04:00
parent 1431ef9bc0
commit 7ff5c082bc
4 changed files with 100 additions and 80 deletions
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5
hw/rtl/tex_unit/VX_tex_define.vh
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@@ -6,6 +6,7 @@
`define FIXED_FRAC 20
`define FIXED_INT (32 - `FIXED_FRAC)
`define FIXED_ONE (1 << `FIXED_FRAC)
`define FIXED_HALF (`FIXED_ONE >> 1)
`define FIXED_MASK (`FIXED_ONE - 1)
`define CLAMP(x,lo,hi) ((x < lo) ? lo : ((x > hi) ? hi : x))
@@ -13,8 +14,8 @@
`define TEX_ADDR_BITS 32
`define TEX_FORMAT_BITS 3
`define TEX_WRAP_BITS 2
`define TEX_WIDTH_BITS 12
`define TEX_HEIGHT_BITS 12
`define TEX_WIDTH_BITS 4
`define TEX_HEIGHT_BITS 4
`define TEX_STRIDE_BITS 2
`define TEX_FILTER_BITS 1