Runtime tests and riscv tests are runnable

This commit is contained in:
MalikBurton
2020-07-28 16:04:27 -04:00
parent e0f729e11e
commit 7fc7bc0cab
7 changed files with 105 additions and 91 deletions

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@@ -89,4 +89,4 @@ run-mt: build-mt
(cd obj_dir && ./VVortex) (cd obj_dir && ./VVortex)
clean: clean:
rm -rf obj_dir rm -rf obj_dir

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@@ -3,104 +3,103 @@
#include <fstream> #include <fstream>
#include <iomanip> #include <iomanip>
int main(int argc, char **argv) int main(int argc, char *argv[])
{ {
//#define ALL_TESTS //#define ALL_TESTS
#ifdef ALL_TESTS //#ifdef ALL_TESTS
bool passed = true; if(argc == 1) {
bool passed = true;
std::string tests[] = { std::string tests[] = {
"../../../benchmarks/riscv_tests/rv32ui-p-add.hex", "../../../benchmarks/riscv_tests/rv32ui-p-add.hex",
"../../../benchmarks/riscv_tests/rv32ui-p-addi.hex", "../../../benchmarks/riscv_tests/rv32ui-p-addi.hex",
"../../../benchmarks/riscv_tests/rv32ui-p-and.hex", "../../../benchmarks/riscv_tests/rv32ui-p-and.hex",
"../../../benchmarks/riscv_tests/rv32ui-p-andi.hex", "../../../benchmarks/riscv_tests/rv32ui-p-andi.hex",
"../../../benchmarks/riscv_tests/rv32ui-p-auipc.hex", "../../../benchmarks/riscv_tests/rv32ui-p-auipc.hex",
"../../../benchmarks/riscv_tests/rv32ui-p-beq.hex", "../../../benchmarks/riscv_tests/rv32ui-p-beq.hex",
"../../../benchmarks/riscv_tests/rv32ui-p-bge.hex", "../../../benchmarks/riscv_tests/rv32ui-p-bge.hex",
"../../../benchmarks/riscv_tests/rv32ui-p-bgeu.hex", "../../../benchmarks/riscv_tests/rv32ui-p-bgeu.hex",
"../../../benchmarks/riscv_tests/rv32ui-p-blt.hex", "../../../benchmarks/riscv_tests/rv32ui-p-blt.hex",
"../../../benchmarks/riscv_tests/rv32ui-p-bltu.hex", "../../../benchmarks/riscv_tests/rv32ui-p-bltu.hex",
"../../../benchmarks/riscv_tests/rv32ui-p-bne.hex", "../../../benchmarks/riscv_tests/rv32ui-p-bne.hex",
"../../../benchmarks/riscv_tests/rv32ui-p-jal.hex", "../../../benchmarks/riscv_tests/rv32ui-p-jal.hex",
"../../../benchmarks/riscv_tests/rv32ui-p-jalr.hex", "../../../benchmarks/riscv_tests/rv32ui-p-jalr.hex",
"../../../benchmarks/riscv_tests/rv32ui-p-lb.hex", "../../../benchmarks/riscv_tests/rv32ui-p-lb.hex",
"../../../benchmarks/riscv_tests/rv32ui-p-lbu.hex", "../../../benchmarks/riscv_tests/rv32ui-p-lbu.hex",
"../../../benchmarks/riscv_tests/rv32ui-p-lh.hex", "../../../benchmarks/riscv_tests/rv32ui-p-lh.hex",
"../../../benchmarks/riscv_tests/rv32ui-p-lhu.hex", "../../../benchmarks/riscv_tests/rv32ui-p-lhu.hex",
"../../../benchmarks/riscv_tests/rv32ui-p-lui.hex", "../../../benchmarks/riscv_tests/rv32ui-p-lui.hex",
"../../../benchmarks/riscv_tests/rv32ui-p-lw.hex", "../../../benchmarks/riscv_tests/rv32ui-p-lw.hex",
"../../../benchmarks/riscv_tests/rv32ui-p-or.hex", "../../../benchmarks/riscv_tests/rv32ui-p-or.hex",
"../../../benchmarks/riscv_tests/rv32ui-p-ori.hex", "../../../benchmarks/riscv_tests/rv32ui-p-ori.hex",
"../../../benchmarks/riscv_tests/rv32ui-p-sb.hex", "../../../benchmarks/riscv_tests/rv32ui-p-sb.hex",
"../../../benchmarks/riscv_tests/rv32ui-p-sh.hex", "../../../benchmarks/riscv_tests/rv32ui-p-sh.hex",
"../../../benchmarks/riscv_tests/rv32ui-p-simple.hex", "../../../benchmarks/riscv_tests/rv32ui-p-simple.hex",
"../../../benchmarks/riscv_tests/rv32ui-p-sll.hex", "../../../benchmarks/riscv_tests/rv32ui-p-sll.hex",
"../../../benchmarks/riscv_tests/rv32ui-p-slli.hex", "../../../benchmarks/riscv_tests/rv32ui-p-slli.hex",
"../../../benchmarks/riscv_tests/rv32ui-p-slt.hex", "../../../benchmarks/riscv_tests/rv32ui-p-slt.hex",
"../../../benchmarks/riscv_tests/rv32ui-p-slti.hex", "../../../benchmarks/riscv_tests/rv32ui-p-slti.hex",
"../../../benchmarks/riscv_tests/rv32ui-p-sltiu.hex", "../../../benchmarks/riscv_tests/rv32ui-p-sltiu.hex",
"../../../benchmarks/riscv_tests/rv32ui-p-sltu.hex", "../../../benchmarks/riscv_tests/rv32ui-p-sltu.hex",
"../../../benchmarks/riscv_tests/rv32ui-p-sra.hex", "../../../benchmarks/riscv_tests/rv32ui-p-sra.hex",
"../../../benchmarks/riscv_tests/rv32ui-p-srai.hex", "../../../benchmarks/riscv_tests/rv32ui-p-srai.hex",
"../../../benchmarks/riscv_tests/rv32ui-p-srl.hex", "../../../benchmarks/riscv_tests/rv32ui-p-srl.hex",
"../../../benchmarks/riscv_tests/rv32ui-p-srli.hex", "../../../benchmarks/riscv_tests/rv32ui-p-srli.hex",
"../../../benchmarks/riscv_tests/rv32ui-p-sub.hex", "../../../benchmarks/riscv_tests/rv32ui-p-sub.hex",
"../../../benchmarks/riscv_tests/rv32ui-p-sw.hex", "../../../benchmarks/riscv_tests/rv32ui-p-sw.hex",
"../../../benchmarks/riscv_tests/rv32ui-p-xor.hex", "../../../benchmarks/riscv_tests/rv32ui-p-xor.hex",
"../../../benchmarks/riscv_tests/rv32ui-p-xori.hex", "../../../benchmarks/riscv_tests/rv32ui-p-xori.hex",
"../../../benchmarks/riscv_tests/rv32um-p-div.hex", "../../../benchmarks/riscv_tests/rv32um-p-div.hex",
"../../../benchmarks/riscv_tests/rv32um-p-divu.hex", "../../../benchmarks/riscv_tests/rv32um-p-divu.hex",
"../../../benchmarks/riscv_tests/rv32um-p-mul.hex", "../../../benchmarks/riscv_tests/rv32um-p-mul.hex",
"../../../benchmarks/riscv_tests/rv32um-p-mulh.hex", "../../../benchmarks/riscv_tests/rv32um-p-mulh.hex",
"../../../benchmarks/riscv_tests/rv32um-p-mulhsu.hex", "../../../benchmarks/riscv_tests/rv32um-p-mulhsu.hex",
"../../../benchmarks/riscv_tests/rv32um-p-mulhu.hex", "../../../benchmarks/riscv_tests/rv32um-p-mulhu.hex",
"../../../benchmarks/riscv_tests/rv32um-p-rem.hex", "../../../benchmarks/riscv_tests/rv32um-p-rem.hex",
"../../../benchmarks/riscv_tests/rv32um-p-remu.hex" "../../../benchmarks/riscv_tests/rv32um-p-remu.hex"
}; };
for (std::string test : tests) { for (std::string test : tests) {
std::cerr << DEFAULT << "\n---------------------------------------\n"; std::cerr << DEFAULT << "\n---------------------------------------\n";
std::cerr << test << std::endl; std::cerr << test << std::endl;
RAM ram; RAM ram;
Simulator simulator; Simulator simulator;
simulator.attach_ram(&ram); simulator.attach_ram(&ram);
simulator.load_ihex(test.c_str()); simulator.load_ihex(test.c_str());
bool curr = simulator.run(); bool curr = simulator.run();
if (curr) std::cerr << GREEN << "Test Passed: " << test << std::endl; if (curr) std::cerr << GREEN << "Test Passed: " << test << std::endl;
if (!curr) std::cerr << RED << "Test Failed: " << test << std::endl; if (!curr) std::cerr << RED << "Test Failed: " << test << std::endl;
std::cerr << DEFAULT; std::cerr << DEFAULT;
passed = passed && curr; passed = passed && curr;
}
std::cerr << DEFAULT << "\n***************************************\n";
if (passed) std::cerr << DEFAULT << "PASSED ALL TESTS\n";
if (!passed) std::cerr << DEFAULT << "Failed one or more tests\n";
return !passed;
} }
std::cerr << DEFAULT << "\n***************************************\n"; //#else
if (argc >= 2) {
char* test = argv[2];
std::cerr << test << std::endl;
if (passed) std::cerr << DEFAULT << "PASSED ALL TESTS\n"; RAM ram;
if (!passed) std::cerr << DEFAULT << "Failed one or more tests\n"; Simulator simulator;
simulator.attach_ram(&ram);
simulator.load_ihex(test);
bool curr = simulator.run();
return !passed; if (curr) std::cerr << GREEN << "Test Passed: " << test << std::endl;
if (!curr) std::cerr << RED << "Test Failed: " << test << std::endl;
#else return !curr;
}
char test[] = "../../../runtime/tests/simple/vx_simple.hex"; //#endif
//char test[] = "../../../benchmarks/riscv_tests/rv32ui-p-lb.hex"; }
//char test[] = "../../../benchmarks/riscv_tests/rv32ui-p-lw.hex";
//char test[] = "../../../benchmarks/riscv_tests/rv32ui-p-sw.hex";
std::cerr << test << std::endl;
RAM ram;
Simulator simulator;
simulator.attach_ram(&ram);
simulator.load_ihex(test);
bool curr = simulator.run();
if (curr) std::cerr << GREEN << "Test Passed: " << test << std::endl;
if (!curr) std::cerr << RED << "Test Failed: " << test << std::endl;
return !curr;
#endif
}

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@@ -27,6 +27,9 @@ $(PROJECT).hex: $(PROJECT).elf
$(PROJECT).elf: $(SRCS) $(PROJECT).elf: $(SRCS)
$(CC) $(CFLAGS) $(SRCS) $(LDFLAGS) -o $(PROJECT).elf $(CC) $(CFLAGS) $(SRCS) $(LDFLAGS) -o $(PROJECT).elf
run: $(PROJECT).hex
(cd ../../../hw/simulate/obj_dir && ./VVortex -f ../../../runtime/tests/dev/$(PROJECT).hex)
.depend: $(SRCS) .depend: $(SRCS)
$(CC) $(CFLAGS) -MM $^ > .depend; $(CC) $(CFLAGS) -MM $^ > .depend;

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@@ -27,6 +27,9 @@ $(PROJECT).hex: $(PROJECT).elf
$(PROJECT).elf: $(SRCS) $(PROJECT).elf: $(SRCS)
$(CC) $(CFLAGS) $(SRCS) $(LDFLAGS) -o $(PROJECT).elf $(CC) $(CFLAGS) $(SRCS) $(LDFLAGS) -o $(PROJECT).elf
run: $(PROJECT).hex
(cd ../../../hw/simulate/obj_dir && ./VVortex -f ../../../runtime/tests/hello/$(PROJECT).hex)
.depend: $(SRCS) .depend: $(SRCS)
$(CC) $(CFLAGS) -MM $^ > .depend; $(CC) $(CFLAGS) -MM $^ > .depend;

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@@ -27,6 +27,9 @@ $(PROJECT).hex: $(PROJECT).elf
$(PROJECT).elf: $(SRCS) $(PROJECT).elf: $(SRCS)
$(CC) $(CFLAGS) $(SRCS) $(LDFLAGS) -o $(PROJECT).elf $(CC) $(CFLAGS) $(SRCS) $(LDFLAGS) -o $(PROJECT).elf
run: $(PROJECT).hex
(cd ../../../hw/simulate/obj_dir && ./VVortex -f ../../../runtime/tests/nlTest/$(PROJECT).hex)
.depend: $(SRCS) .depend: $(SRCS)
$(CC) $(CFLAGS) -MM $^ > .depend; $(CC) $(CFLAGS) -MM $^ > .depend;

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@@ -27,8 +27,11 @@ $(PROJECT).hex: $(PROJECT).elf
$(PROJECT).elf: $(SRCS) $(PROJECT).elf: $(SRCS)
$(CC) $(CFLAGS) $(SRCS) $(LDFLAGS) -o $(PROJECT).elf $(CC) $(CFLAGS) $(SRCS) $(LDFLAGS) -o $(PROJECT).elf
run: $(PROJECT).hex
(cd ../../../hw/simulate/obj_dir && ./VVortex -f ../../../runtime/tests/simple/$(PROJECT).hex)
.depend: $(SRCS) .depend: $(SRCS)
$(CC) $(CFLAGS) -MM $^ > .depend; $(CC) $(CFLAGS) -MM $^ > .depend;
clean: clean:
rm -rf *.elf *.hex *.dump .depend rm -rf *.elf *.hex *.dump .depend

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@@ -28,6 +28,9 @@ $(PROJECT).hex: $(PROJECT).elf
$(PROJECT).elf: $(SRCS) $(PROJECT).elf: $(SRCS)
$(CC) $(CFLAGS) $(SRCS) $(LDFLAGS) -o $(PROJECT).elf $(CC) $(CFLAGS) $(SRCS) $(LDFLAGS) -o $(PROJECT).elf
run: $(PROJECT).hex
(cd ../../../hw/simulate/obj_dir && ./VVortex -f ../../../runtime/tests/vecadd/$(PROJECT).hex)
.depend: $(SRCS) .depend: $(SRCS)
$(CC) $(CFLAGS) -MM $^ > .depend; $(CC) $(CFLAGS) -MM $^ > .depend;