OPAE HW full redesign - basic test passing
This commit is contained in:
@@ -1,7 +1,7 @@
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CXXFLAGS += -std=c++11 -O0 -g -Wall -Wextra -pedantic -Wfatal-errors
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CXXFLAGS += -I../include -I/tools/opae/1.4.0/include
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CXXFLAGS += -I../include -I/tools/opae/1.4.0/include -I../../../runtime
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LDFLAGS += -L/tools/opae/1.4.0/lib
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@@ -17,6 +17,8 @@ CXXFLAGS +=-fstack-protector
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# Position independent code
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CXXFLAGS += -fPIC
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CXXFLAGS += -DGLOBAL_BLOCK_SIZE_BYTES=64
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LDFLAGS += -luuid
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LDFLAGS += -shared
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@@ -50,7 +52,7 @@ $(PROJECT_ASE): $(SRCS) $(ASE_DIR)
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$(CXX) $(CXXFLAGS) -DUSE_ASE $(SRCS) $(LDFLAGS) $(ASE_LIBS) -o $@
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vortex.o: vortex.cpp $(AFU_JSON_INFO)
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$(CC) $(CXXFLAGS) -c vortex.cpp -o $@
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$(CXX) $(CXXFLAGS) -c vortex.cpp -o $@
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$(ASE_DIR):
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mkdir -p ase
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@@ -4,35 +4,35 @@
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#include <unistd.h>
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#include <assert.h>
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#include <uuid/uuid.h>
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#include <opae/fpga.h>
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#include <vortex.h>
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#include "vortex_afu.h"
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// MMIO Address Mappings
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#define MMIO_COPY_IO_ADDRESS 0X120
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#define MMIO_COPY_AVM_ADDRESS 0x100
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#define MMIO_COPY_DATA_SIZE 0X118
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#define MMIO_CMD_TYPE 0X110
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#define MMIO_READY_FOR_CMD 0X198
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#define MMIO_CMD_TYPE_READ 0
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#define MMIO_CMD_TYPE_WRITE 1
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#define MMIO_CMD_TYPE_START 2
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#define MMIO_CMD_TYPE_SNOOP 3
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#define CHECK_RES(_expr) \
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do { \
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fpga_result res = _expr; \
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if (res == FPGA_OK) \
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break; \
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printf("OPAE Error: '%s' returned %d!\n", #_expr, (int)res); \
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printf("OPAE Error: '%s' returned %d, %s!\n", \
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#_expr, (int)res, fpgaErrStr(res)); \
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return -1; \
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} while (false)
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///////////////////////////////////////////////////////////////////////////////
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#define CMD_TYPE_READ AFU_IMAGE_CMD_TYPE_READ
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#define CMD_TYPE_WRITE AFU_IMAGE_CMD_TYPE_WRITE
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#define CMD_TYPE_RUN AFU_IMAGE_CMD_TYPE_RUN
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#define CMD_TYPE_SNOOP AFU_IMAGE_CMD_TYPE_SNOOP
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#define MMIO_CSR_CMD (AFU_IMAGE_MMIO_CSR_CMD * 4)
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#define MMIO_CSR_STATUS (AFU_IMAGE_MMIO_CSR_STATUS * 4)
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#define MMIO_CSR_IO_ADDR (AFU_IMAGE_MMIO_CSR_IO_ADDR * 4)
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#define MMIO_CSR_MEM_ADDR (AFU_IMAGE_MMIO_CSR_MEM_ADDR * 4)
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#define MMIO_CSR_DATA_SIZE (AFU_IMAGE_MMIO_CSR_DATA_SIZE * 4)
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///////////////////////////////////////////////////////////////////////////////
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typedef struct vx_device_ {
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fpga_handle fpga;
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size_t mem_allocation;
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@@ -42,21 +42,19 @@ typedef struct vx_buffer_ {
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uint64_t wsid;
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volatile void* host_ptr;
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uint64_t io_addr;
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fpga_handle fpga;
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vx_device_h hdevice;
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size_t size;
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} vx_buffer_t;
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static size_t align_size(size_t size) {
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uint32_t cache_block_size = vx_dev_caps(VX_CAPS_CACHE_LINESIZE);
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uint32_t cache_block_size = vx_dev_caps(VX_CAPS_CACHE_LINESIZE);
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return cache_block_size * ((size + cache_block_size - 1) / cache_block_size);
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}
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///////////////////////////////////////////////////////////////////////////////
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// Search for an accelerator matching the requested UUID and connect to it
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// Convert this to void if required as storing the fpga_handle to params variable
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extern int vx_dev_open(vx_device_h* hdevice) {
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fpga_properties filter = NULL;
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fpga_properties filter = nullptr;
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fpga_result res;
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fpga_guid guid;
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fpga_token accel_token;
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@@ -64,11 +62,14 @@ extern int vx_dev_open(vx_device_h* hdevice) {
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fpga_handle accel_handle;
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vx_device_t* device;
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if (NULL == hdevice)
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if (nullptr == hdevice)
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return -1;
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// ensure that the block size 64
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assert(64 == vx_dev_caps(VX_CAPS_CACHE_LINESIZE));
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// Set up a filter that will search for an accelerator
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fpgaGetProperties(NULL, &filter);
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fpgaGetProperties(nullptr, &filter);
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fpgaPropertiesSetObjectType(filter, FPGA_ACCELERATOR);
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// Add the desired UUID to the filter
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@@ -84,13 +85,13 @@ extern int vx_dev_open(vx_device_h* hdevice) {
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if (num_matches < 1) {
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fprintf(stderr, "Accelerator %s not found!\n", AFU_ACCEL_UUID);
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return NULL;
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return -1;
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}
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// Open accelerator
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res = fpgaOpen(accel_token, &accel_handle, 0);
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if (FPGA_OK != res) {
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return NULL;
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return -1;
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}
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// Done with token
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@@ -98,9 +99,9 @@ extern int vx_dev_open(vx_device_h* hdevice) {
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// allocate device object
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device = (vx_device_t*)malloc(sizeof(vx_device_t));
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if (NULL == device) {
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if (nullptr == device) {
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fpgaClose(accel_handle);
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return NULL;
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return -1;
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}
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device->fpga = accel_handle;
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@@ -111,9 +112,8 @@ extern int vx_dev_open(vx_device_h* hdevice) {
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return 0;
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}
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// Close the fpga when all the operations are done
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extern int vx_dev_close(vx_device_h hdevice) {
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if (NULL == hdevice)
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if (nullptr == hdevice)
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return -1;
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vx_device_t *device = ((vx_device_t*)hdevice);
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@@ -126,15 +126,15 @@ extern int vx_dev_close(vx_device_h hdevice) {
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}
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extern int vx_alloc_dev_mem(vx_device_h hdevice, size_t size, size_t* dev_maddr) {
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if (NULL == hdevice
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|| NULL == dev_maddr
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if (nullptr == hdevice
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|| nullptr == dev_maddr
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|| 0 >= size)
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return -1;
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vx_device_t *device = ((vx_device_t*)hdevice);
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size_t asize = align_size(size);
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auto dev_mem_size = vx_dev_caps(VX_CAPS_LOCAL_MEM_SIZE);
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size_t dev_mem_size = vx_dev_caps(VX_CAPS_LOCAL_MEM_SIZE);
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if (device->mem_allocation + asize > dev_mem_size)
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return -1;
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@@ -151,9 +151,9 @@ extern int vx_alloc_shared_mem(vx_device_h hdevice, size_t size, vx_buffer_h* hb
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uint64_t io_addr;
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vx_buffer_t* buffer;
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if (NULL == hdevice
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if (nullptr == hdevice
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|| 0 >= size
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|| NULL == hbuffer)
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|| nullptr == hbuffer)
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return -1;
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vx_device_t *device = ((vx_device_t*)hdevice);
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@@ -174,7 +174,7 @@ extern int vx_alloc_shared_mem(vx_device_h hdevice, size_t size, vx_buffer_h* hb
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// allocate buffer object
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buffer = (vx_buffer_t*)malloc(sizeof(vx_buffer_t));
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if (NULL == buffer) {
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if (nullptr == buffer) {
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fpgaReleaseBuffer(device->fpga, wsid);
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return -1;
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}
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@@ -182,7 +182,7 @@ extern int vx_alloc_shared_mem(vx_device_h hdevice, size_t size, vx_buffer_h* hb
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buffer->wsid = wsid;
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buffer->host_ptr = host_ptr;
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buffer->io_addr = io_addr;
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buffer->fpga = device->fpga;
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buffer->hdevice = hdevice;
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buffer->size = size;
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*hbuffer = buffer;
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@@ -191,136 +191,30 @@ extern int vx_alloc_shared_mem(vx_device_h hdevice, size_t size, vx_buffer_h* hb
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}
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extern volatile void* vx_host_ptr(vx_buffer_h hbuffer) {
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if (nullptr == hbuffer)
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return nullptr;
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vx_buffer_t* buffer = ((vx_buffer_t*)hbuffer);
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if (NULL == buffer)
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return NULL;
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return buffer->host_ptr;
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}
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extern int vx_buf_release(vx_buffer_h hbuffer) {
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vx_buffer_t* buffer = ((vx_buffer_t*)hbuffer);
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if (NULL == buffer)
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if (nullptr == hbuffer)
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return -1;
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fpgaReleaseBuffer(buffer->fpga, buffer->wsid);
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vx_buffer_t* buffer = ((vx_buffer_t*)hbuffer);
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vx_device_t *device = ((vx_device_t*)buffer->hdevice);
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fpgaReleaseBuffer(device->fpga, buffer->wsid);
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free(buffer);
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return 0;
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}
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// Check if HW is ready for SW
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static int ready_for_sw(fpga_handle hdevice) {
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uint64_t data = 0;
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struct timespec sleep_time;
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#ifdef USE_ASE
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sleep_time.tv_sec = 1;
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sleep_time.tv_nsec = 0;
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#else
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sleep_time.tv_sec = 0;
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sleep_time.tv_nsec = 1000000;
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#endif
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do {
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CHECK_RES(fpgaReadMMIO64(hdevice, 0, MMIO_READY_FOR_CMD, &data));
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nanosleep(&sleep_time, NULL);
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} while (data != 0x1);
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return 0;
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}
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extern int vx_copy_to_dev(vx_buffer_h hbuffer, size_t dev_maddr, size_t size, size_t src_offset) {
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if (NULL == hbuffer
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|| 0 >= size)
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return -1;
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vx_buffer_t* buffer = ((vx_buffer_t*)hbuffer);
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// bound checking
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if (size + src_offset > buffer->size)
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return -1;
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// Ensure ready for new command
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if (ready_for_sw(buffer->fpga) != 0)
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return -1;
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CHECK_RES(fpgaWriteMMIO64(buffer->fpga, 0, MMIO_COPY_AVM_ADDRESS, dev_maddr));
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CHECK_RES(fpgaWriteMMIO64(buffer->fpga, 0, MMIO_COPY_IO_ADDRESS, buffer->io_addr + src_offset);
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CHECK_RES(fpgaWriteMMIO64(buffer->fpga, 0, MMIO_COPY_DATA_SIZE, size));
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CHECK_RES(fpgaWriteMMIO64(buffer->fpga, 0, MMIO_CMD_TYPE, MMIO_CMD_TYPE_WRITE));
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// Wait for the write operation to finish
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return ready_for_sw(buffer->fpga);
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}
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extern int vx_copy_from_dev(vx_buffer_h hbuffer, size_t dev_maddr, size_t size, size_t dest_offset) {
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if (NULL == hbuffer
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|| 0 >= size)
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return -1;
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vx_buffer_t* buffer = ((vx_buffer_t*)hbuffer);
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// bound checking
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if (size + dest_offset > buffer->size)
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return -1;
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// Ensure ready for new command
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if (ready_for_sw(buffer->fpga) != 0)
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return -1;
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CHECK_RES(fpgaWriteMMIO64(buffer->fpga, 0, MMIO_COPY_AVM_ADDRESS, dev_maddr));
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CHECK_RES(fpgaWriteMMIO64(buffer->fpga, 0, MMIO_COPY_IO_ADDRESS, buffer->io_addr + dest_offset);
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CHECK_RES(fpgaWriteMMIO64(buffer->fpga, 0, MMIO_COPY_DATA_SIZE, size));
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CHECK_RES(fpgaWriteMMIO64(buffer->fpga, 0, MMIO_CMD_TYPE, MMIO_CMD_TYPE_READ));
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// Wait for the write operation to finish
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return ready_for_sw(buffer->fpga);
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}
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extern int vx_flush_caches(vx_device_h hdevice, size_t dev_maddr, size_t size) {
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if (NULL == hbuffer
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|| 0 >= size)
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return -1;
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vx_buffer_t* buffer = ((vx_buffer_t*)hbuffer);
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// bound checking
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if (size + src_offset > buffer->size)
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return -1;
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// Ensure ready for new command
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if (ready_for_sw(buffer->fpga) != 0)
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return -1;
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CHECK_RES(fpgaWriteMMIO64(buffer->fpga, 0, MMIO_COPY_AVM_ADDRESS, dev_maddr));
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CHECK_RES(fpgaWriteMMIO64(buffer->fpga, 0, MMIO_COPY_IO_ADDRESS, (buffer->io_addr + src_offset)/VX_CACHE_LINESIZE));
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CHECK_RES(fpgaWriteMMIO64(buffer->fpga, 0, MMIO_COPY_DATA_SIZE, size));
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CHECK_RES(fpgaWriteMMIO64(buffer->fpga, 0, MMIO_CMD_TYPE, MMIO_CMD_TYPE_SNOOP));
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// Wait for the write operation to finish
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return ready_for_sw(buffer->fpga);
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return 0;
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}
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extern int vx_start(vx_device_h hdevice) {
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if (NULL == hdevice)
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return -1;
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vx_device_t *device = ((vx_device_t*)hdevice);
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// Ensure ready for new command
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if (ready_for_sw(device->fpga) != 0)
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return -1;
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CHECK_RES(fpgaWriteMMIO64(device->fpga, 0, MMIO_CMD_TYPE, MMIO_CMD_TYPE_START));
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return 0;
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}
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extern int vx_ready_wait(vx_device_h hdevice, long long timeout) {
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if (NULL == hdevice)
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if (nullptr == hdevice)
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return -1;
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vx_device_t *device = ((vx_device_t*)hdevice);
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@@ -328,7 +222,7 @@ extern int vx_ready_wait(vx_device_h hdevice, long long timeout) {
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uint64_t data = 0;
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struct timespec sleep_time;
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#ifdef USE_ASE
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#if defined(USE_ASE)
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sleep_time.tv_sec = 1;
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sleep_time.tv_nsec = 0;
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#else
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@@ -339,13 +233,106 @@ extern int vx_ready_wait(vx_device_h hdevice, long long timeout) {
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// to milliseconds
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long long sleep_time_ms = (sleep_time.tv_sec * 1000) + (sleep_time.tv_nsec / 1000000);
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do {
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CHECK_RES(fpgaReadMMIO64(device->fpga, 0, MMIO_READY_FOR_CMD, &data));
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nanosleep(&sleep_time, NULL);
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sleep_time_ms -= sleep_time_ms;
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if (timeout <= sleep_time_ms)
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break;
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} while (data != 0x1);
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for (;;) {
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CHECK_RES(fpgaReadMMIO64(device->fpga, 0, MMIO_CSR_STATUS, &data));
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if (0 == data || 0 == timeout)
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break;
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nanosleep(&sleep_time, nullptr);
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timeout -= sleep_time_ms;
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};
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return 0;
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}
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extern int vx_copy_to_dev(vx_buffer_h hbuffer, size_t dev_maddr, size_t size, size_t src_offset) {
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if (nullptr == hbuffer
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|| 0 >= size)
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return -1;
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vx_buffer_t* buffer = ((vx_buffer_t*)hbuffer);
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vx_device_t *device = ((vx_device_t*)buffer->hdevice);
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// bound checking
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if (size + src_offset > buffer->size)
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return -1;
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// Ensure ready for new command
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if (vx_ready_wait(buffer->hdevice, -1) != 0)
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return -1;
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CHECK_RES(fpgaWriteMMIO64(device->fpga, 0, MMIO_CSR_IO_ADDR, buffer->io_addr + src_offset));
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CHECK_RES(fpgaWriteMMIO64(device->fpga, 0, MMIO_CSR_MEM_ADDR, dev_maddr));
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CHECK_RES(fpgaWriteMMIO64(device->fpga, 0, MMIO_CSR_DATA_SIZE, size));
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CHECK_RES(fpgaWriteMMIO64(device->fpga, 0, MMIO_CSR_CMD, CMD_TYPE_WRITE));
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// Wait for the write operation to finish
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if (vx_ready_wait(buffer->hdevice, -1) != 0)
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return -1;
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return 0;
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}
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extern int vx_copy_from_dev(vx_buffer_h hbuffer, size_t dev_maddr, size_t size, size_t dest_offset) {
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if (nullptr == hbuffer
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|| 0 >= size)
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return -1;
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vx_buffer_t* buffer = ((vx_buffer_t*)hbuffer);
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vx_device_t *device = ((vx_device_t*)buffer->hdevice);
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// bound checking
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if (size + dest_offset > buffer->size)
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return -1;
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// Ensure ready for new command
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if (vx_ready_wait(buffer->hdevice, -1) != 0)
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return -1;
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CHECK_RES(fpgaWriteMMIO64(device->fpga, 0, MMIO_CSR_IO_ADDR, buffer->io_addr + dest_offset));
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CHECK_RES(fpgaWriteMMIO64(device->fpga, 0, MMIO_CSR_MEM_ADDR, dev_maddr));
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CHECK_RES(fpgaWriteMMIO64(device->fpga, 0, MMIO_CSR_DATA_SIZE, size));
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CHECK_RES(fpgaWriteMMIO64(device->fpga, 0, MMIO_CSR_CMD, CMD_TYPE_READ));
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// Wait for the write operation to finish
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if (vx_ready_wait(buffer->hdevice, -1) != 0)
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return -1;
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return 0;
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||||
}
|
||||
|
||||
extern int vx_flush_caches(vx_device_h hdevice, size_t dev_maddr, size_t size) {
|
||||
if (nullptr == hdevice
|
||||
|| 0 >= size)
|
||||
return -1;
|
||||
|
||||
vx_device_t* device = ((vx_device_t*)hdevice);
|
||||
|
||||
// Ensure ready for new command
|
||||
if (vx_ready_wait(hdevice, -1) != 0)
|
||||
return -1;
|
||||
|
||||
CHECK_RES(fpgaWriteMMIO64(device->fpga, 0, MMIO_CSR_MEM_ADDR, dev_maddr));
|
||||
CHECK_RES(fpgaWriteMMIO64(device->fpga, 0, MMIO_CSR_DATA_SIZE, size));
|
||||
CHECK_RES(fpgaWriteMMIO64(device->fpga, 0, MMIO_CSR_CMD, CMD_TYPE_SNOOP));
|
||||
|
||||
// Wait for the write operation to finish
|
||||
if (vx_ready_wait(hdevice, -1) != 0)
|
||||
return -1;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
extern int vx_start(vx_device_h hdevice) {
|
||||
if (nullptr == hdevice)
|
||||
return -1;
|
||||
|
||||
vx_device_t *device = ((vx_device_t*)hdevice);
|
||||
|
||||
// Ensure ready for new command
|
||||
if (vx_ready_wait(hdevice, -1) != 0)
|
||||
return -1;
|
||||
|
||||
CHECK_RES(fpgaWriteMMIO64(device->fpga, 0, MMIO_CSR_CMD, CMD_TYPE_RUN));
|
||||
|
||||
return 0;
|
||||
}
|
||||
@@ -11,17 +11,6 @@
|
||||
#include <ram.h>
|
||||
#include <simulator.h>
|
||||
|
||||
#define PAGE_SIZE 4096
|
||||
|
||||
#define CHECK_RES(_expr) \
|
||||
do { \
|
||||
fpga_result res = _expr; \
|
||||
if (res == FPGA_OK) \
|
||||
break; \
|
||||
printf("OPAE Error: '%s' returned %d!\n", #_expr, (int)res); \
|
||||
return -1; \
|
||||
} while (false)
|
||||
|
||||
///////////////////////////////////////////////////////////////////////////////
|
||||
|
||||
static size_t align_size(size_t size) {
|
||||
@@ -197,7 +186,7 @@ private:
|
||||
///////////////////////////////////////////////////////////////////////////////
|
||||
|
||||
extern int vx_dev_open(vx_device_h* hdevice) {
|
||||
if (NULL == hdevice)
|
||||
if (nullptr == hdevice)
|
||||
return -1;
|
||||
|
||||
*hdevice = new vx_device();
|
||||
@@ -217,8 +206,8 @@ extern int vx_dev_close(vx_device_h hdevice) {
|
||||
}
|
||||
|
||||
extern int vx_alloc_dev_mem(vx_device_h hdevice, size_t size, size_t* dev_maddr) {
|
||||
if (NULL == hdevice
|
||||
|| NULL == dev_maddr
|
||||
if (nullptr == hdevice
|
||||
|| nullptr == dev_maddr
|
||||
|| 0 >= size)
|
||||
return -1;
|
||||
|
||||
@@ -227,7 +216,7 @@ extern int vx_alloc_dev_mem(vx_device_h hdevice, size_t size, size_t* dev_maddr)
|
||||
}
|
||||
|
||||
extern int vx_flush_caches(vx_device_h hdevice, size_t dev_maddr, size_t size) {
|
||||
if (NULL == hdevice
|
||||
if (nullptr == hdevice
|
||||
|| 0 >= size)
|
||||
return -1;
|
||||
|
||||
@@ -240,7 +229,7 @@ extern int vx_flush_caches(vx_device_h hdevice, size_t dev_maddr, size_t size) {
|
||||
extern int vx_alloc_shared_mem(vx_device_h hdevice, size_t size, vx_buffer_h* hbuffer) {
|
||||
if (nullptr == hdevice
|
||||
|| 0 >= size
|
||||
|| NULL == hbuffer)
|
||||
|| nullptr == hbuffer)
|
||||
return -1;
|
||||
|
||||
vx_device *device = ((vx_device*)hdevice);
|
||||
|
||||
@@ -1,7 +1,7 @@
|
||||
CFLAGS += -std=c++11 -O3 -Wall -Wextra -pedantic -Wfatal-errors
|
||||
#CFLAGS += -std=c++11 -g -O0 -Wall -Wextra -pedantic -Wfatal-errors
|
||||
|
||||
CFLAGS += -I../../include -I../../../../simX/include -I../../../../runtime
|
||||
CFLAGS += -I../../include -I../../../../simX/include -I../../../../runtime
|
||||
|
||||
CFLAGS += -fPIC
|
||||
|
||||
|
||||
@@ -13,15 +13,6 @@
|
||||
|
||||
#define PAGE_SIZE 4096
|
||||
|
||||
#define CHECK_RES(_expr) \
|
||||
do { \
|
||||
fpga_result res = _expr; \
|
||||
if (res == FPGA_OK) \
|
||||
break; \
|
||||
printf("OPAE Error: '%s' returned %d!\n", #_expr, (int)res); \
|
||||
return -1; \
|
||||
} while (false)
|
||||
|
||||
///////////////////////////////////////////////////////////////////////////////
|
||||
|
||||
static size_t align_size(size_t size) {
|
||||
@@ -206,7 +197,7 @@ private:
|
||||
///////////////////////////////////////////////////////////////////////////////
|
||||
|
||||
extern int vx_dev_open(vx_device_h* hdevice) {
|
||||
if (NULL == hdevice)
|
||||
if (nullptr == hdevice)
|
||||
return -1;
|
||||
|
||||
*hdevice = new vx_device();
|
||||
@@ -226,8 +217,8 @@ extern int vx_dev_close(vx_device_h hdevice) {
|
||||
}
|
||||
|
||||
extern int vx_alloc_dev_mem(vx_device_h hdevice, size_t size, size_t* dev_maddr) {
|
||||
if (NULL == hdevice
|
||||
|| NULL == dev_maddr
|
||||
if (nullptr == hdevice
|
||||
|| nullptr == dev_maddr
|
||||
|| 0 >= size)
|
||||
return -1;
|
||||
|
||||
@@ -236,7 +227,7 @@ extern int vx_alloc_dev_mem(vx_device_h hdevice, size_t size, size_t* dev_maddr)
|
||||
}
|
||||
|
||||
extern int vx_flush_caches(vx_device_h hdevice, size_t /*dev_maddr*/, size_t size) {
|
||||
if (NULL == hdevice
|
||||
if (nullptr == hdevice
|
||||
|| 0 >= size)
|
||||
return -1;
|
||||
// this functionality is not need by simX
|
||||
@@ -246,7 +237,7 @@ extern int vx_flush_caches(vx_device_h hdevice, size_t /*dev_maddr*/, size_t siz
|
||||
extern int vx_alloc_shared_mem(vx_device_h hdevice, size_t size, vx_buffer_h* hbuffer) {
|
||||
if (nullptr == hdevice
|
||||
|| 0 >= size
|
||||
|| NULL == hbuffer)
|
||||
|| nullptr == hbuffer)
|
||||
return -1;
|
||||
|
||||
vx_device *device = ((vx_device*)hdevice);
|
||||
|
||||
Reference in New Issue
Block a user