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Fixed dram_fill_accept dependant on input address

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felsabbagh3
2020-04-02 20:26:37 -07:00
parent 8c1b72691f
commit 7d1cc5234e
1 changed files with 2 additions and 1 deletions
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rtl/VX_cache/VX_cache.v
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@@ -147,7 +147,8 @@ module VX_cache
assign snp_req_delay = (|per_bank_snrq_full); assign snp_req_delay = (|per_bank_snrq_full);
assign dram_fill_accept = (NUMBER_BANKS == 1) ? per_bank_dram_fill_accept[0] : per_bank_dram_fill_accept[dram_fill_rsp_addr[`BANK_SELECT_ADDR_RNG]]; // assign dram_fill_accept = (NUMBER_BANKS == 1) ? per_bank_dram_fill_accept[0] : per_bank_dram_fill_accept[dram_fill_rsp_addr[`BANK_SELECT_ADDR_RNG]];
assign dram_fill_accept = (|per_bank_dram_fill_accept);
VX_cache_dram_req_arb #( VX_cache_dram_req_arb #(
.CACHE_SIZE_BYTES (CACHE_SIZE_BYTES), .CACHE_SIZE_BYTES (CACHE_SIZE_BYTES),