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Packing data wires + ALU module

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This commit is contained in:
felsabbagh3
2019-03-26 19:17:11 -04:00
parent 6901208a54
commit 7a528c5ef2
34 changed files with 1274 additions and 1012 deletions
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17
rtl/obj_dir/verilated.d
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@@ -1,9 +1,8 @@
verilated.o: \
/usr/local/Cellar/verilator/4.010/share/verilator/include/verilated.cpp \
/usr/local/Cellar/verilator/4.010/share/verilator/include/verilatedos.h \
/usr/local/Cellar/verilator/4.010/share/verilator/include/verilated_imp.h \
/usr/local/Cellar/verilator/4.010/share/verilator/include/verilated.h \
/usr/local/Cellar/verilator/4.010/share/verilator/include/verilated_heavy.h \
/usr/local/Cellar/verilator/4.010/share/verilator/include/verilated_syms.h \
/usr/local/Cellar/verilator/4.010/share/verilator/include/verilated_sym_props.h \
/usr/local/Cellar/verilator/4.010/share/verilator/include/verilated_config.h
verilated.o: /usr/local/share/verilator/include/verilated.cpp \
/usr/local/share/verilator/include/verilatedos.h \
/usr/local/share/verilator/include/verilated_imp.h \
/usr/local/share/verilator/include/verilated.h \
/usr/local/share/verilator/include/verilated_heavy.h \
/usr/local/share/verilator/include/verilated_syms.h \
/usr/local/share/verilator/include/verilated_sym_props.h \
/usr/local/share/verilator/include/verilated_config.h