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tex_unit compiler fixes

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This commit is contained in:
Blaise Tine
2021-03-22 12:20:01 -04:00
parent 40e3e0105a
commit 79cbea0a13
5 changed files with 32 additions and 22 deletions
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4
hw/rtl/tex_unit/VX_tex_sampler.v
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@@ -33,7 +33,7 @@ module VX_tex_sampler #(
`UNUSED_PARAM (CORE_ID)
wire [31:0] req_data [`NUM_THREADS-1:0];
/*wire [31:0] req_data [`NUM_THREADS-1:0];
if (req_filter == 0) begin // point sampling
@@ -93,6 +93,6 @@ module VX_tex_sampler #(
.enable (~stall_out),
.data_in ({req_valid, req_wid, req_tmask, req_PC, req_rd, req_wb, req_data}),
.data_out ({rsp_valid, rsp_wid, rsp_tmask, rsp_PC, rsp_rd, rsp_wb, rsp_data})
);
);*/
endmodule

6
hw/rtl/tex_unit/VX_tex_unit.v
View File

@@ -91,7 +91,7 @@ module VX_tex_unit #(
VX_tex_addr #(
.REQ_INFO_WIDTH (REQ_INFO_WIDTH_A)
) tex_addr (
) _tex_addr (
.clk (clk),
.reset (reset),
@@ -174,9 +174,9 @@ module VX_tex_unit #(
assign {rsp_format, rsp_u, rsp_v, rsp_rd, rsp_wb} = mem_rsp_info;
VX_tex_sampler #(
VX_tex_sampler #(
.CORE_ID (CORE_ID)
) tex_sampler (
) tex_sampler (
.clk (clk),
.reset (reset),