minor update
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@@ -129,18 +129,23 @@ extern int vx_dump_perf(vx_device_h device, FILE* stream) {
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unsigned num_cores;
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ret = vx_dev_caps(device, VX_CAPS_MAX_CORES, &num_cores);
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if (ret)
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if (ret != 0)
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return ret;
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vx_buffer_h staging_buf;
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ret |= vx_alloc_shared_mem(device, 64 * sizeof(uint32_t), &staging_buf);
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if (ret)
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ret = vx_alloc_shared_mem(device, 64 * sizeof(uint32_t), &staging_buf);
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if (ret != 0)
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return ret;
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auto staging_ptr = (uint32_t*)vx_host_ptr(staging_buf);
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for (unsigned core_id = 0; core_id < num_cores; ++core_id) {
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ret |= vx_copy_from_dev(staging_buf, IO_ADDR_CSR + 64 * sizeof(uint32_t) * core_id, 64 * sizeof(uint32_t), 0);
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ret = vx_copy_from_dev(staging_buf, IO_ADDR_CSR + 64 * sizeof(uint32_t) * core_id, 64 * sizeof(uint32_t), 0);
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if (ret != 0) {
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vx_buf_release(staging_buf);
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return ret;
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}
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uint64_t instrs_per_core = get_csr_64(staging_ptr, CSR_MINSTRET);
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uint64_t cycles_per_core = get_csr_64(staging_ptr, CSR_MCYCLE);
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float IPC = (float)(double(instrs_per_core) / double(cycles_per_core));
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@@ -265,7 +270,7 @@ extern int vx_dump_perf(vx_device_h device, FILE* stream) {
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mem_stalls += mem_stalls_per_core;
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mem_lat += mem_lat_per_core;
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#endif
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}
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}
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float IPC = (float)(double(instrs) / double(cycles));
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fprintf(stream, "PERF: instrs=%ld, cycles=%ld, IPC=%f\n", instrs, cycles, IPC);
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@@ -305,5 +310,8 @@ extern int vx_dump_perf(vx_device_h device, FILE* stream) {
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fprintf(stream, "PERF: memory average latency=%d cycles\n", mem_avg_lat);
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#endif
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// release allocated resources
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vx_buf_release(staging_buf);
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return ret;
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}
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