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fixed cache msrq reset logic

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Blaise Tine
2020-05-20 18:11:31 -04:00
parent cefd0d85af
commit 72d54c749c
2 changed files with 5 additions and 7 deletions
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2
driver/rtlsim/Makefile
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@@ -15,7 +15,7 @@ DBG_PRINT = -DDBG_PRINT_CORE_ICACHE \
#MULTICORE += -DNUM_CLUSTERS=1 -DNUM_CORES=2
MULTICORE += -DNUM_CLUSTERS=1 -DNUM_CORES=2 -DL2_ENABLE=0
DEBUG = 1
#DEBUG = 1
CFLAGS += -fPIC