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pipeline refactoring - fmax >= 222 mhz

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This commit is contained in:
Blaise Tine
2020-08-14 21:50:14 -07:00
parent 71a46d04b9
commit 6c12391338
107 changed files with 1392 additions and 1239 deletions
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18
hw/rtl/libs/VX_cam_buffer.v
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@@ -32,19 +32,17 @@ module VX_cam_buffer #(
.valid_out (free_valid)
);
integer i;
always @(*) begin
free_slots_n = free_slots;
if (acquire_slot) begin
free_slots_n[write_addr_r] = 0;
end
for (i = 0; i < RPORTS; i++) begin
for (integer i = 0; i < RPORTS; i++) begin
if (release_slot[i]) begin
free_slots_n[read_addr[i]] = 1;
end
read_data[i] = entries[read_addr[i]];
end
end
if (acquire_slot) begin
free_slots_n[write_addr_r] = 0;
end
end
always @(posedge clk) begin
@@ -54,12 +52,12 @@ module VX_cam_buffer #(
write_addr_r <= ADDRW'(1'b0);
end else begin
if (acquire_slot) begin
assert(1 == free_slots[write_addr]);
assert(1 == free_slots[write_addr]) else $display("%t: inused slot at port %d", $time, write_addr);
entries[write_addr] <= write_data;
end
for (i = 0; i < RPORTS; i++) begin
for (integer i = 0; i < RPORTS; i++) begin
if (release_slot[i]) begin
assert(0 == free_slots[read_addr[i]]);
assert(0 == free_slots[read_addr[i]]) else $display("%t: freed slot at port %d", $time, read_addr[i]);
end
end
free_slots <= free_slots_n;