pipeline refactoring - fmax >= 222 mhz
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@@ -10,7 +10,6 @@ interface VX_fpu_to_cmt_if ();
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wire [`NUM_THREADS-1:0][31:0] data;
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wire has_fflags;
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fflags_t [`NUM_THREADS-1:0] fflags;
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wire ready;
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endinterface
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