pipeline refactoring - fmax >= 222 mhz

2020-08-14 21:50:14 -07:00
parent 71a46d04b9
commit 6c12391338
107 changed files with 1392 additions and 1239 deletions
--- a/hw/rtl/interfaces/VX_csr_to_fpu_if.v
+++ b/hw/rtl/interfaces/VX_csr_to_fpu_if.v
@@ -9,7 +9,7 @@

 interface VX_csr_to_fpu_if ();

-	wire [`NW_BITS-1:0]  warp_num;
+	wire [`NW_BITS-1:0]  wid;
 	wire [`FRM_BITS-1:0] frm;

 endinterface