pipeline refactoring - fmax >= 222 mhz
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@@ -6,7 +6,7 @@
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interface VX_branch_ctl_if ();
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wire valid;
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wire [`NW_BITS-1:0] warp_num;
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wire [`NW_BITS-1:0] wid;
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wire taken;
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wire [31:0] dest;
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