From 4a5f4fe64ee99ace586904b96133998fc2acca5a Mon Sep 17 00:00:00 2001 From: Malik Aki Burton Date: Sun, 21 Feb 2021 12:23:32 -0500 Subject: [PATCH 1/2] Created Flubber FPGA Startup .md file --- Flubber_FPGA_Startup_Guide.md | 52 +++++++++++++++++++++++++++++++++++ 1 file changed, 52 insertions(+) create mode 100644 Flubber_FPGA_Startup_Guide.md diff --git a/Flubber_FPGA_Startup_Guide.md b/Flubber_FPGA_Startup_Guide.md new file mode 100644 index 00000000..97607608 --- /dev/null +++ b/Flubber_FPGA_Startup_Guide.md @@ -0,0 +1,52 @@ +# Flubber FPGA Startup and Configuration Guide + +Flubber OPAE setup +------------------ + + $ source /opt/inteldevstack/init_env_user.sh + $ export OPAE_HOME=/opt/opae/1.1.2 + $ export PATH=$OPAE_HOME/bin:$PATH + $ export C_INCLUDE_PATH=$OPAE_HOME/include:$C_INCLUDE_PATH + $ export LIBRARY_PATH=$OPAE_HOME/lib:$LIBRARY_PATH + $ export LD_LIBRARY_PATH=$OPAE_HOME/lib:$LD_LIBRARY_PATH + $ export RISCV_TOOLCHAIN_PATH=/opt/riscv-gnu-toolchain + $ export PATH=:/opt/verilator/bin:$PATH + $ export VERILATOR_ROOT=/opt/verilator + + +Flubber OPAE build +------------------ + +The Flubber FPGA has to following configuration options: +- 1 core fpga (fpga-1c) +- 2 cores fpga (fpga-2c) +- 4 cores fpga (fpga-4c) +- 8 cores fpga (fpga-8c) +- 16 cores fpga (fpga-16c) + $ cd hw/syn/opae + $ make fpga-`# of cores`c + +A new folder *build_fpga_`# of cores`c* will be created and the build will start and the build will take ~30-45 min to complete. +You could check last 10 lines in build log for possible errors or build completion. + $ tail -n 10 ./build_fpga_`# of cores`c/build.log +Check if the build is still running by looking for quartus_sh, quartus_syn, or quartus_fit programs. + $ ps -u `username` +If the build fails and you need to restart it, clean up the build folder using the following command: + $ make clean-fpga-`# of cores`c +The following file should exist when the build is done: + $ ls -lsa ./build_fpga_`# of cores`c/vortex_afu.gbs + +Signing the bitstream +--------------------- + $ cd ./build_fpga_`# of cores`c/ + $ PACSign PR -t UPDATE -H openssl_manager -i vortex_afu.gbs -o vortex_afu_unsigned_ssl.gbs + + +Programming the FPGA +-------------------- + $ fpgasupdate vortex_afu_unsigned_ssl.gbs + +FPGA sample test running OpenCL sgemm kernel +-------------------------------------------- +Run the following from the Vortex root directory + $ ./ci/blackbox.sh --driver=fpga --app=sgemm --args="-n64" \ No newline at end of file From 89e8629542aea360ab4c8521cb5ad45c8a20a8d7 Mon Sep 17 00:00:00 2001 From: Malik Aki Burton Date: Tue, 23 Feb 2021 10:09:31 -0500 Subject: [PATCH 2/2] Added Build Progress and Build Script Config sections to the Flubber FPGA Startup guide --- Flubber_FPGA_Startup_Guide.md | 36 +++++++++++++++++++++++++---------- 1 file changed, 26 insertions(+), 10 deletions(-) diff --git a/Flubber_FPGA_Startup_Guide.md b/Flubber_FPGA_Startup_Guide.md index 97607608..cc908010 100644 --- a/Flubber_FPGA_Startup_Guide.md +++ b/Flubber_FPGA_Startup_Guide.md @@ -25,28 +25,44 @@ The Flubber FPGA has to following configuration options: - 16 cores fpga (fpga-16c) $ cd hw/syn/opae $ make fpga-`# of cores`c +Example: `make fpga-4c` -A new folder *build_fpga_`# of cores`c* will be created and the build will start and the build will take ~30-45 min to complete. -You could check last 10 lines in build log for possible errors or build completion. +A new folder *build_fpga_`# of cores`c* will be created and the build will start and take ~30-45 min to complete. + +Flubber Config Build Progress +----------------------------- + +You could check the last 10 lines in the build log for possible errors until build completion. $ tail -n 10 ./build_fpga_`# of cores`c/build.log +Example: `tail -n 10 ./build_fpga_4c/build.log` + Check if the build is still running by looking for quartus_sh, quartus_syn, or quartus_fit programs. $ ps -u `username` + If the build fails and you need to restart it, clean up the build folder using the following command: $ make clean-fpga-`# of cores`c -The following file should exist when the build is done: +Example: `make clean-fpga-4c` + +The file `vortex_afu.gbs` should exist when the build is done: $ ls -lsa ./build_fpga_`# of cores`c/vortex_afu.gbs -Signing the bitstream ---------------------- +Signing the bitstream and Programming the FPGA +---------------------------------------------- + $ cd ./build_fpga_`# of cores`c/ $ PACSign PR -t UPDATE -H openssl_manager -i vortex_afu.gbs -o vortex_afu_unsigned_ssl.gbs - - -Programming the FPGA --------------------- $ fpgasupdate vortex_afu_unsigned_ssl.gbs FPGA sample test running OpenCL sgemm kernel -------------------------------------------- + Run the following from the Vortex root directory - $ ./ci/blackbox.sh --driver=fpga --app=sgemm --args="-n64" \ No newline at end of file + $ ./ci/blackbox.sh --driver=fpga --app=sgemm --args="-n64" + +Build Script Configuration +-------------------------- + +Inside the ci folder there is a script called `blackbox.sh` which runs different tests on the Vortex processor with different configurations. Run: + $ ./ci/blackbox.sh --help +To see the different configuration options available. +The most important ones are `--driver`, which runs the Vortex test on either the fpga, rtlsim, vlsim, or simx simulators, and `--perf`, which enables the profiling counters for each core. \ No newline at end of file