From 656475b3b340acd029ef45f7b3b5c6887a92467f Mon Sep 17 00:00:00 2001 From: felsabbagh3 Date: Thu, 21 Mar 2019 23:47:48 -0400 Subject: [PATCH] Passing Most tests --- rtl/Makefile | 2 +- rtl/VX_csr_handler.v | 73 + rtl/VX_d_e_reg.v | 160 ++ rtl/VX_decode.v | 70 +- rtl/VX_define.h | 102 + rtl/VX_define.v | 97 + rtl/VX_e_m_reg.v | 146 ++ rtl/VX_execute.v | 185 ++ rtl/VX_f_d_reg.v | 6 +- rtl/VX_forwarding.v | 155 ++ rtl/VX_m_w_reg.v | 78 + rtl/VX_memory.v | 77 + rtl/VX_writeback.v | 33 + rtl/obj_dir/VVX_decode.cpp | 975 ---------- rtl/obj_dir/VVX_decode.h | 118 -- rtl/obj_dir/VVX_decode.mk | 53 - rtl/obj_dir/VVX_decode__Syms.cpp | 19 - rtl/obj_dir/VVX_decode__Syms.h | 34 - rtl/obj_dir/VVX_decode__ver.d | 1 - rtl/obj_dir/VVX_decode__verFiles.dat | 13 - rtl/obj_dir/VVX_decode_classes.mk | 38 - rtl/obj_dir/VVX_register_file.cpp | 200 -- rtl/obj_dir/VVX_register_file.h | 88 - rtl/obj_dir/VVX_register_file.mk | 53 - rtl/obj_dir/VVX_register_file__Syms.cpp | 19 - rtl/obj_dir/VVX_register_file__Syms.h | 34 - rtl/obj_dir/VVX_register_file__ver.d | 1 - rtl/obj_dir/VVX_register_file__verFiles.dat | 12 - rtl/obj_dir/VVX_register_file_classes.mk | 38 - rtl/obj_dir/Vvortex | Bin 277588 -> 351976 bytes rtl/obj_dir/Vvortex.cpp | 1838 +++++++++++++++++-- rtl/obj_dir/Vvortex.h | 149 +- rtl/obj_dir/Vvortex.mk | 12 +- rtl/obj_dir/Vvortex__ALL.a | Bin 11608 -> 31104 bytes rtl/obj_dir/Vvortex__ALLcls.cpp | 2 +- rtl/obj_dir/Vvortex__ALLcls.d | 5 +- rtl/obj_dir/Vvortex__ALLsup.cpp | 2 +- rtl/obj_dir/Vvortex__ALLsup.d | 5 +- rtl/obj_dir/Vvortex__Syms.cpp | 6 +- rtl/obj_dir/Vvortex__Syms.h | 16 +- rtl/obj_dir/Vvortex__ver.d | 2 +- rtl/obj_dir/Vvortex__verFiles.dat | 33 +- rtl/obj_dir/Vvortex_classes.mk | 6 +- rtl/obj_dir/test_bench.d | 4 +- rtl/ram.h | 235 +++ rtl/results.txt | 351 ++++ rtl/test_bench.cpp | 81 +- rtl/test_bench.h | 314 ++++ rtl/vortex.v | 559 +++++- 49 files changed, 4425 insertions(+), 2075 deletions(-) create mode 100644 rtl/VX_csr_handler.v create mode 100644 rtl/VX_d_e_reg.v create mode 100644 rtl/VX_define.h create mode 100644 rtl/VX_define.v create mode 100644 rtl/VX_e_m_reg.v create mode 100644 rtl/VX_execute.v create mode 100644 rtl/VX_forwarding.v create mode 100644 rtl/VX_m_w_reg.v create mode 100644 rtl/VX_memory.v create mode 100644 rtl/VX_writeback.v delete mode 100644 rtl/obj_dir/VVX_decode.cpp delete mode 100644 rtl/obj_dir/VVX_decode.h delete mode 100644 rtl/obj_dir/VVX_decode.mk delete mode 100644 rtl/obj_dir/VVX_decode__Syms.cpp delete mode 100644 rtl/obj_dir/VVX_decode__Syms.h delete mode 100644 rtl/obj_dir/VVX_decode__ver.d delete mode 100644 rtl/obj_dir/VVX_decode__verFiles.dat delete mode 100644 rtl/obj_dir/VVX_decode_classes.mk delete mode 100644 rtl/obj_dir/VVX_register_file.cpp delete mode 100644 rtl/obj_dir/VVX_register_file.h delete mode 100644 rtl/obj_dir/VVX_register_file.mk delete mode 100644 rtl/obj_dir/VVX_register_file__Syms.cpp delete mode 100644 rtl/obj_dir/VVX_register_file__Syms.h delete mode 100644 rtl/obj_dir/VVX_register_file__ver.d delete mode 100644 rtl/obj_dir/VVX_register_file__verFiles.dat delete mode 100644 rtl/obj_dir/VVX_register_file_classes.mk create mode 100644 rtl/ram.h create mode 100644 rtl/results.txt create mode 100644 rtl/test_bench.h diff --git a/rtl/Makefile b/rtl/Makefile index aa0ca37e..96ba4c26 100644 --- a/rtl/Makefile +++ b/rtl/Makefile @@ -5,7 +5,7 @@ all: RUNFILE VERILATOR: - verilator -Wall -cc vortex.v VX_f_d_reg.v VX_fetch.v --exe test_bench.cpp + verilator -Wall -cc Vortex.v VX_fetch.v VX_f_d_reg.v VX_decode.v VX_register_file.v VX_d_e_reg.v VX_execute.v VX_e_m_reg.v VX_memory.v VX_m_w_reg.v VX_writeback.v VX_csr_handler.v VX_forwarding.v --exe test_bench.cpp RUNFILE: VERILATOR (cd obj_dir && make -j -f Vvortex.mk) diff --git a/rtl/VX_csr_handler.v b/rtl/VX_csr_handler.v new file mode 100644 index 00000000..5eab6184 --- /dev/null +++ b/rtl/VX_csr_handler.v @@ -0,0 +1,73 @@ + + +module VX_csr_handler ( + input wire clk, + input wire[11:0] in_decode_csr_address, // done + input wire[11:0] in_mem_csr_address, + input wire in_mem_is_csr, + /* verilator lint_off UNUSED */ + input wire[31:0] in_mem_csr_result, + /* verilator lint_on UNUSED */ + input wire in_wb_valid, + output wire[31:0] out_decode_csr_data // done + ); + + + reg[11:0] csr[4095:0]; + reg[63:0] cycle; + reg[63:0] instret; + reg[11:0] decode_csr_address; + + + wire read_cycle; + wire read_cycleh; + wire read_instret; + wire read_instreth; + + initial begin + cycle = 0; + instret = 0; + decode_csr_address = 0; + end + + + always @(posedge clk) begin + cycle <= cycle + 1; + decode_csr_address <= in_decode_csr_address; + if (in_wb_valid) begin + instret <= instret + 1; + end + end + + + always @(posedge clk) begin + if(in_mem_is_csr) begin + csr[in_mem_csr_address] <= in_mem_csr_result[11:0]; + end + end + + + assign read_cycle = decode_csr_address == 12'hC00; + assign read_cycleh = decode_csr_address == 12'hC80; + assign read_instret = decode_csr_address == 12'hC02; + assign read_instreth = decode_csr_address == 12'hC82; + + + assign out_decode_csr_data = read_cycle ? cycle[31:0] : + read_cycleh ? cycle[63:32] : + read_instret ? instret[31:0] : + read_instreth ? instret[63:32] : + {{20{1'b0}}, csr[decode_csr_address]}; + + + + + +endmodule // VX_csr_handler + + + + + + + diff --git a/rtl/VX_d_e_reg.v b/rtl/VX_d_e_reg.v new file mode 100644 index 00000000..288ade1d --- /dev/null +++ b/rtl/VX_d_e_reg.v @@ -0,0 +1,160 @@ + + +`include "VX_define.v" + +module VX_d_e_reg ( + input wire clk, + input wire[4:0] in_rd, + input wire[4:0] in_rs1, + input wire[31:0] in_rd1, + input wire[4:0] in_rs2, + input wire[31:0] in_rd2, + input wire[3:0] in_alu_op, + input wire[1:0] in_wb, + input wire in_rs2_src, // NEW + input wire[31:0] in_itype_immed, // new + input wire[2:0] in_mem_read, // NEW + input wire[2:0] in_mem_write, + input wire[31:0] in_PC_next, + input wire[2:0] in_branch_type, + input wire in_fwd_stall, + input wire in_branch_stall, + input wire[19:0] in_upper_immed, + input wire[11:0] in_csr_address, // done + input wire in_is_csr, // done + input wire[31:0] in_csr_mask, // done + input wire[31:0] in_curr_PC, + input wire in_jal, + input wire[31:0] in_jal_offset, + input wire in_freeze, + input wire in_valid, + + output wire[11:0] out_csr_address, // done + output wire out_is_csr, // done + output wire[31:0] out_csr_mask, // done + output wire[4:0] out_rd, + output wire[4:0] out_rs1, + output wire[31:0] out_rd1, + output wire[4:0] out_rs2, + output wire[31:0] out_rd2, + output wire[3:0] out_alu_op, + output wire[1:0] out_wb, + output wire out_rs2_src, // NEW + output wire[31:0] out_itype_immed, // new + output wire[2:0] out_mem_read, + output wire[2:0] out_mem_write, + output wire[2:0] out_branch_type, + output wire[19:0] out_upper_immed, + output wire[31:0] out_curr_PC, + output wire out_jal, + output wire[31:0] out_jal_offset, + output wire[31:0] out_PC_next, + output wire out_valid + ); + + + reg[4:0] rd; + reg[4:0] rs1; + reg[31:0] rd1; + reg[4:0] rs2; + reg[31:0] rd2; + reg[3:0] alu_op; + reg[1:0] wb; + reg[31:0] PC_next_out; + reg rs2_src; + reg[31:0] itype_immed; + reg[2:0] mem_read; + reg[2:0] mem_write; + reg[2:0] branch_type; + reg[19:0] upper_immed; + reg[11:0] csr_address; + reg is_csr; + reg[31:0] csr_mask; + reg[31:0] curr_PC; + reg jal; + reg[31:0] jal_offset; + reg valid; + + + initial begin + rd = 0; + rs1 = 0; + rd1 = 0; + rs2 = 0; + rd2 = 0; + alu_op = 0; + wb = `NO_WB; + PC_next_out = 0; + rs2_src = 0; + itype_immed = 0; + mem_read = `NO_MEM_READ; + mem_write = `NO_MEM_WRITE; + branch_type = `NO_BRANCH; + upper_immed = 0; + csr_address = 0; + is_csr = 0; + csr_mask = 0; + curr_PC = 0; + jal = `NO_JUMP; + jal_offset = 0; + valid = 0; + end + + wire stalling; + + assign stalling = (in_fwd_stall == `STALL) || (in_branch_stall == `STALL); + + assign out_rd = rd; + assign out_rs1 = rs1; + assign out_rd1 = rd1; + assign out_rs2 = rs2; + assign out_rd2 = rd2; + assign out_alu_op = alu_op; + assign out_wb = wb; + assign out_PC_next = PC_next_out; + assign out_rs2_src = rs2_src; + assign out_itype_immed = itype_immed; + assign out_mem_read = mem_read; + assign out_mem_write = mem_write; + assign out_branch_type = branch_type; + assign out_upper_immed = upper_immed; + assign out_csr_address = csr_address; + assign out_is_csr = is_csr; + assign out_csr_mask = csr_mask; + assign out_jal = jal; + assign out_jal_offset = jal_offset; + assign out_curr_PC = curr_PC; + assign out_valid = valid; + + + always @(posedge clk) begin + if (in_freeze == 1'h0) begin + rd <= stalling ? 5'h0 : in_rd; + rs1 <= stalling ? 5'h0 : in_rs1; + rd1 <= stalling ? 32'h0 : in_rd1; + rs2 <= stalling ? 5'h0 : in_rs2; + rd2 <= stalling ? 32'h0 : in_rd2; + alu_op <= stalling ? `NO_ALU : in_alu_op; + wb <= stalling ? `NO_WB : in_wb; + PC_next_out <= stalling ? 32'h0 : in_PC_next; + rs2_src <= stalling ? `RS2_REG : in_rs2_src; + itype_immed <= stalling ? 32'hdeadbeef : in_itype_immed; + mem_read <= stalling ? `NO_MEM_READ : in_mem_read; + mem_write <= stalling ? `NO_MEM_WRITE: in_mem_write; + branch_type <= stalling ? `NO_BRANCH : in_branch_type; + upper_immed <= stalling ? 20'h0 : in_upper_immed; + csr_address <= stalling ? 12'h0 : in_csr_address; + is_csr <= stalling ? 1'h0 : in_is_csr; + csr_mask <= stalling ? 32'h0 : in_csr_mask; + jal <= stalling ? `NO_JUMP : in_jal; + jal_offset <= stalling ? 32'h0 : in_jal_offset; + curr_PC <= stalling ? 32'h0 : in_curr_PC; + valid <= stalling ? 1'b0 : in_valid; + end + end + +endmodule + + + + diff --git a/rtl/VX_decode.v b/rtl/VX_decode.v index afdeeda8..068a40bb 100644 --- a/rtl/VX_decode.v +++ b/rtl/VX_decode.v @@ -1,73 +1,12 @@ - -`define R_INST 7'd51 -`define L_INST 7'd3 -`define ALU_INST 7'd19 -`define S_INST 7'd35 -`define B_INST 7'd99 -`define LUI_INST 7'd55 -`define AUIPC_INST 7'd23 -`define JAL_INST 7'd111 -`define JALR_INST 7'd103 -`define SYS_INST 7'd115 - - -`define WB_ALU 2'h1 -`define WB_MEM 2'h2 -`define WB_JAL 2'h3 -`define NO_WB 2'h0 - - -`define RS2_IMMED 1 -`define RS2_REG 0 - - -`define NO_MEM_READ 3'h7 -`define LB_MEM_READ 3'h0 -`define LH_MEM_READ 3'h1 -`define LW_MEM_READ 3'h2 -`define LBU_MEM_READ 3'h4 -`define LHU_MEM_READ 3'h5 - - -`define NO_MEM_WRITE 3'h7 -`define SB_MEM_WRITE 3'h0 -`define SH_MEM_WRITE 3'h1 -`define SW_MEM_WRITE 3'h2 - - -`define NO_BRANCH 3'h0 -`define BEQ 3'h1 -`define BNE 3'h2 -`define BLT 3'h3 -`define BGT 3'h4 -`define BLTU 3'h5 -`define BGTU 3'h6 - - -`define NO_ALU 4'd15 -`define ADD 4'd0 -`define SUB 4'd1 -`define SLLA 4'd2 -`define SLT 4'd3 -`define SLTU 4'd4 -`define XOR 4'd5 -`define SRL 4'd6 -`define SRA 4'd7 -`define OR 4'd8 -`define AND 4'd9 -`define SUBU 4'd10 -`define LUI_ALU 4'd11 -`define AUIPC_ALU 4'd12 -`define CSR_ALU_RW 4'd13 -`define CSR_ALU_RS 4'd14 -`define CSR_ALU_RC 4'd15 +`include "VX_define.v" module VX_decode( // Fetch Inputs input wire clk, input wire[31:0] in_instruction, input wire[31:0] in_curr_PC, + input wire in_valid, // WriteBack inputs input wire[31:0] in_write_data, input wire[4:0] in_rd, @@ -100,7 +39,8 @@ module VX_decode( output reg out_jal, output reg[31:0] out_jal_offset, output reg[19:0] out_upper_immed, - output wire[31:0] out_PC_next + output wire[31:0] out_PC_next, + output wire out_valid ); wire[6:0] curr_opcode; @@ -167,6 +107,8 @@ module VX_decode( .out_src2_data(rd2_register) ); + assign out_valid = in_valid; + assign write_register = (in_wb != 2'h0) ? (1'b1) : (1'b0); assign curr_opcode = in_instruction[6:0]; diff --git a/rtl/VX_define.h b/rtl/VX_define.h new file mode 100644 index 00000000..c201bfa8 --- /dev/null +++ b/rtl/VX_define.h @@ -0,0 +1,102 @@ + + + +#define R_INST 51 +#define L_INST 3 +#define ALU_INST 19 +#define S_INST 35 +#define B_INST 99 +#define LUI_INST 55 +#define AUIPC_INST 23 +#define JAL_INST 111 +#define JALR_INST 103 +#define SYS_INST 115 + + +#define WB_ALU 1 +#define WB_MEM 2 +#define WB_JAL 3 +#define NO_WB 0 + + +#define RS2_IMMED 1 +#define RS2_REG 0 + + +#define NO_MEM_READ 7 +#define LB_MEM_READ 0 +#define LH_MEM_READ 1 +#define LW_MEM_READ 2 +#define LBU_MEM_READ 4 +#define LHU_MEM_READ 5 + + +#define NO_MEM_WRITE 7 +#define SB_MEM_WRITE 0 +#define SH_MEM_WRITE 1 +#define SW_MEM_WRITE 2 + + +#define NO_BRANCH 0 +#define BEQ 1 +#define BNE 2 +#define BLT 3 +#define BGT 4 +#define BLTU 5 +#define BGTU 6 + + +#define NO_ALU 15 +#define ADD 0 +#define SUB 1 +#define SLLA 2 +#define SLT 3 +#define SLTU 4 +#define XOR 5 +#define SRL 6 +#define SRA 7 +#define OR 8 +#define AND 9 +#define SUBU 10 +#define LUI_ALU 11 +#define AUIPC_ALU 12 +#define CSR_ALU_RW 13 +#define CSR_ALU_RS 14 +#define CSR_ALU_RC 15 + + + +// WRITEBACK +#define WB_ALU 1 +#define WB_MEM 2 +#define WB_JAL 3 +#define NO_WB 0 + + +// JAL +#define JUMP 1 +#define NO_JUMP 0 + +// STALLS +#define STALL 1 +#define NO_STALL 0 + + +#define TAKEN 1 +#define NOT_TAKEN 0 + + +#define ZERO_REG 0 + + +// COLORS +#define GREEN "\033[32m" +#define RED "\033[31m" +#define DEFAULT "\033[39m" + + + + + + + diff --git a/rtl/VX_define.v b/rtl/VX_define.v new file mode 100644 index 00000000..d0e20785 --- /dev/null +++ b/rtl/VX_define.v @@ -0,0 +1,97 @@ + + + +`define R_INST 7'd51 +`define L_INST 7'd3 +`define ALU_INST 7'd19 +`define S_INST 7'd35 +`define B_INST 7'd99 +`define LUI_INST 7'd55 +`define AUIPC_INST 7'd23 +`define JAL_INST 7'd111 +`define JALR_INST 7'd103 +`define SYS_INST 7'd115 + + +`define WB_ALU 2'h1 +`define WB_MEM 2'h2 +`define WB_JAL 2'h3 +`define NO_WB 2'h0 + + +`define RS2_IMMED 1 +`define RS2_REG 0 + + +`define NO_MEM_READ 3'h7 +`define LB_MEM_READ 3'h0 +`define LH_MEM_READ 3'h1 +`define LW_MEM_READ 3'h2 +`define LBU_MEM_READ 3'h4 +`define LHU_MEM_READ 3'h5 + + +`define NO_MEM_WRITE 3'h7 +`define SB_MEM_WRITE 3'h0 +`define SH_MEM_WRITE 3'h1 +`define SW_MEM_WRITE 3'h2 + + +`define NO_BRANCH 3'h0 +`define BEQ 3'h1 +`define BNE 3'h2 +`define BLT 3'h3 +`define BGT 3'h4 +`define BLTU 3'h5 +`define BGTU 3'h6 + + +`define NO_ALU 4'd15 +`define ADD 4'd0 +`define SUB 4'd1 +`define SLLA 4'd2 +`define SLT 4'd3 +`define SLTU 4'd4 +`define XOR 4'd5 +`define SRL 4'd6 +`define SRA 4'd7 +`define OR 4'd8 +`define AND 4'd9 +`define SUBU 4'd10 +`define LUI_ALU 4'd11 +`define AUIPC_ALU 4'd12 +`define CSR_ALU_RW 4'd13 +`define CSR_ALU_RS 4'd14 +`define CSR_ALU_RC 4'd15 + + + +// WRITEBACK +`define WB_ALU 2'h1 +`define WB_MEM 2'h2 +`define WB_JAL 2'h3 +`define NO_WB 2'h0 + + +// JAL +`define JUMP 1'h1 +`define NO_JUMP 1'h0 + +// STALLS +`define STALL 1'h1 +`define NO_STALL 1'h0 + + +`define TAKEN 1'b1 +`define NOT_TAKEN 1'b0 + + +`define ZERO_REG 5'h0 + + + + + + + + diff --git a/rtl/VX_e_m_reg.v b/rtl/VX_e_m_reg.v new file mode 100644 index 00000000..ec7317ab --- /dev/null +++ b/rtl/VX_e_m_reg.v @@ -0,0 +1,146 @@ + + +`include "VX_define.v" + + +module VX_e_m_reg ( + input wire clk, + input wire[31:0] in_alu_result, + input wire[4:0] in_rd, + input wire[1:0] in_wb, + input wire[4:0] in_rs1, + input wire[31:0] in_rd1, + input wire[4:0] in_rs2, + input wire[31:0] in_rd2, + input wire[2:0] in_mem_read, // NEW + input wire[2:0] in_mem_write, // NEW + input wire[31:0] in_PC_next, + input wire[11:0] in_csr_address, + input wire in_is_csr, + input wire[31:0] in_csr_result, + input wire[31:0] in_curr_PC, + input wire[31:0] in_branch_offset, + input wire[2:0] in_branch_type, + input wire in_jal, + input wire[31:0] in_jal_dest, + input wire in_freeze, + input wire in_valid, + + output wire[11:0] out_csr_address, + output wire out_is_csr, + output wire[31:0] out_csr_result, + output wire[31:0] out_alu_result, + output wire[4:0] out_rd, + output wire[1:0] out_wb, + output wire[4:0] out_rs1, + output wire[31:0] out_rd1, + output wire[31:0] out_rd2, + output wire[4:0] out_rs2, + output wire[2:0] out_mem_read, + output wire[2:0] out_mem_write, + output wire[31:0] out_curr_PC, + output wire[31:0] out_branch_offset, + output wire[2:0] out_branch_type, + output wire out_jal, + output wire[31:0] out_jal_dest, + output wire[31:0] out_PC_next, + output wire out_valid + ); + + + reg[31:0] alu_result; + reg[4:0] rd; + reg[4:0] rs1; + reg[31:0] rd1; + reg[4:0] rs2; + reg[31:0] rd2; + reg[1:0] wb; + reg[31:0] PC_next; + reg[2:0] mem_read; + reg[2:0] mem_write; + reg[11:0] csr_address; + reg is_csr; + reg[31:0] csr_result; + reg[31:0] curr_PC; + reg[31:0] branch_offset; + reg[2:0] branch_type; + reg jal; + reg[31:0] jal_dest; + reg valid; + + + initial begin + alu_result = 0; + rd = 0; + rs1 = 0; + rd1 = 0; + rs2 = 0; + rd2 = 0; + wb = 0; + PC_next = 0; + mem_read = `NO_MEM_READ; + mem_write = `NO_MEM_WRITE; + csr_address = 0; + is_csr = 0; + csr_result = 0; + curr_PC = 0; + branch_offset = 0; + branch_type = 0; + jal = `NO_JUMP; + jal_dest = 0; + valid = 0; + end + + + + assign out_alu_result = alu_result; + assign out_rd = rd; + assign out_rs1 = rs1; + assign out_rs2 = rs2; + assign out_wb = wb; + assign out_PC_next = PC_next; + assign out_mem_read = mem_read; + assign out_mem_write = mem_write; + assign out_rd1 = rd1; + assign out_rd2 = rd2; + assign out_csr_address = csr_address; + assign out_is_csr = is_csr; + assign out_csr_result = csr_result; + assign out_curr_PC = curr_PC; + assign out_branch_offset = branch_offset; + assign out_branch_type = branch_type; + assign out_jal = jal; + assign out_jal_dest = jal_dest; + assign out_valid = valid; + + + always @(posedge clk) begin + if(in_freeze == 1'b0) begin + alu_result <= in_alu_result; + rd <= in_rd; + rs1 <= in_rs1; + rs2 <= in_rs2; + wb <= in_wb; + PC_next <= in_PC_next; + mem_read <= in_mem_read; + mem_write <= in_mem_write; + rd1 <= in_rd1; + rd2 <= in_rd2; + csr_address <= in_csr_address; + is_csr <= in_is_csr; + csr_result <= in_csr_result; + curr_PC <= in_curr_PC; + branch_offset <= in_branch_offset; + branch_type <= in_branch_type; + jal <= in_jal; + jal_dest <= in_jal_dest; + valid <= in_valid; + end + end + +endmodule // VX_e_m_reg + + + + + diff --git a/rtl/VX_execute.v b/rtl/VX_execute.v new file mode 100644 index 00000000..79fd6184 --- /dev/null +++ b/rtl/VX_execute.v @@ -0,0 +1,185 @@ + +`include "VX_define.v" + +module VX_execute ( + input wire[4:0] in_rd, + input wire[4:0] in_rs1, + input wire[31:0] in_rd1, + input wire[4:0] in_rs2, + input wire[31:0] in_rd2, + input wire[3:0] in_alu_op, + input wire[1:0] in_wb, + input wire in_rs2_src, // NEW + input wire[31:0] in_itype_immed, // new + input wire[2:0] in_mem_read, // NEW + input wire[2:0] in_mem_write, // NEW + input wire[31:0] in_PC_next, + input wire[2:0] in_branch_type, + input wire[19:0] in_upper_immed, + input wire[11:0] in_csr_address, // done + input wire in_is_csr, // done + input wire[31:0] in_csr_data, // done + input wire[31:0] in_csr_mask, // done + input wire in_jal, + input wire[31:0] in_jal_offset, + input wire[31:0] in_curr_PC, + input wire in_valid, + + output wire[11:0] out_csr_address, + output wire out_is_csr, + output reg[31:0] out_csr_result, + output reg[31:0] out_alu_result, + output wire[4:0] out_rd, + output wire[1:0] out_wb, + output wire[4:0] out_rs1, + output wire[31:0] out_rd1, + output wire[4:0] out_rs2, + output wire[31:0] out_rd2, + output wire[2:0] out_mem_read, + output wire[2:0] out_mem_write, + output wire out_jal, + output wire[31:0] out_jal_dest, + output wire[31:0] out_branch_offset, + output wire out_branch_stall, + output wire[31:0] out_PC_next, + output wire out_valid + ); + + + + wire which_in2; + + wire[31:0] ALU_in1; + wire[31:0] ALU_in2; + wire[31:0] upper_immed; + + + assign which_in2 = in_rs2_src == `RS2_IMMED; + + assign ALU_in1 = in_rd1; + + assign ALU_in2 = which_in2 ? in_itype_immed : in_rd2; + + + assign upper_immed = {in_upper_immed, {12{1'b0}}}; + assign out_jal_dest = $signed(in_rd1) + $signed(in_jal_offset); + assign out_jal = in_jal; + + + always @(*) begin + case(in_alu_op) + `ADD: + begin + out_alu_result = $signed(ALU_in1) + $signed(ALU_in2); + out_csr_result = 32'hdeadbeef; + end + `SUB: + begin + out_alu_result = $signed(ALU_in1) - $signed(ALU_in2); + out_csr_result = 32'hdeadbeef; + end + `SLLA: + begin + out_alu_result = ALU_in1 << ALU_in2; + out_csr_result = 32'hdeadbeef; + end + `SLT: + begin + out_alu_result = ($signed(ALU_in1) < $signed(ALU_in2)) ? 32'h1 : 32'h0; + out_csr_result = 32'hdeadbeef; + end + `SLTU: + begin + + out_alu_result = ALU_in1 < ALU_in2 ? 32'h1 : 32'h0; + out_csr_result = 32'hdeadbeef; + end + `XOR: + begin + out_alu_result = ALU_in1 ^ ALU_in2; + out_csr_result = 32'hdeadbeef; + end + `SRL: + begin + out_alu_result = ALU_in1 >> ALU_in2; + out_csr_result = 32'hdeadbeef; + end + `SRA: + begin + out_alu_result = $signed(ALU_in1) >> ALU_in2; + out_csr_result = 32'hdeadbeef; + end + `OR: + begin + out_alu_result = ALU_in1 | ALU_in2; + out_csr_result = 32'hdeadbeef; + end + `AND: + begin + out_alu_result = ALU_in2 & ALU_in1; + out_csr_result = 32'hdeadbeef; + end + `SUBU: + begin + if (ALU_in1 >= ALU_in2) begin + out_alu_result = 32'h0; + end else begin + out_alu_result = 32'hffffffff; + + end + out_csr_result = 32'hdeadbeef; + end + `LUI_ALU: + begin + out_alu_result = upper_immed; + out_csr_result = 32'hdeadbeef; + end + `AUIPC_ALU: + begin + out_alu_result = $signed(in_curr_PC) + $signed(upper_immed); + out_csr_result = 32'hdeadbeef; + end + `CSR_ALU_RW: + begin + out_alu_result = in_csr_data; + out_csr_result = in_csr_mask; + end + `CSR_ALU_RS: + begin + out_alu_result = in_csr_data; + out_csr_result = in_csr_data | in_csr_mask; + end + `CSR_ALU_RC: + begin + out_alu_result = in_csr_data; + out_csr_result = in_csr_data & (32'hFFFFFFFF - in_csr_mask); + end + default: + begin + out_alu_result = 32'h0; + out_csr_result = 32'hdeadbeef; + end + endcase // in_alu_op + end + + + assign out_branch_stall = ((in_branch_type != `NO_BRANCH) || in_jal ) ? `STALL : `NO_STALL; + + + + assign out_rd = in_rd; + assign out_wb = in_wb; + assign out_mem_read = in_mem_read; + assign out_mem_write = in_mem_write; + assign out_rs1 = in_rs1; + assign out_rd1 = in_rd1; + assign out_rd2 = in_rd2; + assign out_rs2 = in_rs2; + assign out_PC_next = in_PC_next; + assign out_is_csr = in_is_csr; + assign out_csr_address = in_csr_address; + assign out_branch_offset = in_itype_immed; + assign out_valid = in_valid; + + +endmodule // VX_execute diff --git a/rtl/VX_f_d_reg.v b/rtl/VX_f_d_reg.v index 27b8a1a9..ba0ef7f3 100644 --- a/rtl/VX_f_d_reg.v +++ b/rtl/VX_f_d_reg.v @@ -14,9 +14,9 @@ module VX_f_d_reg ( output wire out_valid ); - always @(posedge clk) begin - $display("Fetch Inst: %d\tDecode Inst: %d", in_instruction, out_instruction); - end + // always @(posedge clk) begin + // $display("Fetch Inst: %d\tDecode Inst: %d", in_instruction, out_instruction); + // end reg[31:0] instruction; reg[31:0] curr_PC; diff --git a/rtl/VX_forwarding.v b/rtl/VX_forwarding.v new file mode 100644 index 00000000..cc359965 --- /dev/null +++ b/rtl/VX_forwarding.v @@ -0,0 +1,155 @@ + +`include "VX_define.v" + +module VX_forwarding ( + // INFO FROM DECODE + input wire[4:0] in_decode_src1, + input wire[4:0] in_decode_src2, + input wire[11:0] in_decode_csr_address, + + // INFO FROM EXE + input wire[4:0] in_execute_dest, + input wire[1:0] in_execute_wb, + input wire[31:0] in_execute_alu_result, + input wire[31:0] in_execute_PC_next, + input wire in_execute_is_csr, + input wire[11:0] in_execute_csr_address, + + // INFO FROM MEM + input wire[4:0] in_memory_dest, + input wire[1:0] in_memory_wb, + input wire[31:0] in_memory_alu_result, + input wire[31:0] in_memory_mem_data, + input wire[31:0] in_memory_PC_next, + input wire in_memory_is_csr, + input wire[11:0] in_memory_csr_address, + input wire[31:0] in_memory_csr_result, + + // INFO FROM WB + input wire[4:0] in_writeback_dest, + input wire[1:0] in_writeback_wb, + input wire[31:0] in_writeback_alu_result, + input wire[31:0] in_writeback_mem_data, + input wire[31:0] in_writeback_PC_next, + + // OUT SIGNALS + output wire out_src1_fwd, + output wire out_src2_fwd, + output wire out_csr_fwd, + output wire[31:0] out_src1_fwd_data, + output wire[31:0] out_src2_fwd_data, + output wire[31:0] out_csr_fwd_data, + output wire out_fwd_stall + ); + + + + wire exe_mem_read; + wire mem_mem_read; + wire wb_mem_read ; + wire exe_jal; + wire mem_jal; + wire wb_jal ; + wire exe_csr; + wire mem_csr; + wire src1_exe_fwd; + wire src1_mem_fwd; + wire src1_wb_fwd; + wire src2_exe_fwd; + wire src2_mem_fwd; + wire src2_wb_fwd; + wire csr_exe_fwd; + wire csr_mem_fwd; + + + assign exe_mem_read = (in_execute_wb == `WB_MEM); + assign mem_mem_read = (in_memory_wb == `WB_MEM); + assign wb_mem_read = (in_writeback_wb == `WB_MEM); + + assign exe_jal = (in_execute_wb == `WB_JAL); + assign mem_jal = (in_memory_wb == `WB_JAL); + assign wb_jal = (in_writeback_wb == `WB_JAL); + + assign exe_csr = (in_execute_is_csr == 1'b1); + assign mem_csr = (in_memory_is_csr == 1'b1); + + + // SRC1 + assign src1_exe_fwd = ((in_decode_src1 == in_execute_dest) && + (in_decode_src1 != `ZERO_REG) && + (in_execute_wb != `NO_WB)); + + assign src1_mem_fwd = ((in_decode_src1 == in_memory_dest) && + (in_decode_src1 != `ZERO_REG) && + (in_memory_wb != `NO_WB) && + (!src1_exe_fwd)); + + assign src1_wb_fwd = ((in_decode_src1 == in_writeback_dest) && + (in_decode_src1 != `ZERO_REG) && + (in_writeback_wb != `NO_WB) && + (!src1_exe_fwd) && + (!src1_mem_fwd)); + + + assign out_src1_fwd = src1_exe_fwd || src1_mem_fwd || src1_wb_fwd; // COMMENT + + + + + + // SRC2 + assign src2_exe_fwd = ((in_decode_src2 == in_execute_dest) && + (in_decode_src2 != `ZERO_REG) && + (in_execute_wb != `NO_WB)); + + assign src2_mem_fwd = ((in_decode_src2 == in_memory_dest) && + (in_decode_src2 != `ZERO_REG) && + (in_memory_wb != `NO_WB) && + (!src2_exe_fwd)); + + assign src2_wb_fwd = ((in_decode_src2 == in_writeback_dest) && + (in_decode_src2 != `ZERO_REG) && + (in_writeback_wb != `NO_WB) && + (!src2_exe_fwd) && + (!src2_mem_fwd)); + + + assign out_src2_fwd = src2_exe_fwd || src2_mem_fwd || src2_wb_fwd; // COMMENT + + + + // CSR + assign csr_exe_fwd = (in_decode_csr_address == in_execute_csr_address) && exe_csr; + assign csr_mem_fwd = (in_decode_csr_address == in_memory_csr_address) && mem_csr && !csr_exe_fwd; + + assign out_csr_fwd = csr_exe_fwd || csr_mem_fwd; // COMMENT + + + + assign out_fwd_stall = ((src1_exe_fwd || src2_exe_fwd) && exe_mem_read) ? `STALL : `NO_STALL; + + + assign out_src1_fwd_data = src1_exe_fwd ? ((exe_jal) ? in_execute_PC_next : in_execute_alu_result) : + (src1_mem_fwd) ? ((mem_jal) ? in_memory_PC_next : (mem_mem_read ? in_memory_mem_data : in_memory_alu_result)) : + ( src1_wb_fwd ) ? (wb_jal ? in_writeback_PC_next : (wb_mem_read ? in_writeback_mem_data : in_writeback_alu_result)) : + 32'hdeadbeef; // COMMENT + + assign out_src2_fwd_data = src2_exe_fwd ? ((exe_jal) ? in_execute_PC_next : in_execute_alu_result) : + (src2_mem_fwd) ? ((mem_jal) ? in_memory_PC_next : (mem_mem_read ? in_memory_mem_data : in_memory_alu_result)) : + ( src2_wb_fwd ) ? (wb_jal ? in_writeback_PC_next : (wb_mem_read ? in_writeback_mem_data : in_writeback_alu_result)) : + 32'hdeadbeef; // COMMENT + + assign out_csr_fwd_data = csr_exe_fwd ? in_execute_alu_result : + csr_mem_fwd ? in_memory_csr_result : + 32'hdeadbeef; // COMMENT + + + +endmodule // VX_forwarding + + + + + + + diff --git a/rtl/VX_m_w_reg.v b/rtl/VX_m_w_reg.v new file mode 100644 index 00000000..afadf59f --- /dev/null +++ b/rtl/VX_m_w_reg.v @@ -0,0 +1,78 @@ + + +`include "VX_define.v" + +module VX_m_w_reg ( + input wire clk, + input wire[31:0] in_alu_result, + input wire[31:0] in_mem_result, // NEW + input wire[4:0] in_rd, + input wire[1:0] in_wb, + input wire[4:0] in_rs1, + input wire[4:0] in_rs2, + input wire[31:0] in_PC_next, + input wire in_freeze, + input wire in_valid, + + output wire[31:0] out_alu_result, + output wire[31:0] out_mem_result, // NEW + output wire[4:0] out_rd, + output wire[1:0] out_wb, + output wire[4:0] out_rs1, + output wire[4:0] out_rs2, + output wire[31:0] out_PC_next, + output wire out_valid + ); + + + + reg[31:0] alu_result; + reg[31:0] mem_result; + reg[4:0] rd; + reg[4:0] rs1; + reg[4:0] rs2; + reg[1:0] wb; + reg[31:0] PC_next; + reg valid; + + + initial begin + alu_result = 0; + mem_result = 0; + rd = 0; + rs1 = 0; + rs2 = 0; + wb = 0; + PC_next = 0; + valid = 0; + end + + assign out_alu_result = alu_result; + assign out_mem_result = mem_result; + assign out_rd = rd; + assign out_rs1 = rs1; + assign out_rs2 = rs2; + assign out_wb = wb; + assign out_PC_next = PC_next; + assign out_valid = valid; + + + always @(posedge clk) begin + if(in_freeze == 1'b0) begin + alu_result <= in_alu_result; + mem_result <= in_mem_result; + rd <= in_rd; + rs1 <= in_rs1; + rs2 <= in_rs2; + wb <= in_wb; + PC_next <= in_PC_next; + valid <= in_valid; + end + end + + + +endmodule // VX_m_w_reg + + + diff --git a/rtl/VX_memory.v b/rtl/VX_memory.v new file mode 100644 index 00000000..1ce464f8 --- /dev/null +++ b/rtl/VX_memory.v @@ -0,0 +1,77 @@ + +`include "VX_define.v" + + +module VX_memory ( + input wire[31:0] in_alu_result, + input wire[2:0] in_mem_read, + input wire[2:0] in_mem_write, + input wire[4:0] in_rd, + input wire[1:0] in_wb, + input wire[4:0] in_rs1, + input wire[4:0] in_rs2, + input wire[31:0] in_rd2, + input wire[31:0] in_PC_next, + input wire[31:0] in_curr_PC, + input wire[31:0] in_branch_offset, + input wire[2:0] in_branch_type, + input wire in_valid, + input wire[31:0] in_cache_driver_out_data, + + output wire[31:0] out_alu_result, + output wire[31:0] out_mem_result, + output wire[4:0] out_rd, + output wire[1:0] out_wb, + output wire[4:0] out_rs1, + output wire[4:0] out_rs2, + output reg out_branch_dir, + output wire[31:0] out_branch_dest, + output wire out_delay, + output wire[31:0] out_PC_next, + output wire out_valid, + output wire[31:0] out_cache_driver_in_address, + output wire[2:0] out_cache_driver_in_mem_read, + output wire[2:0] out_cache_driver_in_mem_write, + output wire[31:0] out_cache_driver_in_data + ); + + assign out_delay = 1'b0; + + assign out_cache_driver_in_address = in_alu_result; + assign out_cache_driver_in_mem_read = in_mem_read; + assign out_cache_driver_in_mem_write = in_mem_write; + assign out_cache_driver_in_data = in_rd2; + + + assign out_mem_result = in_cache_driver_out_data; + assign out_alu_result = in_alu_result; + assign out_rd = in_rd; + assign out_wb = in_wb; + assign out_rs1 = in_rs1; + assign out_rs2 = in_rs2; + assign out_PC_next = in_PC_next; + + assign out_valid = in_valid; + + + assign out_branch_dest = $signed(in_curr_PC) + ($signed(in_branch_offset) << 1); + + + always @(*) begin + case(in_branch_type) + `BEQ: out_branch_dir = (in_alu_result == 0) ? `TAKEN : `NOT_TAKEN; + `BNE: out_branch_dir = (in_alu_result == 0) ? `NOT_TAKEN : `TAKEN; + `BLT: out_branch_dir = (in_alu_result[31] == 0) ? `NOT_TAKEN : `TAKEN; + `BGT: out_branch_dir = (in_alu_result[31] == 0) ? `TAKEN : `NOT_TAKEN; + `BLTU: out_branch_dir = (in_alu_result[31] == 0) ? `NOT_TAKEN : `TAKEN; + `BGTU: out_branch_dir = (in_alu_result[31] == 0) ? `TAKEN : `NOT_TAKEN; + `NO_BRANCH: out_branch_dir = `NOT_TAKEN; + default: out_branch_dir = `NOT_TAKEN; + endcase // in_branch_type + end + + + +endmodule // Memory + + diff --git a/rtl/VX_writeback.v b/rtl/VX_writeback.v new file mode 100644 index 00000000..a92d269f --- /dev/null +++ b/rtl/VX_writeback.v @@ -0,0 +1,33 @@ + +`include "VX_define.v" + + +module VX_writeback ( + input wire[31:0] in_alu_result, + input wire[31:0] in_mem_result, + input wire[4:0] in_rd, + input wire[1:0] in_wb, + input wire[31:0] in_PC_next, + + output wire[31:0] out_write_data, + output wire[4:0] out_rd, + output wire[1:0] out_wb + ); + + wire is_jal; + wire uses_alu; + + + assign is_jal = in_wb == `WB_JAL; + assign uses_alu = in_wb == `WB_ALU; + + assign out_write_data = is_jal ? in_PC_next : + uses_alu ? in_alu_result : + in_mem_result; + + + assign out_rd = in_rd; + assign out_wb = in_wb; + + +endmodule // VX_writeback \ No newline at end of file diff --git a/rtl/obj_dir/VVX_decode.cpp b/rtl/obj_dir/VVX_decode.cpp deleted file mode 100644 index 8cdd345f..00000000 --- a/rtl/obj_dir/VVX_decode.cpp +++ /dev/null @@ -1,975 +0,0 @@ -// Verilated -*- C++ -*- -// DESCRIPTION: Verilator output: Design implementation internals -// See VVX_decode.h for the primary calling header - -#include "VVX_decode.h" -#include "VVX_decode__Syms.h" - - -//-------------------- -// STATIC VARIABLES - - -//-------------------- - -VL_CTOR_IMP(VVX_decode) { - VVX_decode__Syms* __restrict vlSymsp = __VlSymsp = new VVX_decode__Syms(this, name()); - VVX_decode* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; - // Reset internal values - - // Reset structure values - _ctor_var_reset(); -} - -void VVX_decode::__Vconfigure(VVX_decode__Syms* vlSymsp, bool first) { - if (0 && first) {} // Prevent unused - this->__VlSymsp = vlSymsp; -} - -VVX_decode::~VVX_decode() { - delete __VlSymsp; __VlSymsp=NULL; -} - -//-------------------- - - -void VVX_decode::eval() { - VL_DEBUG_IF(VL_DBG_MSGF("+++++TOP Evaluate VVX_decode::eval\n"); ); - VVX_decode__Syms* __restrict vlSymsp = this->__VlSymsp; // Setup global symbol table - VVX_decode* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; -#ifdef VL_DEBUG - // Debug assertions - _eval_debug_assertions(); -#endif // VL_DEBUG - // Initialize - if (VL_UNLIKELY(!vlSymsp->__Vm_didInit)) _eval_initial_loop(vlSymsp); - // Evaluate till stable - int __VclockLoop = 0; - QData __Vchange = 1; - do { - VL_DEBUG_IF(VL_DBG_MSGF("+ Clock loop\n");); - _eval(vlSymsp); - if (VL_UNLIKELY(++__VclockLoop > 100)) { - // About to fail, so enable debug to see what's not settling. - // Note you must run make with OPT=-DVL_DEBUG for debug prints. - int __Vsaved_debug = Verilated::debug(); - Verilated::debug(1); - __Vchange = _change_request(vlSymsp); - Verilated::debug(__Vsaved_debug); - VL_FATAL_MT(__FILE__,__LINE__,__FILE__,"Verilated model didn't converge"); - } else { - __Vchange = _change_request(vlSymsp); - } - } while (VL_UNLIKELY(__Vchange)); -} - -void VVX_decode::_eval_initial_loop(VVX_decode__Syms* __restrict vlSymsp) { - vlSymsp->__Vm_didInit = true; - _eval_initial(vlSymsp); - // Evaluate till stable - int __VclockLoop = 0; - QData __Vchange = 1; - do { - _eval_settle(vlSymsp); - _eval(vlSymsp); - if (VL_UNLIKELY(++__VclockLoop > 100)) { - // About to fail, so enable debug to see what's not settling. - // Note you must run make with OPT=-DVL_DEBUG for debug prints. - int __Vsaved_debug = Verilated::debug(); - Verilated::debug(1); - __Vchange = _change_request(vlSymsp); - Verilated::debug(__Vsaved_debug); - VL_FATAL_MT(__FILE__,__LINE__,__FILE__,"Verilated model didn't DC converge"); - } else { - __Vchange = _change_request(vlSymsp); - } - } while (VL_UNLIKELY(__Vchange)); -} - -//-------------------- -// Internal Methods - -VL_INLINE_OPT void VVX_decode::_combo__TOP__1(VVX_decode__Syms* __restrict vlSymsp) { - VL_DEBUG_IF(VL_DBG_MSGF("+ VVX_decode::_combo__TOP__1\n"); ); - VVX_decode* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; - // Body - vlTOPp->out_PC_next = ((IData)(4U) + vlTOPp->in_curr_PC); - vlTOPp->out_mem_read = (7U & ((3U == (0x7fU & vlTOPp->in_instruction)) - ? (vlTOPp->in_instruction - >> 0xcU) : 7U)); - vlTOPp->out_mem_write = (7U & ((0x23U == (0x7fU - & vlTOPp->in_instruction)) - ? (vlTOPp->in_instruction - >> 0xcU) : 7U)); - // ALWAYS at VX_decode.v:247 - vlTOPp->out_jal = ((0x6fU == (0x7fU & vlTOPp->in_instruction)) - | ((0x67U == (0x7fU & vlTOPp->in_instruction)) - | ((0x73U == (0x7fU & vlTOPp->in_instruction)) - & ((0U == (7U & (vlTOPp->in_instruction - >> 0xcU))) - & (2U > (0xfffU & (vlTOPp->in_instruction - >> 0x14U))))))); - vlTOPp->out_csr_address = (0xfffU & (((0U != (7U - & (vlTOPp->in_instruction - >> 0xcU))) - & (2U <= - (0xfffU - & (vlTOPp->in_instruction - >> 0x14U)))) - ? (vlTOPp->in_instruction - >> 0x14U) - : 0x55U)); - // ALWAYS at VX_decode.v:306 - vlTOPp->out_branch_stall = ((0x63U == (0x7fU & vlTOPp->in_instruction)) - | ((0x6fU == (0x7fU - & vlTOPp->in_instruction)) - | (0x67U == (0x7fU - & vlTOPp->in_instruction)))); - vlTOPp->out_rd = (0x1fU & (vlTOPp->in_instruction - >> 7U)); - // ALWAYS at VX_decode.v:306 - vlTOPp->out_branch_type = ((0x63U == (0x7fU & vlTOPp->in_instruction)) - ? ((0x4000U & vlTOPp->in_instruction) - ? ((0x2000U & vlTOPp->in_instruction) - ? ((0x1000U - & vlTOPp->in_instruction) - ? 6U : 5U) - : ((0x1000U - & vlTOPp->in_instruction) - ? 4U : 3U)) - : ((0x2000U & vlTOPp->in_instruction) - ? 0U : ((0x1000U - & vlTOPp->in_instruction) - ? 2U - : 1U))) - : 0U); - vlTOPp->VX_decode__DOT__is_itype = ((0x13U == (0x7fU - & vlTOPp->in_instruction)) - | (3U == (0x7fU - & vlTOPp->in_instruction))); - vlTOPp->VX_decode__DOT__is_csr = ((0x73U == (0x7fU - & vlTOPp->in_instruction)) - & (0U != (7U - & (vlTOPp->in_instruction - >> 0xcU)))); - vlTOPp->out_rs1 = (0x1fU & (vlTOPp->in_instruction - >> 0xfU)); - vlTOPp->out_rs2 = (0x1fU & (vlTOPp->in_instruction - >> 0x14U)); - vlTOPp->out_rs2_src = (1U & (((IData)(vlTOPp->VX_decode__DOT__is_itype) - | (0x23U == (0x7fU - & vlTOPp->in_instruction))) - ? 1U : 0U)); - vlTOPp->out_is_csr = vlTOPp->VX_decode__DOT__is_csr; - vlTOPp->out_wb = ((((0x6fU == (0x7fU & vlTOPp->in_instruction)) - | (0x67U == (0x7fU & vlTOPp->in_instruction))) - | ((0x73U == (0x7fU & vlTOPp->in_instruction)) - & (0U == (7U & (vlTOPp->in_instruction - >> 0xcU))))) - ? 3U : ((3U == (0x7fU & vlTOPp->in_instruction)) - ? 2U : ((((((IData)(vlTOPp->VX_decode__DOT__is_itype) - | (0x33U - == (0x7fU - & vlTOPp->in_instruction))) - | (0x37U - == (0x7fU - & vlTOPp->in_instruction))) - | (0x17U - == (0x7fU - & vlTOPp->in_instruction))) - | (IData)(vlTOPp->VX_decode__DOT__is_csr)) - ? 1U : 0U))); - vlTOPp->out_alu_op = ((0x63U == (0x7fU & vlTOPp->in_instruction)) - ? ((5U > (IData)(vlTOPp->out_branch_type)) - ? 1U : 0xaU) : ((0x37U - == - (0x7fU - & vlTOPp->in_instruction)) - ? 0xbU - : ( - (0x17U - == - (0x7fU - & vlTOPp->in_instruction)) - ? 0xcU - : - ((IData)(vlTOPp->VX_decode__DOT__is_csr) - ? - ((1U - == - (3U - & (vlTOPp->in_instruction - >> 0xcU))) - ? 0xdU - : - ((2U - == - (3U - & (vlTOPp->in_instruction - >> 0xcU))) - ? 0xeU - : 0xfU)) - : - (((0x23U - == - (0x7fU - & vlTOPp->in_instruction)) - | (3U - == - (0x7fU - & vlTOPp->in_instruction))) - ? 0U - : - ((0x4000U - & vlTOPp->in_instruction) - ? - ((0x2000U - & vlTOPp->in_instruction) - ? - ((0x1000U - & vlTOPp->in_instruction) - ? 9U - : 8U) - : - ((0x1000U - & vlTOPp->in_instruction) - ? - ((0U - == - (0x7fU - & (vlTOPp->in_instruction - >> 0x19U))) - ? 6U - : 7U) - : 5U)) - : - ((0x2000U - & vlTOPp->in_instruction) - ? - ((0x1000U - & vlTOPp->in_instruction) - ? 4U - : 3U) - : - ((0x1000U - & vlTOPp->in_instruction) - ? 2U - : - ((0x13U - == - (0x7fU - & vlTOPp->in_instruction)) - ? 0U - : - ((0U - == - (0x7fU - & (vlTOPp->in_instruction - >> 0x19U))) - ? 0U - : 1U)))))))))); - // ALWAYS at VX_decode.v:201 - vlTOPp->out_upper_immed = ((0x37U == (0x7fU & vlTOPp->in_instruction)) - ? ((0xfe000U & (vlTOPp->in_instruction - >> 0xcU)) - | (((IData)(vlTOPp->out_rs2) - << 8U) | (((IData)(vlTOPp->out_rs1) - << 3U) - | (7U - & (vlTOPp->in_instruction - >> 0xcU))))) - : ((0x17U == (0x7fU - & vlTOPp->in_instruction)) - ? ((0xfe000U & - (vlTOPp->in_instruction - >> 0xcU)) - | (((IData)(vlTOPp->out_rs2) - << 8U) | - (((IData)(vlTOPp->out_rs1) - << 3U) - | (7U & - (vlTOPp->in_instruction - >> 0xcU))))) - : 0U)); - vlTOPp->VX_decode__DOT__jalr_immed = ((0xfe0U & - (vlTOPp->in_instruction - >> 0x14U)) - | (IData)(vlTOPp->out_rs2)); - vlTOPp->VX_decode__DOT__alu_tempp = (0xfffU & ( - ((1U - == - (7U - & (vlTOPp->in_instruction - >> 0xcU))) - | (5U - == - (7U - & (vlTOPp->in_instruction - >> 0xcU)))) - ? (IData)(vlTOPp->out_rs2) - : - (vlTOPp->in_instruction - >> 0x14U))); - // ALWAYS at VX_decode.v:247 - vlTOPp->out_jal_offset = ((0x6fU == (0x7fU & vlTOPp->in_instruction)) - ? ((0xffe00000U & (VL_NEGATE_I((IData)( - (1U - & (vlTOPp->in_instruction - >> 0x1fU)))) - << 0x15U)) - | ((0x100000U & (vlTOPp->in_instruction - >> 0xbU)) - | ((0xff000U & vlTOPp->in_instruction) - | ((0x800U - & (vlTOPp->in_instruction - >> 9U)) - | (0x7feU - & (vlTOPp->in_instruction - >> 0x14U)))))) - : ((0x67U == (0x7fU - & vlTOPp->in_instruction)) - ? ((0xfffff000U - & (VL_NEGATE_I((IData)( - (1U - & ((IData)(vlTOPp->VX_decode__DOT__jalr_immed) - >> 0xbU)))) - << 0xcU)) - | (IData)(vlTOPp->VX_decode__DOT__jalr_immed)) - : ((0x73U == (0x7fU - & vlTOPp->in_instruction)) - ? (((0U == (7U - & (vlTOPp->in_instruction - >> 0xcU))) - & (2U > - (0xfffU - & (vlTOPp->in_instruction - >> 0x14U)))) - ? 0xb0000000U - : 0xdeadbeefU) - : 0xdeadbeefU))); - // ALWAYS at VX_decode.v:295 - vlTOPp->out_itype_immed = ((0x40U & vlTOPp->in_instruction) - ? ((0x20U & vlTOPp->in_instruction) - ? ((0x10U & vlTOPp->in_instruction) - ? 0xdeadbeefU - : ((8U & vlTOPp->in_instruction) - ? 0xdeadbeefU - : ((4U - & vlTOPp->in_instruction) - ? 0xdeadbeefU - : ( - (2U - & vlTOPp->in_instruction) - ? - ((1U - & vlTOPp->in_instruction) - ? - ((0xfffff000U - & (VL_NEGATE_I((IData)( - (1U - & (vlTOPp->in_instruction - >> 0x1fU)))) - << 0xcU)) - | ((0x800U - & (vlTOPp->in_instruction - >> 0x14U)) - | ((0x400U - & (vlTOPp->in_instruction - << 3U)) - | ((0x3f0U - & (vlTOPp->in_instruction - >> 0x15U)) - | (0xfU - & (vlTOPp->in_instruction - >> 8U)))))) - : 0xdeadbeefU) - : 0xdeadbeefU)))) - : 0xdeadbeefU) : - ((0x20U & vlTOPp->in_instruction) - ? ((0x10U & vlTOPp->in_instruction) - ? 0xdeadbeefU : - ((8U & vlTOPp->in_instruction) - ? 0xdeadbeefU - : ((4U & vlTOPp->in_instruction) - ? 0xdeadbeefU - : ((2U & vlTOPp->in_instruction) - ? ((1U - & vlTOPp->in_instruction) - ? - ((0xfffff000U - & (VL_NEGATE_I((IData)( - (1U - & (vlTOPp->in_instruction - >> 0x1fU)))) - << 0xcU)) - | ((0xfe0U - & (vlTOPp->in_instruction - >> 0x14U)) - | (IData)(vlTOPp->out_rd))) - : 0xdeadbeefU) - : 0xdeadbeefU)))) - : ((0x10U & vlTOPp->in_instruction) - ? ((8U & vlTOPp->in_instruction) - ? 0xdeadbeefU - : ((4U & vlTOPp->in_instruction) - ? 0xdeadbeefU - : ((2U - & vlTOPp->in_instruction) - ? - ((1U - & vlTOPp->in_instruction) - ? - ((0xfffff000U - & (VL_NEGATE_I((IData)( - (1U - & ((IData)(vlTOPp->VX_decode__DOT__alu_tempp) - >> 0xbU)))) - << 0xcU)) - | (IData)(vlTOPp->VX_decode__DOT__alu_tempp)) - : 0xdeadbeefU) - : 0xdeadbeefU))) - : ((8U & vlTOPp->in_instruction) - ? 0xdeadbeefU - : ((4U & vlTOPp->in_instruction) - ? 0xdeadbeefU - : ((2U - & vlTOPp->in_instruction) - ? - ((1U - & vlTOPp->in_instruction) - ? - ((0xfffff000U - & (VL_NEGATE_I((IData)( - (1U - & (vlTOPp->in_instruction - >> 0x1fU)))) - << 0xcU)) - | (0xfffU - & (vlTOPp->in_instruction - >> 0x14U))) - : 0xdeadbeefU) - : 0xdeadbeefU)))))); -} - -void VVX_decode::_settle__TOP__2(VVX_decode__Syms* __restrict vlSymsp) { - VL_DEBUG_IF(VL_DBG_MSGF("+ VVX_decode::_settle__TOP__2\n"); ); - VVX_decode* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; - // Body - vlTOPp->out_PC_next = ((IData)(4U) + vlTOPp->in_curr_PC); - vlTOPp->out_mem_read = (7U & ((3U == (0x7fU & vlTOPp->in_instruction)) - ? (vlTOPp->in_instruction - >> 0xcU) : 7U)); - vlTOPp->out_mem_write = (7U & ((0x23U == (0x7fU - & vlTOPp->in_instruction)) - ? (vlTOPp->in_instruction - >> 0xcU) : 7U)); - // ALWAYS at VX_decode.v:247 - vlTOPp->out_jal = ((0x6fU == (0x7fU & vlTOPp->in_instruction)) - | ((0x67U == (0x7fU & vlTOPp->in_instruction)) - | ((0x73U == (0x7fU & vlTOPp->in_instruction)) - & ((0U == (7U & (vlTOPp->in_instruction - >> 0xcU))) - & (2U > (0xfffU & (vlTOPp->in_instruction - >> 0x14U))))))); - vlTOPp->out_csr_address = (0xfffU & (((0U != (7U - & (vlTOPp->in_instruction - >> 0xcU))) - & (2U <= - (0xfffU - & (vlTOPp->in_instruction - >> 0x14U)))) - ? (vlTOPp->in_instruction - >> 0x14U) - : 0x55U)); - // ALWAYS at VX_decode.v:306 - vlTOPp->out_branch_stall = ((0x63U == (0x7fU & vlTOPp->in_instruction)) - | ((0x6fU == (0x7fU - & vlTOPp->in_instruction)) - | (0x67U == (0x7fU - & vlTOPp->in_instruction)))); - vlTOPp->out_rd = (0x1fU & (vlTOPp->in_instruction - >> 7U)); - // ALWAYS at VX_decode.v:306 - vlTOPp->out_branch_type = ((0x63U == (0x7fU & vlTOPp->in_instruction)) - ? ((0x4000U & vlTOPp->in_instruction) - ? ((0x2000U & vlTOPp->in_instruction) - ? ((0x1000U - & vlTOPp->in_instruction) - ? 6U : 5U) - : ((0x1000U - & vlTOPp->in_instruction) - ? 4U : 3U)) - : ((0x2000U & vlTOPp->in_instruction) - ? 0U : ((0x1000U - & vlTOPp->in_instruction) - ? 2U - : 1U))) - : 0U); - vlTOPp->VX_decode__DOT__is_itype = ((0x13U == (0x7fU - & vlTOPp->in_instruction)) - | (3U == (0x7fU - & vlTOPp->in_instruction))); - vlTOPp->VX_decode__DOT__is_csr = ((0x73U == (0x7fU - & vlTOPp->in_instruction)) - & (0U != (7U - & (vlTOPp->in_instruction - >> 0xcU)))); - vlTOPp->out_rs1 = (0x1fU & (vlTOPp->in_instruction - >> 0xfU)); - vlTOPp->out_rs2 = (0x1fU & (vlTOPp->in_instruction - >> 0x14U)); - vlTOPp->out_rs2_src = (1U & (((IData)(vlTOPp->VX_decode__DOT__is_itype) - | (0x23U == (0x7fU - & vlTOPp->in_instruction))) - ? 1U : 0U)); - vlTOPp->out_is_csr = vlTOPp->VX_decode__DOT__is_csr; - vlTOPp->out_wb = ((((0x6fU == (0x7fU & vlTOPp->in_instruction)) - | (0x67U == (0x7fU & vlTOPp->in_instruction))) - | ((0x73U == (0x7fU & vlTOPp->in_instruction)) - & (0U == (7U & (vlTOPp->in_instruction - >> 0xcU))))) - ? 3U : ((3U == (0x7fU & vlTOPp->in_instruction)) - ? 2U : ((((((IData)(vlTOPp->VX_decode__DOT__is_itype) - | (0x33U - == (0x7fU - & vlTOPp->in_instruction))) - | (0x37U - == (0x7fU - & vlTOPp->in_instruction))) - | (0x17U - == (0x7fU - & vlTOPp->in_instruction))) - | (IData)(vlTOPp->VX_decode__DOT__is_csr)) - ? 1U : 0U))); - vlTOPp->out_alu_op = ((0x63U == (0x7fU & vlTOPp->in_instruction)) - ? ((5U > (IData)(vlTOPp->out_branch_type)) - ? 1U : 0xaU) : ((0x37U - == - (0x7fU - & vlTOPp->in_instruction)) - ? 0xbU - : ( - (0x17U - == - (0x7fU - & vlTOPp->in_instruction)) - ? 0xcU - : - ((IData)(vlTOPp->VX_decode__DOT__is_csr) - ? - ((1U - == - (3U - & (vlTOPp->in_instruction - >> 0xcU))) - ? 0xdU - : - ((2U - == - (3U - & (vlTOPp->in_instruction - >> 0xcU))) - ? 0xeU - : 0xfU)) - : - (((0x23U - == - (0x7fU - & vlTOPp->in_instruction)) - | (3U - == - (0x7fU - & vlTOPp->in_instruction))) - ? 0U - : - ((0x4000U - & vlTOPp->in_instruction) - ? - ((0x2000U - & vlTOPp->in_instruction) - ? - ((0x1000U - & vlTOPp->in_instruction) - ? 9U - : 8U) - : - ((0x1000U - & vlTOPp->in_instruction) - ? - ((0U - == - (0x7fU - & (vlTOPp->in_instruction - >> 0x19U))) - ? 6U - : 7U) - : 5U)) - : - ((0x2000U - & vlTOPp->in_instruction) - ? - ((0x1000U - & vlTOPp->in_instruction) - ? 4U - : 3U) - : - ((0x1000U - & vlTOPp->in_instruction) - ? 2U - : - ((0x13U - == - (0x7fU - & vlTOPp->in_instruction)) - ? 0U - : - ((0U - == - (0x7fU - & (vlTOPp->in_instruction - >> 0x19U))) - ? 0U - : 1U)))))))))); - vlTOPp->out_rd1 = ((0x6fU == (0x7fU & vlTOPp->in_instruction)) - ? vlTOPp->in_curr_PC : ((IData)(vlTOPp->in_src1_fwd) - ? vlTOPp->in_src1_fwd_data - : - vlTOPp->VX_decode__DOT__vx_register_file__DOT__registers - [vlTOPp->out_rs1])); - // ALWAYS at VX_decode.v:201 - vlTOPp->out_upper_immed = ((0x37U == (0x7fU & vlTOPp->in_instruction)) - ? ((0xfe000U & (vlTOPp->in_instruction - >> 0xcU)) - | (((IData)(vlTOPp->out_rs2) - << 8U) | (((IData)(vlTOPp->out_rs1) - << 3U) - | (7U - & (vlTOPp->in_instruction - >> 0xcU))))) - : ((0x17U == (0x7fU - & vlTOPp->in_instruction)) - ? ((0xfe000U & - (vlTOPp->in_instruction - >> 0xcU)) - | (((IData)(vlTOPp->out_rs2) - << 8U) | - (((IData)(vlTOPp->out_rs1) - << 3U) - | (7U & - (vlTOPp->in_instruction - >> 0xcU))))) - : 0U)); - vlTOPp->VX_decode__DOT__jalr_immed = ((0xfe0U & - (vlTOPp->in_instruction - >> 0x14U)) - | (IData)(vlTOPp->out_rs2)); - vlTOPp->VX_decode__DOT__alu_tempp = (0xfffU & ( - ((1U - == - (7U - & (vlTOPp->in_instruction - >> 0xcU))) - | (5U - == - (7U - & (vlTOPp->in_instruction - >> 0xcU)))) - ? (IData)(vlTOPp->out_rs2) - : - (vlTOPp->in_instruction - >> 0x14U))); - vlTOPp->out_rd2 = ((IData)(vlTOPp->in_src2_fwd) - ? vlTOPp->in_src2_fwd_data : - vlTOPp->VX_decode__DOT__vx_register_file__DOT__registers - [vlTOPp->out_rs2]); - vlTOPp->out_csr_mask = (((IData)(vlTOPp->VX_decode__DOT__is_csr) - & (vlTOPp->in_instruction - >> 0xeU)) ? (IData)(vlTOPp->out_rs1) - : vlTOPp->out_rd1); - // ALWAYS at VX_decode.v:247 - vlTOPp->out_jal_offset = ((0x6fU == (0x7fU & vlTOPp->in_instruction)) - ? ((0xffe00000U & (VL_NEGATE_I((IData)( - (1U - & (vlTOPp->in_instruction - >> 0x1fU)))) - << 0x15U)) - | ((0x100000U & (vlTOPp->in_instruction - >> 0xbU)) - | ((0xff000U & vlTOPp->in_instruction) - | ((0x800U - & (vlTOPp->in_instruction - >> 9U)) - | (0x7feU - & (vlTOPp->in_instruction - >> 0x14U)))))) - : ((0x67U == (0x7fU - & vlTOPp->in_instruction)) - ? ((0xfffff000U - & (VL_NEGATE_I((IData)( - (1U - & ((IData)(vlTOPp->VX_decode__DOT__jalr_immed) - >> 0xbU)))) - << 0xcU)) - | (IData)(vlTOPp->VX_decode__DOT__jalr_immed)) - : ((0x73U == (0x7fU - & vlTOPp->in_instruction)) - ? (((0U == (7U - & (vlTOPp->in_instruction - >> 0xcU))) - & (2U > - (0xfffU - & (vlTOPp->in_instruction - >> 0x14U)))) - ? 0xb0000000U - : 0xdeadbeefU) - : 0xdeadbeefU))); - // ALWAYS at VX_decode.v:295 - vlTOPp->out_itype_immed = ((0x40U & vlTOPp->in_instruction) - ? ((0x20U & vlTOPp->in_instruction) - ? ((0x10U & vlTOPp->in_instruction) - ? 0xdeadbeefU - : ((8U & vlTOPp->in_instruction) - ? 0xdeadbeefU - : ((4U - & vlTOPp->in_instruction) - ? 0xdeadbeefU - : ( - (2U - & vlTOPp->in_instruction) - ? - ((1U - & vlTOPp->in_instruction) - ? - ((0xfffff000U - & (VL_NEGATE_I((IData)( - (1U - & (vlTOPp->in_instruction - >> 0x1fU)))) - << 0xcU)) - | ((0x800U - & (vlTOPp->in_instruction - >> 0x14U)) - | ((0x400U - & (vlTOPp->in_instruction - << 3U)) - | ((0x3f0U - & (vlTOPp->in_instruction - >> 0x15U)) - | (0xfU - & (vlTOPp->in_instruction - >> 8U)))))) - : 0xdeadbeefU) - : 0xdeadbeefU)))) - : 0xdeadbeefU) : - ((0x20U & vlTOPp->in_instruction) - ? ((0x10U & vlTOPp->in_instruction) - ? 0xdeadbeefU : - ((8U & vlTOPp->in_instruction) - ? 0xdeadbeefU - : ((4U & vlTOPp->in_instruction) - ? 0xdeadbeefU - : ((2U & vlTOPp->in_instruction) - ? ((1U - & vlTOPp->in_instruction) - ? - ((0xfffff000U - & (VL_NEGATE_I((IData)( - (1U - & (vlTOPp->in_instruction - >> 0x1fU)))) - << 0xcU)) - | ((0xfe0U - & (vlTOPp->in_instruction - >> 0x14U)) - | (IData)(vlTOPp->out_rd))) - : 0xdeadbeefU) - : 0xdeadbeefU)))) - : ((0x10U & vlTOPp->in_instruction) - ? ((8U & vlTOPp->in_instruction) - ? 0xdeadbeefU - : ((4U & vlTOPp->in_instruction) - ? 0xdeadbeefU - : ((2U - & vlTOPp->in_instruction) - ? - ((1U - & vlTOPp->in_instruction) - ? - ((0xfffff000U - & (VL_NEGATE_I((IData)( - (1U - & ((IData)(vlTOPp->VX_decode__DOT__alu_tempp) - >> 0xbU)))) - << 0xcU)) - | (IData)(vlTOPp->VX_decode__DOT__alu_tempp)) - : 0xdeadbeefU) - : 0xdeadbeefU))) - : ((8U & vlTOPp->in_instruction) - ? 0xdeadbeefU - : ((4U & vlTOPp->in_instruction) - ? 0xdeadbeefU - : ((2U - & vlTOPp->in_instruction) - ? - ((1U - & vlTOPp->in_instruction) - ? - ((0xfffff000U - & (VL_NEGATE_I((IData)( - (1U - & (vlTOPp->in_instruction - >> 0x1fU)))) - << 0xcU)) - | (0xfffU - & (vlTOPp->in_instruction - >> 0x14U))) - : 0xdeadbeefU) - : 0xdeadbeefU)))))); -} - -VL_INLINE_OPT void VVX_decode::_sequent__TOP__3(VVX_decode__Syms* __restrict vlSymsp) { - VL_DEBUG_IF(VL_DBG_MSGF("+ VVX_decode::_sequent__TOP__3\n"); ); - VVX_decode* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; - // Variables - // Begin mtask footprint all: - VL_SIG8(__Vdlyvdim0__VX_decode__DOT__vx_register_file__DOT__registers__v0,4,0); - VL_SIG8(__Vdlyvset__VX_decode__DOT__vx_register_file__DOT__registers__v0,0,0); - VL_SIG(__Vdlyvval__VX_decode__DOT__vx_register_file__DOT__registers__v0,31,0); - // Body - __Vdlyvset__VX_decode__DOT__vx_register_file__DOT__registers__v0 = 0U; - // ALWAYS at VX_register_file.v:30 - if (((0U != (IData)(vlTOPp->in_wb)) & (0U != (IData)(vlTOPp->in_rd)))) { - __Vdlyvval__VX_decode__DOT__vx_register_file__DOT__registers__v0 - = vlTOPp->in_write_data; - __Vdlyvset__VX_decode__DOT__vx_register_file__DOT__registers__v0 = 1U; - __Vdlyvdim0__VX_decode__DOT__vx_register_file__DOT__registers__v0 - = vlTOPp->in_rd; - } - // ALWAYSPOST at VX_register_file.v:32 - if (__Vdlyvset__VX_decode__DOT__vx_register_file__DOT__registers__v0) { - vlTOPp->VX_decode__DOT__vx_register_file__DOT__registers[__Vdlyvdim0__VX_decode__DOT__vx_register_file__DOT__registers__v0] - = __Vdlyvval__VX_decode__DOT__vx_register_file__DOT__registers__v0; - } -} - -VL_INLINE_OPT void VVX_decode::_combo__TOP__4(VVX_decode__Syms* __restrict vlSymsp) { - VL_DEBUG_IF(VL_DBG_MSGF("+ VVX_decode::_combo__TOP__4\n"); ); - VVX_decode* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; - // Body - vlTOPp->out_rd2 = ((IData)(vlTOPp->in_src2_fwd) - ? vlTOPp->in_src2_fwd_data : - vlTOPp->VX_decode__DOT__vx_register_file__DOT__registers - [vlTOPp->out_rs2]); - vlTOPp->out_rd1 = ((0x6fU == (0x7fU & vlTOPp->in_instruction)) - ? vlTOPp->in_curr_PC : ((IData)(vlTOPp->in_src1_fwd) - ? vlTOPp->in_src1_fwd_data - : - vlTOPp->VX_decode__DOT__vx_register_file__DOT__registers - [vlTOPp->out_rs1])); - vlTOPp->out_csr_mask = (((IData)(vlTOPp->VX_decode__DOT__is_csr) - & (vlTOPp->in_instruction - >> 0xeU)) ? (IData)(vlTOPp->out_rs1) - : vlTOPp->out_rd1); -} - -void VVX_decode::_eval(VVX_decode__Syms* __restrict vlSymsp) { - VL_DEBUG_IF(VL_DBG_MSGF("+ VVX_decode::_eval\n"); ); - VVX_decode* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; - // Body - vlTOPp->_combo__TOP__1(vlSymsp); - if (((IData)(vlTOPp->clk) & (~ (IData)(vlTOPp->__Vclklast__TOP__clk)))) { - vlTOPp->_sequent__TOP__3(vlSymsp); - } - vlTOPp->_combo__TOP__4(vlSymsp); - // Final - vlTOPp->__Vclklast__TOP__clk = vlTOPp->clk; -} - -void VVX_decode::_eval_initial(VVX_decode__Syms* __restrict vlSymsp) { - VL_DEBUG_IF(VL_DBG_MSGF("+ VVX_decode::_eval_initial\n"); ); - VVX_decode* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; - // Body - vlTOPp->__Vclklast__TOP__clk = vlTOPp->clk; -} - -void VVX_decode::final() { - VL_DEBUG_IF(VL_DBG_MSGF("+ VVX_decode::final\n"); ); - // Variables - VVX_decode__Syms* __restrict vlSymsp = this->__VlSymsp; - VVX_decode* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; -} - -void VVX_decode::_eval_settle(VVX_decode__Syms* __restrict vlSymsp) { - VL_DEBUG_IF(VL_DBG_MSGF("+ VVX_decode::_eval_settle\n"); ); - VVX_decode* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; - // Body - vlTOPp->_settle__TOP__2(vlSymsp); -} - -VL_INLINE_OPT QData VVX_decode::_change_request(VVX_decode__Syms* __restrict vlSymsp) { - VL_DEBUG_IF(VL_DBG_MSGF("+ VVX_decode::_change_request\n"); ); - VVX_decode* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; - // Body - // Change detection - QData __req = false; // Logically a bool - return __req; -} - -#ifdef VL_DEBUG -void VVX_decode::_eval_debug_assertions() { - VL_DEBUG_IF(VL_DBG_MSGF("+ VVX_decode::_eval_debug_assertions\n"); ); - // Body - if (VL_UNLIKELY((clk & 0xfeU))) { - Verilated::overWidthError("clk");} - if (VL_UNLIKELY((in_rd & 0xe0U))) { - Verilated::overWidthError("in_rd");} - if (VL_UNLIKELY((in_wb & 0xfcU))) { - Verilated::overWidthError("in_wb");} - if (VL_UNLIKELY((in_src1_fwd & 0xfeU))) { - Verilated::overWidthError("in_src1_fwd");} - if (VL_UNLIKELY((in_src2_fwd & 0xfeU))) { - Verilated::overWidthError("in_src2_fwd");} -} -#endif // VL_DEBUG - -void VVX_decode::_ctor_var_reset() { - VL_DEBUG_IF(VL_DBG_MSGF("+ VVX_decode::_ctor_var_reset\n"); ); - // Body - clk = VL_RAND_RESET_I(1); - in_instruction = VL_RAND_RESET_I(32); - in_curr_PC = VL_RAND_RESET_I(32); - in_write_data = VL_RAND_RESET_I(32); - in_rd = VL_RAND_RESET_I(5); - in_wb = VL_RAND_RESET_I(2); - in_src1_fwd = VL_RAND_RESET_I(1); - in_src1_fwd_data = VL_RAND_RESET_I(32); - in_src2_fwd = VL_RAND_RESET_I(1); - in_src2_fwd_data = VL_RAND_RESET_I(32); - out_csr_address = VL_RAND_RESET_I(12); - out_is_csr = VL_RAND_RESET_I(1); - out_csr_mask = VL_RAND_RESET_I(32); - out_rd = VL_RAND_RESET_I(5); - out_rs1 = VL_RAND_RESET_I(5); - out_rd1 = VL_RAND_RESET_I(32); - out_rs2 = VL_RAND_RESET_I(5); - out_rd2 = VL_RAND_RESET_I(32); - out_wb = VL_RAND_RESET_I(2); - out_alu_op = VL_RAND_RESET_I(4); - out_rs2_src = VL_RAND_RESET_I(1); - out_itype_immed = VL_RAND_RESET_I(32); - out_mem_read = VL_RAND_RESET_I(3); - out_mem_write = VL_RAND_RESET_I(3); - out_branch_type = VL_RAND_RESET_I(3); - out_branch_stall = VL_RAND_RESET_I(1); - out_jal = VL_RAND_RESET_I(1); - out_jal_offset = VL_RAND_RESET_I(32); - out_upper_immed = VL_RAND_RESET_I(20); - out_PC_next = VL_RAND_RESET_I(32); - VX_decode__DOT__is_itype = VL_RAND_RESET_I(1); - VX_decode__DOT__is_csr = VL_RAND_RESET_I(1); - VX_decode__DOT__jalr_immed = VL_RAND_RESET_I(12); - VX_decode__DOT__alu_tempp = VL_RAND_RESET_I(12); - { int __Vi0=0; for (; __Vi0<32; ++__Vi0) { - VX_decode__DOT__vx_register_file__DOT__registers[__Vi0] = VL_RAND_RESET_I(32); - }} -} diff --git a/rtl/obj_dir/VVX_decode.h b/rtl/obj_dir/VVX_decode.h deleted file mode 100644 index b439480b..00000000 --- a/rtl/obj_dir/VVX_decode.h +++ /dev/null @@ -1,118 +0,0 @@ -// Verilated -*- C++ -*- -// DESCRIPTION: Verilator output: Primary design header -// -// This header should be included by all source files instantiating the design. -// The class here is then constructed to instantiate the design. -// See the Verilator manual for examples. - -#ifndef _VVX_decode_H_ -#define _VVX_decode_H_ - -#include "verilated.h" - -class VVX_decode__Syms; - -//---------- - -VL_MODULE(VVX_decode) { - public: - - // PORTS - // The application code writes and reads these signals to - // propagate new values into/out from the Verilated model. - // Begin mtask footprint all: - VL_IN8(clk,0,0); - VL_IN8(in_rd,4,0); - VL_IN8(in_wb,1,0); - VL_IN8(in_src1_fwd,0,0); - VL_IN8(in_src2_fwd,0,0); - VL_OUT8(out_is_csr,0,0); - VL_OUT8(out_rd,4,0); - VL_OUT8(out_rs1,4,0); - VL_OUT8(out_rs2,4,0); - VL_OUT8(out_wb,1,0); - VL_OUT8(out_alu_op,3,0); - VL_OUT8(out_rs2_src,0,0); - VL_OUT8(out_mem_read,2,0); - VL_OUT8(out_mem_write,2,0); - VL_OUT8(out_branch_type,2,0); - VL_OUT8(out_branch_stall,0,0); - VL_OUT8(out_jal,0,0); - VL_OUT16(out_csr_address,11,0); - VL_IN(in_instruction,31,0); - VL_IN(in_curr_PC,31,0); - VL_IN(in_write_data,31,0); - VL_IN(in_src1_fwd_data,31,0); - VL_IN(in_src2_fwd_data,31,0); - VL_OUT(out_csr_mask,31,0); - VL_OUT(out_rd1,31,0); - VL_OUT(out_rd2,31,0); - VL_OUT(out_itype_immed,31,0); - VL_OUT(out_jal_offset,31,0); - VL_OUT(out_upper_immed,19,0); - VL_OUT(out_PC_next,31,0); - - // LOCAL SIGNALS - // Internals; generally not touched by application code - // Begin mtask footprint all: - VL_SIG8(VX_decode__DOT__is_itype,0,0); - VL_SIG8(VX_decode__DOT__is_csr,0,0); - VL_SIG16(VX_decode__DOT__jalr_immed,11,0); - VL_SIG16(VX_decode__DOT__alu_tempp,11,0); - VL_SIG(VX_decode__DOT__vx_register_file__DOT__registers[32],31,0); - - // LOCAL VARIABLES - // Internals; generally not touched by application code - // Begin mtask footprint all: - VL_SIG8(__Vclklast__TOP__clk,0,0); - - // INTERNAL VARIABLES - // Internals; generally not touched by application code - VVX_decode__Syms* __VlSymsp; // Symbol table - - // PARAMETERS - // Parameters marked /*verilator public*/ for use by application code - - // CONSTRUCTORS - private: - VL_UNCOPYABLE(VVX_decode); ///< Copying not allowed - public: - /// Construct the model; called by application code - /// The special name may be used to make a wrapper with a - /// single model invisible with respect to DPI scope names. - VVX_decode(const char* name="TOP"); - /// Destroy the model; called (often implicitly) by application code - ~VVX_decode(); - - // API METHODS - /// Evaluate the model. Application must call when inputs change. - void eval(); - /// Simulation complete, run final blocks. Application must call on completion. - void final(); - - // INTERNAL METHODS - private: - static void _eval_initial_loop(VVX_decode__Syms* __restrict vlSymsp); - public: - void __Vconfigure(VVX_decode__Syms* symsp, bool first); - private: - static QData _change_request(VVX_decode__Syms* __restrict vlSymsp); - public: - static void _combo__TOP__1(VVX_decode__Syms* __restrict vlSymsp); - static void _combo__TOP__4(VVX_decode__Syms* __restrict vlSymsp); - private: - void _ctor_var_reset(); - public: - static void _eval(VVX_decode__Syms* __restrict vlSymsp); - private: -#ifdef VL_DEBUG - void _eval_debug_assertions(); -#endif // VL_DEBUG - public: - static void _eval_initial(VVX_decode__Syms* __restrict vlSymsp); - static void _eval_settle(VVX_decode__Syms* __restrict vlSymsp); - static void _sequent__TOP__3(VVX_decode__Syms* __restrict vlSymsp); - static void _settle__TOP__2(VVX_decode__Syms* __restrict vlSymsp); -} VL_ATTR_ALIGNED(128); - -#endif // guard diff --git a/rtl/obj_dir/VVX_decode.mk b/rtl/obj_dir/VVX_decode.mk deleted file mode 100644 index 2cf73106..00000000 --- a/rtl/obj_dir/VVX_decode.mk +++ /dev/null @@ -1,53 +0,0 @@ -# Verilated -*- Makefile -*- -# DESCRIPTION: Verilator output: Makefile for building Verilated archive or executable -# -# Execute this makefile from the object directory: -# make -f VVX_decode.mk - -default: VVX_decode__ALL.a - -### Constants... -# Perl executable (from $PERL) -PERL = perl -# Path to Verilator kit (from $VERILATOR_ROOT) -VERILATOR_ROOT = /usr/local/Cellar/verilator/4.010/share/verilator -# SystemC include directory with systemc.h (from $SYSTEMC_INCLUDE) -SYSTEMC_INCLUDE ?= -# SystemC library directory with libsystemc.a (from $SYSTEMC_LIBDIR) -SYSTEMC_LIBDIR ?= - -### Switches... -# SystemC output mode? 0/1 (from --sc) -VM_SC = 0 -# Legacy or SystemC output mode? 0/1 (from --sc) -VM_SP_OR_SC = $(VM_SC) -# Deprecated -VM_PCLI = 1 -# Deprecated: SystemC architecture to find link library path (from $SYSTEMC_ARCH) -VM_SC_TARGET_ARCH = linux - -### Vars... -# Design prefix (from --prefix) -VM_PREFIX = VVX_decode -# Module prefix (from --prefix) -VM_MODPREFIX = VVX_decode -# User CFLAGS (from -CFLAGS on Verilator command line) -VM_USER_CFLAGS = \ - -# User LDLIBS (from -LDFLAGS on Verilator command line) -VM_USER_LDLIBS = \ - -# User .cpp files (from .cpp's on Verilator command line) -VM_USER_CLASSES = \ - -# User .cpp directories (from .cpp's on Verilator command line) -VM_USER_DIR = \ - - -### Default rules... -# Include list of all generated classes -include VVX_decode_classes.mk -# Include global rules -include $(VERILATOR_ROOT)/include/verilated.mk - -# Verilated -*- Makefile -*- diff --git a/rtl/obj_dir/VVX_decode__Syms.cpp b/rtl/obj_dir/VVX_decode__Syms.cpp deleted file mode 100644 index e53318ee..00000000 --- a/rtl/obj_dir/VVX_decode__Syms.cpp +++ /dev/null @@ -1,19 +0,0 @@ -// Verilated -*- C++ -*- -// DESCRIPTION: Verilator output: Symbol table implementation internals - -#include "VVX_decode__Syms.h" -#include "VVX_decode.h" - -// FUNCTIONS -VVX_decode__Syms::VVX_decode__Syms(VVX_decode* topp, const char* namep) - // Setup locals - : __Vm_namep(namep) - , __Vm_didInit(false) - // Setup submodule names -{ - // Pointer to top level - TOPp = topp; - // Setup each module's pointers to their submodules - // Setup each module's pointer back to symbol table (for public functions) - TOPp->__Vconfigure(this, true); -} diff --git a/rtl/obj_dir/VVX_decode__Syms.h b/rtl/obj_dir/VVX_decode__Syms.h deleted file mode 100644 index cc253e91..00000000 --- a/rtl/obj_dir/VVX_decode__Syms.h +++ /dev/null @@ -1,34 +0,0 @@ -// Verilated -*- C++ -*- -// DESCRIPTION: Verilator output: Symbol table internal header -// -// Internal details; most calling programs do not need this header - -#ifndef _VVX_decode__Syms_H_ -#define _VVX_decode__Syms_H_ - -#include "verilated.h" - -// INCLUDE MODULE CLASSES -#include "VVX_decode.h" - -// SYMS CLASS -class VVX_decode__Syms : public VerilatedSyms { - public: - - // LOCAL STATE - const char* __Vm_namep; - bool __Vm_didInit; - - // SUBCELL STATE - VVX_decode* TOPp; - - // CREATORS - VVX_decode__Syms(VVX_decode* topp, const char* namep); - ~VVX_decode__Syms() {} - - // METHODS - inline const char* name() { return __Vm_namep; } - -} VL_ATTR_ALIGNED(64); - -#endif // guard diff --git a/rtl/obj_dir/VVX_decode__ver.d b/rtl/obj_dir/VVX_decode__ver.d deleted file mode 100644 index 74c6bceb..00000000 --- a/rtl/obj_dir/VVX_decode__ver.d +++ /dev/null @@ -1 +0,0 @@ -obj_dir/VVX_decode.cpp obj_dir/VVX_decode.h obj_dir/VVX_decode.mk obj_dir/VVX_decode__Syms.cpp obj_dir/VVX_decode__Syms.h obj_dir/VVX_decode__ver.d obj_dir/VVX_decode_classes.mk : /usr/local/Cellar/verilator/4.010/bin/verilator_bin /usr/local/Cellar/verilator/4.010/bin/verilator_bin VX_decode.v VX_register_file.v diff --git a/rtl/obj_dir/VVX_decode__verFiles.dat b/rtl/obj_dir/VVX_decode__verFiles.dat deleted file mode 100644 index ebf887f0..00000000 --- a/rtl/obj_dir/VVX_decode__verFiles.dat +++ /dev/null @@ -1,13 +0,0 @@ -# DESCRIPTION: Verilator output: Timestamp data for --skip-identical. Delete at will. -C "-Wall -cc VX_decode.v VX_register_file.v" -S 4608404 12889046060 1553037052 0 1548678579 0 "/usr/local/Cellar/verilator/4.010/bin/verilator_bin" -S 9277 12889063385 1553149232 0 1553149232 0 "VX_decode.v" -S 726 12889070228 1553138880 0 1553138880 0 "VX_register_file.v" -T 30372 12889070221 1553149234 0 1553149234 0 "obj_dir/VVX_decode.cpp" -T 3820 12889070220 1553149234 0 1553149234 0 "obj_dir/VVX_decode.h" -T 1476 12889070223 1553149234 0 1553149234 0 "obj_dir/VVX_decode.mk" -T 545 12889070219 1553149234 0 1553149234 0 "obj_dir/VVX_decode__Syms.cpp" -T 732 12889070218 1553149234 0 1553149234 0 "obj_dir/VVX_decode__Syms.h" -T 319 12889070301 1553149234 0 1553149234 0 "obj_dir/VVX_decode__ver.d" -T 0 0 1553149234 0 1553149234 0 "obj_dir/VVX_decode__verFiles.dat" -T 1168 12889070222 1553149234 0 1553149234 0 "obj_dir/VVX_decode_classes.mk" diff --git a/rtl/obj_dir/VVX_decode_classes.mk b/rtl/obj_dir/VVX_decode_classes.mk deleted file mode 100644 index d4f4e2bf..00000000 --- a/rtl/obj_dir/VVX_decode_classes.mk +++ /dev/null @@ -1,38 +0,0 @@ -# Verilated -*- Makefile -*- -# DESCRIPTION: Verilator output: Make include file with class lists -# -# This file lists generated Verilated files, for including in higher level makefiles. -# See VVX_decode.mk for the caller. - -### Switches... -# Coverage output mode? 0/1 (from --coverage) -VM_COVERAGE = 0 -# Threaded output mode? 0/1/N threads (from --threads) -VM_THREADS = 0 -# Tracing output mode? 0/1 (from --trace) -VM_TRACE = 0 - -### Object file lists... -# Generated module classes, fast-path, compile with highest optimization -VM_CLASSES_FAST += \ - VVX_decode \ - -# Generated module classes, non-fast-path, compile with low/medium optimization -VM_CLASSES_SLOW += \ - -# Generated support classes, fast-path, compile with highest optimization -VM_SUPPORT_FAST += \ - -# Generated support classes, non-fast-path, compile with low/medium optimization -VM_SUPPORT_SLOW += \ - VVX_decode__Syms \ - -# Global classes, need linked once per executable, fast-path, compile with highest optimization -VM_GLOBAL_FAST += \ - verilated \ - -# Global classes, need linked once per executable, non-fast-path, compile with low/medium optimization -VM_GLOBAL_SLOW += \ - - -# Verilated -*- Makefile -*- diff --git a/rtl/obj_dir/VVX_register_file.cpp b/rtl/obj_dir/VVX_register_file.cpp deleted file mode 100644 index 917863e8..00000000 --- a/rtl/obj_dir/VVX_register_file.cpp +++ /dev/null @@ -1,200 +0,0 @@ -// Verilated -*- C++ -*- -// DESCRIPTION: Verilator output: Design implementation internals -// See VVX_register_file.h for the primary calling header - -#include "VVX_register_file.h" -#include "VVX_register_file__Syms.h" - - -//-------------------- -// STATIC VARIABLES - - -//-------------------- - -VL_CTOR_IMP(VVX_register_file) { - VVX_register_file__Syms* __restrict vlSymsp = __VlSymsp = new VVX_register_file__Syms(this, name()); - VVX_register_file* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; - // Reset internal values - - // Reset structure values - _ctor_var_reset(); -} - -void VVX_register_file::__Vconfigure(VVX_register_file__Syms* vlSymsp, bool first) { - if (0 && first) {} // Prevent unused - this->__VlSymsp = vlSymsp; -} - -VVX_register_file::~VVX_register_file() { - delete __VlSymsp; __VlSymsp=NULL; -} - -//-------------------- - - -void VVX_register_file::eval() { - VL_DEBUG_IF(VL_DBG_MSGF("+++++TOP Evaluate VVX_register_file::eval\n"); ); - VVX_register_file__Syms* __restrict vlSymsp = this->__VlSymsp; // Setup global symbol table - VVX_register_file* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; -#ifdef VL_DEBUG - // Debug assertions - _eval_debug_assertions(); -#endif // VL_DEBUG - // Initialize - if (VL_UNLIKELY(!vlSymsp->__Vm_didInit)) _eval_initial_loop(vlSymsp); - // Evaluate till stable - int __VclockLoop = 0; - QData __Vchange = 1; - do { - VL_DEBUG_IF(VL_DBG_MSGF("+ Clock loop\n");); - _eval(vlSymsp); - if (VL_UNLIKELY(++__VclockLoop > 100)) { - // About to fail, so enable debug to see what's not settling. - // Note you must run make with OPT=-DVL_DEBUG for debug prints. - int __Vsaved_debug = Verilated::debug(); - Verilated::debug(1); - __Vchange = _change_request(vlSymsp); - Verilated::debug(__Vsaved_debug); - VL_FATAL_MT(__FILE__,__LINE__,__FILE__,"Verilated model didn't converge"); - } else { - __Vchange = _change_request(vlSymsp); - } - } while (VL_UNLIKELY(__Vchange)); -} - -void VVX_register_file::_eval_initial_loop(VVX_register_file__Syms* __restrict vlSymsp) { - vlSymsp->__Vm_didInit = true; - _eval_initial(vlSymsp); - // Evaluate till stable - int __VclockLoop = 0; - QData __Vchange = 1; - do { - _eval_settle(vlSymsp); - _eval(vlSymsp); - if (VL_UNLIKELY(++__VclockLoop > 100)) { - // About to fail, so enable debug to see what's not settling. - // Note you must run make with OPT=-DVL_DEBUG for debug prints. - int __Vsaved_debug = Verilated::debug(); - Verilated::debug(1); - __Vchange = _change_request(vlSymsp); - Verilated::debug(__Vsaved_debug); - VL_FATAL_MT(__FILE__,__LINE__,__FILE__,"Verilated model didn't DC converge"); - } else { - __Vchange = _change_request(vlSymsp); - } - } while (VL_UNLIKELY(__Vchange)); -} - -//-------------------- -// Internal Methods - -VL_INLINE_OPT void VVX_register_file::_sequent__TOP__1(VVX_register_file__Syms* __restrict vlSymsp) { - VL_DEBUG_IF(VL_DBG_MSGF("+ VVX_register_file::_sequent__TOP__1\n"); ); - VVX_register_file* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; - // Variables - // Begin mtask footprint all: - VL_SIG8(__Vdlyvdim0__VX_register_file__DOT__registers__v0,4,0); - VL_SIG8(__Vdlyvset__VX_register_file__DOT__registers__v0,0,0); - VL_SIG(__Vdlyvval__VX_register_file__DOT__registers__v0,31,0); - // Body - __Vdlyvset__VX_register_file__DOT__registers__v0 = 0U; - // ALWAYS at VX_register_file.v:30 - if (((IData)(vlTOPp->in_write_register) & (0U != (IData)(vlTOPp->in_rd)))) { - __Vdlyvval__VX_register_file__DOT__registers__v0 - = vlTOPp->in_data; - __Vdlyvset__VX_register_file__DOT__registers__v0 = 1U; - __Vdlyvdim0__VX_register_file__DOT__registers__v0 - = vlTOPp->in_rd; - } - // ALWAYSPOST at VX_register_file.v:32 - if (__Vdlyvset__VX_register_file__DOT__registers__v0) { - vlTOPp->VX_register_file__DOT__registers[__Vdlyvdim0__VX_register_file__DOT__registers__v0] - = __Vdlyvval__VX_register_file__DOT__registers__v0; - } -} - -VL_INLINE_OPT void VVX_register_file::_settle__TOP__2(VVX_register_file__Syms* __restrict vlSymsp) { - VL_DEBUG_IF(VL_DBG_MSGF("+ VVX_register_file::_settle__TOP__2\n"); ); - VVX_register_file* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; - // Body - vlTOPp->out_src1_data = vlTOPp->VX_register_file__DOT__registers - [vlTOPp->in_src1]; - vlTOPp->out_src2_data = vlTOPp->VX_register_file__DOT__registers - [vlTOPp->in_src2]; -} - -void VVX_register_file::_eval(VVX_register_file__Syms* __restrict vlSymsp) { - VL_DEBUG_IF(VL_DBG_MSGF("+ VVX_register_file::_eval\n"); ); - VVX_register_file* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; - // Body - if (((IData)(vlTOPp->clk) & (~ (IData)(vlTOPp->__Vclklast__TOP__clk)))) { - vlTOPp->_sequent__TOP__1(vlSymsp); - } - vlTOPp->_settle__TOP__2(vlSymsp); - // Final - vlTOPp->__Vclklast__TOP__clk = vlTOPp->clk; -} - -void VVX_register_file::_eval_initial(VVX_register_file__Syms* __restrict vlSymsp) { - VL_DEBUG_IF(VL_DBG_MSGF("+ VVX_register_file::_eval_initial\n"); ); - VVX_register_file* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; - // Body - vlTOPp->__Vclklast__TOP__clk = vlTOPp->clk; -} - -void VVX_register_file::final() { - VL_DEBUG_IF(VL_DBG_MSGF("+ VVX_register_file::final\n"); ); - // Variables - VVX_register_file__Syms* __restrict vlSymsp = this->__VlSymsp; - VVX_register_file* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; -} - -void VVX_register_file::_eval_settle(VVX_register_file__Syms* __restrict vlSymsp) { - VL_DEBUG_IF(VL_DBG_MSGF("+ VVX_register_file::_eval_settle\n"); ); - VVX_register_file* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; - // Body - vlTOPp->_settle__TOP__2(vlSymsp); -} - -VL_INLINE_OPT QData VVX_register_file::_change_request(VVX_register_file__Syms* __restrict vlSymsp) { - VL_DEBUG_IF(VL_DBG_MSGF("+ VVX_register_file::_change_request\n"); ); - VVX_register_file* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; - // Body - // Change detection - QData __req = false; // Logically a bool - return __req; -} - -#ifdef VL_DEBUG -void VVX_register_file::_eval_debug_assertions() { - VL_DEBUG_IF(VL_DBG_MSGF("+ VVX_register_file::_eval_debug_assertions\n"); ); - // Body - if (VL_UNLIKELY((clk & 0xfeU))) { - Verilated::overWidthError("clk");} - if (VL_UNLIKELY((in_write_register & 0xfeU))) { - Verilated::overWidthError("in_write_register");} - if (VL_UNLIKELY((in_rd & 0xe0U))) { - Verilated::overWidthError("in_rd");} - if (VL_UNLIKELY((in_src1 & 0xe0U))) { - Verilated::overWidthError("in_src1");} - if (VL_UNLIKELY((in_src2 & 0xe0U))) { - Verilated::overWidthError("in_src2");} -} -#endif // VL_DEBUG - -void VVX_register_file::_ctor_var_reset() { - VL_DEBUG_IF(VL_DBG_MSGF("+ VVX_register_file::_ctor_var_reset\n"); ); - // Body - clk = VL_RAND_RESET_I(1); - in_write_register = VL_RAND_RESET_I(1); - in_rd = VL_RAND_RESET_I(5); - in_data = VL_RAND_RESET_I(32); - in_src1 = VL_RAND_RESET_I(5); - in_src2 = VL_RAND_RESET_I(5); - out_src1_data = VL_RAND_RESET_I(32); - out_src2_data = VL_RAND_RESET_I(32); - { int __Vi0=0; for (; __Vi0<32; ++__Vi0) { - VX_register_file__DOT__registers[__Vi0] = VL_RAND_RESET_I(32); - }} -} diff --git a/rtl/obj_dir/VVX_register_file.h b/rtl/obj_dir/VVX_register_file.h deleted file mode 100644 index 4a73c470..00000000 --- a/rtl/obj_dir/VVX_register_file.h +++ /dev/null @@ -1,88 +0,0 @@ -// Verilated -*- C++ -*- -// DESCRIPTION: Verilator output: Primary design header -// -// This header should be included by all source files instantiating the design. -// The class here is then constructed to instantiate the design. -// See the Verilator manual for examples. - -#ifndef _VVX_register_file_H_ -#define _VVX_register_file_H_ - -#include "verilated.h" - -class VVX_register_file__Syms; - -//---------- - -VL_MODULE(VVX_register_file) { - public: - - // PORTS - // The application code writes and reads these signals to - // propagate new values into/out from the Verilated model. - // Begin mtask footprint all: - VL_IN8(clk,0,0); - VL_IN8(in_write_register,0,0); - VL_IN8(in_rd,4,0); - VL_IN8(in_src1,4,0); - VL_IN8(in_src2,4,0); - VL_IN(in_data,31,0); - VL_OUT(out_src1_data,31,0); - VL_OUT(out_src2_data,31,0); - - // LOCAL SIGNALS - // Internals; generally not touched by application code - // Begin mtask footprint all: - VL_SIG(VX_register_file__DOT__registers[32],31,0); - - // LOCAL VARIABLES - // Internals; generally not touched by application code - // Begin mtask footprint all: - VL_SIG8(__Vclklast__TOP__clk,0,0); - - // INTERNAL VARIABLES - // Internals; generally not touched by application code - VVX_register_file__Syms* __VlSymsp; // Symbol table - - // PARAMETERS - // Parameters marked /*verilator public*/ for use by application code - - // CONSTRUCTORS - private: - VL_UNCOPYABLE(VVX_register_file); ///< Copying not allowed - public: - /// Construct the model; called by application code - /// The special name may be used to make a wrapper with a - /// single model invisible with respect to DPI scope names. - VVX_register_file(const char* name="TOP"); - /// Destroy the model; called (often implicitly) by application code - ~VVX_register_file(); - - // API METHODS - /// Evaluate the model. Application must call when inputs change. - void eval(); - /// Simulation complete, run final blocks. Application must call on completion. - void final(); - - // INTERNAL METHODS - private: - static void _eval_initial_loop(VVX_register_file__Syms* __restrict vlSymsp); - public: - void __Vconfigure(VVX_register_file__Syms* symsp, bool first); - private: - static QData _change_request(VVX_register_file__Syms* __restrict vlSymsp); - void _ctor_var_reset(); - public: - static void _eval(VVX_register_file__Syms* __restrict vlSymsp); - private: -#ifdef VL_DEBUG - void _eval_debug_assertions(); -#endif // VL_DEBUG - public: - static void _eval_initial(VVX_register_file__Syms* __restrict vlSymsp); - static void _eval_settle(VVX_register_file__Syms* __restrict vlSymsp); - static void _sequent__TOP__1(VVX_register_file__Syms* __restrict vlSymsp); - static void _settle__TOP__2(VVX_register_file__Syms* __restrict vlSymsp); -} VL_ATTR_ALIGNED(128); - -#endif // guard diff --git a/rtl/obj_dir/VVX_register_file.mk b/rtl/obj_dir/VVX_register_file.mk deleted file mode 100644 index 9582c9dd..00000000 --- a/rtl/obj_dir/VVX_register_file.mk +++ /dev/null @@ -1,53 +0,0 @@ -# Verilated -*- Makefile -*- -# DESCRIPTION: Verilator output: Makefile for building Verilated archive or executable -# -# Execute this makefile from the object directory: -# make -f VVX_register_file.mk - -default: VVX_register_file__ALL.a - -### Constants... -# Perl executable (from $PERL) -PERL = perl -# Path to Verilator kit (from $VERILATOR_ROOT) -VERILATOR_ROOT = /usr/local/Cellar/verilator/4.010/share/verilator -# SystemC include directory with systemc.h (from $SYSTEMC_INCLUDE) -SYSTEMC_INCLUDE ?= -# SystemC library directory with libsystemc.a (from $SYSTEMC_LIBDIR) -SYSTEMC_LIBDIR ?= - -### Switches... -# SystemC output mode? 0/1 (from --sc) -VM_SC = 0 -# Legacy or SystemC output mode? 0/1 (from --sc) -VM_SP_OR_SC = $(VM_SC) -# Deprecated -VM_PCLI = 1 -# Deprecated: SystemC architecture to find link library path (from $SYSTEMC_ARCH) -VM_SC_TARGET_ARCH = linux - -### Vars... -# Design prefix (from --prefix) -VM_PREFIX = VVX_register_file -# Module prefix (from --prefix) -VM_MODPREFIX = VVX_register_file -# User CFLAGS (from -CFLAGS on Verilator command line) -VM_USER_CFLAGS = \ - -# User LDLIBS (from -LDFLAGS on Verilator command line) -VM_USER_LDLIBS = \ - -# User .cpp files (from .cpp's on Verilator command line) -VM_USER_CLASSES = \ - -# User .cpp directories (from .cpp's on Verilator command line) -VM_USER_DIR = \ - - -### Default rules... -# Include list of all generated classes -include VVX_register_file_classes.mk -# Include global rules -include $(VERILATOR_ROOT)/include/verilated.mk - -# Verilated -*- Makefile -*- diff --git a/rtl/obj_dir/VVX_register_file__Syms.cpp b/rtl/obj_dir/VVX_register_file__Syms.cpp deleted file mode 100644 index 7e308ad4..00000000 --- a/rtl/obj_dir/VVX_register_file__Syms.cpp +++ /dev/null @@ -1,19 +0,0 @@ -// Verilated -*- C++ -*- -// DESCRIPTION: Verilator output: Symbol table implementation internals - -#include "VVX_register_file__Syms.h" -#include "VVX_register_file.h" - -// FUNCTIONS -VVX_register_file__Syms::VVX_register_file__Syms(VVX_register_file* topp, const char* namep) - // Setup locals - : __Vm_namep(namep) - , __Vm_didInit(false) - // Setup submodule names -{ - // Pointer to top level - TOPp = topp; - // Setup each module's pointers to their submodules - // Setup each module's pointer back to symbol table (for public functions) - TOPp->__Vconfigure(this, true); -} diff --git a/rtl/obj_dir/VVX_register_file__Syms.h b/rtl/obj_dir/VVX_register_file__Syms.h deleted file mode 100644 index 5a894634..00000000 --- a/rtl/obj_dir/VVX_register_file__Syms.h +++ /dev/null @@ -1,34 +0,0 @@ -// Verilated -*- C++ -*- -// DESCRIPTION: Verilator output: Symbol table internal header -// -// Internal details; most calling programs do not need this header - -#ifndef _VVX_register_file__Syms_H_ -#define _VVX_register_file__Syms_H_ - -#include "verilated.h" - -// INCLUDE MODULE CLASSES -#include "VVX_register_file.h" - -// SYMS CLASS -class VVX_register_file__Syms : public VerilatedSyms { - public: - - // LOCAL STATE - const char* __Vm_namep; - bool __Vm_didInit; - - // SUBCELL STATE - VVX_register_file* TOPp; - - // CREATORS - VVX_register_file__Syms(VVX_register_file* topp, const char* namep); - ~VVX_register_file__Syms() {} - - // METHODS - inline const char* name() { return __Vm_namep; } - -} VL_ATTR_ALIGNED(64); - -#endif // guard diff --git a/rtl/obj_dir/VVX_register_file__ver.d b/rtl/obj_dir/VVX_register_file__ver.d deleted file mode 100644 index 22986176..00000000 --- a/rtl/obj_dir/VVX_register_file__ver.d +++ /dev/null @@ -1 +0,0 @@ -obj_dir/VVX_register_file.cpp obj_dir/VVX_register_file.h obj_dir/VVX_register_file.mk obj_dir/VVX_register_file__Syms.cpp obj_dir/VVX_register_file__Syms.h obj_dir/VVX_register_file__ver.d obj_dir/VVX_register_file_classes.mk : /usr/local/Cellar/verilator/4.010/bin/verilator_bin /usr/local/Cellar/verilator/4.010/bin/verilator_bin VX_register_file.v diff --git a/rtl/obj_dir/VVX_register_file__verFiles.dat b/rtl/obj_dir/VVX_register_file__verFiles.dat deleted file mode 100644 index cf49288e..00000000 --- a/rtl/obj_dir/VVX_register_file__verFiles.dat +++ /dev/null @@ -1,12 +0,0 @@ -# DESCRIPTION: Verilator output: Timestamp data for --skip-identical. Delete at will. -C "-Wall -cc VX_register_file.v" -S 4608404 12889046060 1553037052 0 1548678579 0 "/usr/local/Cellar/verilator/4.010/bin/verilator_bin" -S 726 12889070228 1553138880 0 1553138880 0 "VX_register_file.v" -T 7234 12889070262 1553138884 0 1553138884 0 "obj_dir/VVX_register_file.cpp" -T 2914 12889070261 1553138884 0 1553138884 0 "obj_dir/VVX_register_file.h" -T 1511 12889070264 1553138884 0 1553138884 0 "obj_dir/VVX_register_file.mk" -T 580 12889070260 1553138884 0 1553138884 0 "obj_dir/VVX_register_file__Syms.cpp" -T 781 12889070259 1553138884 0 1553138884 0 "obj_dir/VVX_register_file__Syms.h" -T 356 12889070265 1553138884 0 1553138884 0 "obj_dir/VVX_register_file__ver.d" -T 0 0 1553138884 0 1553138884 0 "obj_dir/VVX_register_file__verFiles.dat" -T 1189 12889070263 1553138884 0 1553138884 0 "obj_dir/VVX_register_file_classes.mk" diff --git a/rtl/obj_dir/VVX_register_file_classes.mk b/rtl/obj_dir/VVX_register_file_classes.mk deleted file mode 100644 index b22b228d..00000000 --- a/rtl/obj_dir/VVX_register_file_classes.mk +++ /dev/null @@ -1,38 +0,0 @@ -# Verilated -*- Makefile -*- -# DESCRIPTION: Verilator output: Make include file with class lists -# -# This file lists generated Verilated files, for including in higher level makefiles. -# See VVX_register_file.mk for the caller. - -### Switches... -# Coverage output mode? 0/1 (from --coverage) -VM_COVERAGE = 0 -# Threaded output mode? 0/1/N threads (from --threads) -VM_THREADS = 0 -# Tracing output mode? 0/1 (from --trace) -VM_TRACE = 0 - -### Object file lists... -# Generated module classes, fast-path, compile with highest optimization -VM_CLASSES_FAST += \ - VVX_register_file \ - -# Generated module classes, non-fast-path, compile with low/medium optimization -VM_CLASSES_SLOW += \ - -# Generated support classes, fast-path, compile with highest optimization -VM_SUPPORT_FAST += \ - -# Generated support classes, non-fast-path, compile with low/medium optimization -VM_SUPPORT_SLOW += \ - VVX_register_file__Syms \ - -# Global classes, need linked once per executable, fast-path, compile with highest optimization -VM_GLOBAL_FAST += \ - verilated \ - -# Global classes, need linked once per executable, non-fast-path, compile with low/medium optimization -VM_GLOBAL_SLOW += \ - - -# Verilated -*- Makefile -*- diff --git a/rtl/obj_dir/Vvortex b/rtl/obj_dir/Vvortex index ddd33aa946ea41843a910072a33af3c9cef5d672..1be666cae18ee92db82d277d0ab9dccd95cec4f1 100755 GIT binary patch delta 111785 zcmb4s2|!%c_4h2G!~_RTVsME;jVA6yr6tBF(TqN9P}HLMcPZ8_TD7>u;(|jQrq0Xr zDfT&nty-+LMXMEyqqs~YQ32zInnvmtY-4>>qv95E<@=rAc{9vJ`~AN!I-GaTJ@?#m z&fU(t@4oxij+MBn>22n=RRzAhe^muH{jOr$hLF$a2mL3X1ew|py6K;XPQA}xK z4{+x||H7#qTPVFtnSH>WsDI(~s;!hhdzKa@d z_Z8>D;653~J}-O84=}EEQo+4W(CiJ)yuvw7RiMCmqF|?B?SBfKHwyN3 zMu4AMIDLmv&+ZaWM6K44yS3l33U@vgXc>wx1MGm`dg}^&V|&0$R~PsOr}%tLCeruu z`2yf6#n0$1@O1*IN*DOLmic^>L94}2{smEj{AS^|D|oJvnkh8?S>Rjg?7qc(i)*HLBnx~^$g?NpNL`emoXSU5)dhDea%v|P z{Guv877u?NTG{+{bbL|hdTBMGmEo_WV@HN=+%|)_i=us7nc;8JKgv+X&dB9GCztmO zk9VsKuUn3+R`?s|#wn$dGQ(^hGnaif5FSOkZy>x;fEC`jApBVjn2!>k>bHKg+Gbm-o8igU665tEP4x@yH!~20x6?Qv5 z1)p8<{tS?iEvjfgdIxkIGt6b9(0^>aZWO{wA!Xhs!%B%G+-paJ5#PK`162i=mQ;P5 zpy$qZ{~wLM|B( zjSl#BE9>))tD-=(QP}CX_#dGVc|09e%4!`vQ`u+>=0bT8*0F+Nt$WZh~Mlp zR~!D94f7@U)33+J7sdNnnb0;VSr*4*U!Y)j&WAzY;uXAJ9QTTp-b(4|E5VtL9494< zV=~^1_Dzyzd>iDh8i5Josr26eh3j&1m3Uk-FVQy>f9CbYR~c49t1b{7+bV8vqEBQH zjHWJ#K)NrK=!?gMyn=tb{Gk{{VVurU%a4{IaO%~i2D!p6xwDif4a=y?vDg8fXGNHJ$xYi8CcN_ zo89HjpUEg6ik=CA75>bG59(YaddM0SbVwe}nzF`-eu-Q)BcWDtN-uj%KO~O0XQRA{ z>;naBknXj<@Mj!%Kbw?pqsC8{$+$jWweiLr!;-NFV=`1ionj~&asRVX`ZREB*@$7T zcGr9W9AkES`Lq5RyGaOvL9|jtnmQg^ie*OUWc!pE{$1Ps)BHQ_%|87@12FQIK}2>O zE*oz@ZJJ*PVi^L{OJD~_UFW4w_AQUDLfzK17#4nJO&k!zzAcR4A>d%Y3_l@`AhviTE z{O#S_24+OsL_xE;7p}r@OT(&y2fsA@tE8g(!|S)A|LpJ(n7ZlPaF=_|f5f+#m&`Ey zD?YBcdrpDRJw)i3x7c)6gxABsPRPNG{{`9w8qWcSb$KNw|1Zqu+YIxy#a1K?xU6ll ziFQ!eHvURHd}De)sAQtghX>7?rwzM#$bAMnYjd=k2i@PhL0@Pxb*XD{D-ec}sZ$KI zn!8toZw##*b(^Upj51?Q@P~Wp1l~x0j=>9U5tM~lJTz;uH-kqvmcvqs7$9rRTK3th z52u-%OicHO42YwKLosn#uS7Q(J?@o4;e~(F~vxzjLS zN)H@1(Az-S9Zk~*TEF4{*f0m3vYFFPM~qUgjo+IQ2sA`-Eew$JHuXw?h=JE)+%j-o zQ44VVGX}0JY2lTx|GH9K`TMWiUVyQDpbQWl%6amRGRF<=v5Oa>EHPj5Vv;2q6u2{3 zO?GMf&t~{%L>R81iF80~ggkYffM_yx=mGedb!`LT>!rkK^Yy_{bQZ4Qo;IuIdRRVC zFeFJp(67vz>(j5nJ6FXr7|qPr&~UZS+C^-y3F*)7O=$cX z8`;4JTH@jb{B!U8xAXv8$mVi(Y-{=lyG`hBrBu?7)r9s=Kbk*`E^^0OFx)mn2K!yF zS@TeO-(1YF3KJqI+6NmvDgEy2D37{i6r%V-^~`|#>3dmK!@X9`Loi6f1k?Tuf75bv zVMJuGPH@WE4!2erIpwfmpr!FzsDOV1Etla6B+#0&w5zjME!nHq>{UE_b$#}#Eqiry z<|@+Ck-2QSEqm4JT|L^e3q11Dqb*Rve9^rW_P~Y_(O&ez5G&URiLagv-&iSPW^5Ql z*SIBXytYNl7P?`^eGuohOgmC>B(gqMBGNFLJn?QO)AFaKlb-ez$`GHS*ecj>(RHRR zu@9#fsV)tnl(s7bsn#!UmgK4D-p)3Xl9uJ}F7=;Vft)McXEx+lD@Os>gg$w^qLBOK zKeJlGC2b9cpVMU_duq)@Rl|fo6}(FQh%9 zkM~)1Pej*1z_M<`?00LSlSC__R%w?=?=~#3RipnPQ+RkFycTpx7`B$J6<=N^zFhD_ z%raPGoD=2-*Q(oq{9|Sv#(Ufc)|O4i6$0#a?m-X$m1{-iD!sk)CI^`r46DK{ldgs6 zr2)oyEh0Q(WZVCj(D|0hf$5PvCX6I#qVVOS2yg+ib7~s3;z0Q-4ZF^EST*+ zhiu>X=#CfvkVhvx{`i+@HuQKT*X51S7~>s&=2&)o#84H+EV9aot|~%$FXC-DrQ3Z4 zwTp|cjB#D8g4j{e4>|IyAjhklIW+>WVj`XNiTd@$f8{o>jObp&(w?C)VrQroeGjEH zce=aX>}BX>e?+7pQN>H{00cpe-i#RoZZ%rqgup_blLjKL3om>0=3e(9=}^(98&7*G z8)Yzp%IP>7dRSqUGvGFe!dpX|3HH6z135*%gdm$mY{t10da^DwCG)WR@Y@r*^twx+%Q@%dt$ak@HKH5K47+Y4%17U5 z9_tT(npteYn#)Hk?|<8{u9Kn9GNzd|pP@Z~bHx1slCk)LY8)}FHc2;+o?^vin3qXi zFPb-^-^=n&w0YxrC?ZTW<8kc(e`B(6!1}{oA)V^l*5?;z?-8Vb?6rkQWvS{oU`;N&fc_li$md zCAN#863R0b;JG{WurWFM<(A^?Q0su_7O$^a$L(ZdwMILhbzG^5>Qf~2@Ntu)Utt-j zOmf(DSpFK_eH_=a61EInsJddR|RkZW+rniPpuX=CX~VG`eyf?1=yx#l zaEO+8xdo83jLgU&6f>3zznPZhQ3lk2X827j{3b>r6mb)q?BONpX(&08C;B+(1V>~< z3uC@$$i~byA(~zqmXSDLbP{ELPqODK=rq9{@tM#B?fm=f1)3jZA;>yQliKOKnbUDm3PnUCAb=DV8KZLVs zoogLnF555=9zj{?eH(ULHc}NwWBV)~Uhm%eI{H=3`gjo%R()6mMitT4UY77rJO2kH z420i=9CYC3p=k4)fskD(V#6DD3y;KC!3{yF!R8^eKVI{ayAQ>`lp`J$%w>l+(<>3? zps*^vOKjgcfwk2CwY-A=dwKW$L(KVqDKC3hT9xhB=2*n=rncr0G-`xM!>$7h5Qw(= zBoGC8`9NihSRWp8KY0U5V8e}~yHT#~ibi2WcX&-uVaL6;yBGn(K;d6!6^P$_{e^eQ zl~!@LG~WIri-5{y1lN-=2=)ru-S>JCBK^%{o8;5Qu)2{=*Or3AAFmnEWhbF;D*Ooq zgVrBvEk;4ng@*wz4E??@9`0We?muWe9v)Z`9>^|^{RvDQa1Mfkv;Fb#N9bo5f7X44 zCFW=2YYrmu!%g9j{PDVHLakVj_N@qi7!Na3*XvVoRaOW{f8Gp_eZJwC6?%( zn*>yoPD0YA!cOGH3^NTft-=l<(kdc_H{vQSGtxj|3ohkfdJ-B6mb`7b>4SO?y@o|- z3<|3I4!DRmyZ+G4eVlZ(MQ!%%U<8YLX!E#rUW(;Ls2)2P5Rto}n~3<4SQG&oYJCz< zn+&_~Wke>p=_?Y><*T&T?Iyvnq%XjV5wmQ?N(}3GM9ql*2F71TTe#{wxWKj>gw;;O znIomr*oFpTt)R(@z+#J+xNA4oes$nT+#ROYy1|UL8KvtG# zrn-g8w7bY`6SKBa4PQoX($Cx$9D`&`^a+Sqiek#b-D5BFYKjSpoW#_dE-9LzEmnobhQtp)Qa@B9 zdp;h__&6foupX2p5;$4Nkklu_yVlalGt(q3RpAX3mlA9|LBy`;_=-+8)X7cCk>}*g zK=XVom+)~5033Dow-HfRQ41&&+cfcd!K?%^3>hTKuplKMFUvDiox)|>9b~qNjiEd>i1|LVDOczO-qE1$!v0m}RTJ^(wlj!79xg#{~5&>9S8gJc?N!_B|(ech1R#Bx3O zN$7MecBh0F;@hOe!IxQL-9BFd5HdRZpOj3JVY zF$4hadxFf0VGPlgNUZHJTo;aY^Lp!+a{LldeZ6ooTXoxiC}=C zW5^h@a!uG!*Q?A}9DaznU#TOCaW4zs=%Xc@%gNq@CdB~BT<8$h zByK)yNSs%3-zETrk+v2#w1FIRQN9>gMrFCAhz2hR0utm-KOBHkcHy?NabWYnrBeB1 z0T?}zm}M)bnoa~RYd>cVmTL_fTAJ2i#EV?yiMCgTa)~Oe1wa+*19QdDK{TyF(@qu4 zN)WSRf@uv(3CPOwWDU)%8ARwfWaLyF9w|tz)yNWm-3U?<3Q9-evw#t;C&?LGDqcL9 zUM#)EG2|OX9F5fzfog3|IMRSDIpK&mfeID!>P6mbFN#Bom;8(V5BEV}FGA72 z@w#4A)`zmo!?x$rU3DGkIJvDoe6#u~d^5D|Tx{a893I3hw&d|#T{rOifOiAGkIo2p zz!MaOVMP3eVMG9eOaYM`pCp(-x5Oc<1?I)QHZ0HOAhyM8z$z$KE4Cc=5^Xsiu{F#a z(e5(LHm{hsoc?`38OR>VIx43DO9Et7iTHb75b+fsV>^a4;8)ah)Bj111}&|grKJQL zPY^LeiZ9#%$TmVwr550Rn?CMXCgKymL-Cq9GSFXF@-1x5c5 z|EG(%5L0odq}j1jwYZ#e=qNmiQ;YWjO)Zuy6jljfrVb)25la!%Hkh(lQv|V6f{4W; z*-Wt*Gf~9&1N&IW87m?v$~-K<^D!aN;xf6y19)X5rWTiwq6uoTNOAxAyqHt*w(R19 z#lHt?CD{~!oh{A4u6PBB5lOvPn9)n%kM#T60B)9ycC19*VQ3hb*8moSrtXj{=vE70 zrk0SEh^2^WH!$T?O%cRO2_o)@h-fp#a?C`TuwW7pfDK>-Iqo2x?x-ZAU9OD8)E#q4 z(FApeNOA8}i#K4ql^FaRLCsj%SK|>WNbLIme~5>N@^Tw2t3&$CCHuGnE3@GZWpE_c zh`Pm}*mz(aRm9b}5m_BExfV8t#hplWbbPl(MdqR+UGbR=wxeKjcnGUF`777&$_f!g zVN_-T=(bXTu895D0{$2Ic;eCuIoVBtRkw(`h1+2dtzp4O;W6A*U!)tP%v1}m3~U($ zuoS_@K_G6&fHaqs(TwZAy*obMANv)^ezc&@D_EsVnKRZVz^=F)n`j^>ei8kjB-Kg* z73rM>sSW{_hb6m+r3i2@t{8!t>Lq3qV0BNdF$NYPloKfH8YnB(r%VL6M^~)lqKFiU zXArS+p_s|J1a=vKdy^PtrAV@pLXzD%w}Lvcz>C(yoY6iEKe46ci46;|iyy^aFZ7Ec z!7vFBB#0rNB4=Xc08LcX9#tL!Gcl$Z0dBH?DPoeoUpm)}?-VH_mLR}Awqhd`Dv#q! zd1aRnB#Hps`}=7PNmf!wVoeg%JZqRU&zdq3ZWn+10j()zQPno7R)VN$mkZTQ%w?j7 z*_Ff+1h^YejKEA7#FB$qNW};p(3ghMipIS3^AqyD=aG!mK){tZ+g(TLz3~HV= z%$aA+QW0(!SE)4(EUMZj6_J#nrrku4Xk?;?*)7Bp1ZE^E~Y zjlfKlD@I|ordO@$R%^P%nwd|rZb-6{LK16s2Q{y5m^06sDiLlMPf=?sSyZ)6s+Ay$ zIa8?U4NUYfyPjBrz)UnKMqnnE5=$;sYZ^6;z)UnLMq#w3Q?2PxYudz``KxISNmf!w zV$C8@^Q>XcJZs`2+%7(r`{wKx7FBJNiuDsgu?RwtXk(&>*`34^1X$}(jKEBE6H9ih zHNBcffLmC_D2&#`)tVNyrb(=+TSaR~!c62@a~i05)-Y$DHA5oYE_TvvX@e}P+9uUX z5H;-)p`tf1(Zg()Sc1Szj4DQe@tRn2Os(-gEbi^Q>XcJZnltxLv#s8?I0bB`m7iCKW5Lf|~YRfkIswGu>4yHTj<4NUYfyNOtW084y|5n#L~mW-=4ZJI`4COQNuB1C50q)^8%=O)-Y$DHKQWjF7A}A zSqNfSRJBd2l^|-`zDq=0VvLC%W)}(3N)RAkQH%iNHL+yrC2VPBnnr+#LNN-XH6?0I zky_&uYu`v1Ef>tuty$_93@D&0PeSs(;AYjq>!X;3OBcgIrFS( z5#e_69%@Y!i>kIswGu>4yG^L*4NUYfyMtJQ0P%`q1Q@T0CA-v`ZcQV=<1ED}jMj{( zHN$GnkXW<5T0@eR6p~o83#fT@!<>2642p2O_`D5lX?-lJ+9uUX5XF-Xp`tf1(ZlQ! zVhIAoD~b_dye5_$RcppHjQ|nFr4VMRFj_OH*7T`0y<$zpW2_sJtfY{{nuVa|S;L%p z)|7~FyZA4%4-7F3i>kIswGu?J3Mo|d1}1u#J(pO50P%`q1Q@T0B`Yswzp2tR0z?#w zQ5dc1R%^P{nohCixJPLXNx0GStT`FfJZqRU&zgD>ZWn*ZJ$H63i>kIs#d{@!Vv&s? z(ZECxvm1#e2oSF*Mu72}Sh7W}iEA1G;%mhyjMj9hHEn85T&%gUm)4MEC50q)vkcTc zYnU_7nobdJ7td2`I#^V-O{$e3YTDgGMQ>oDhuOWv5(J1>6eGZRO)NR6)(mMH0U`>; zD2&#$s5MP$O`}+2K0<3qvXVj)Yis2hiMH-R#He} z&HbR}S;L%p)|88IyZABL0EifdMOE9RS_z`2T_sfX1}1u#Z4gTkAYM_70OK{WWW8F` zplJk%C={bGT2rgm7-~(GShFfgYe=$^LK1791vSqa=FGFENrckIswGu?J_90aC1}1u#JxnY?fOthQ0*u$hlCD}a zs%Zp>C={bGT2rRhl&Uo)V$GL5w1y51T)S9thz?$i54M|o~ zNK!X5LCvch=FGFER)pKdPhsOD^fp*jwN0v(Ac|F4p`tf1(ZlSe#1aIER}>?_cug$X zq}H@(8UZ2-#VCx{j8a+KB}j~jHS_+)x*^F*3Q4S)4{Dw@%$a9RhX}WeC#f}UEUMZj z70>4d#l9SZL?;tH%V#z+WW>C`z5K$;bVYFsgtr=2l2F0412WbsS zR#He}O&zFt)-Y$DH6tP%55HuCCt?^DRc(`MC5R#*6e@ZH6FtlxBbFdQymC2M&@=^L zye5_`x|}VoMAHZmQ7A@Xw5Ct3=~ZjG#hUZFX$?tMQb=OW#h~U{!<>26%oX8waoZcT zri?{Z+oW0vqIgguRP+WWdYD~BEJ1*HMKJ=5*Tj;wYE8YS5g@)+jKXM5ms-=Q)^vz9 zu?J`kNmf!wVvP-Io;A#wXHBCBw~JquJ&K57SX8x5s+AyW+ATswZ(yQ_*>PeC0>mqd z5n#L~mh2E~W=1rrQvd=A#VCu$w5c(1HKs+3x%00yh9oN~Br)b5Q1gso&OBp!MYvr& zLyhTXQMN&ntHXSR;>BQeYA!oD=8$g<{eP;tYOYPYYY*N z8)@0|hY*HERokRm38JQ5FI02}CVH6NKrBIka78f!4A;bxjcQGkrV${ZP>jN8jiJ_5 zsWp{i&F6oiH6&R{A&E8Lf|_RybLLsoCc^FFf63-LgfJ|s+9uUX5H;;ip`tS|(ZlR6 zVhI9-D~b_dxF(kDRcrb*jQ|0KViZPe%GH{=YE79~vyECq5+2`p)@;AIHO!f3&9Df! zi|42{LoBM=CKdOGf@0}|ATh#353@&!B?u6%C`N$c8e0hD@l6w3S`o1X0m5s=D2&#W zsx>8QO_5l$@4c)WlJNM(v!(*nyt-k|JZs8CxLtg{?A1dE!=mu`MvEkh$2WqZH<0LI zcBQfqAY4(50K+x0q@mW-Y8n9o3dJal*7($#vGZBTD1cji53L~yk8hZ=+C2``JZqRU z&zhwo+%Ep>-)T()i^Ag@Es`i6-w1}@K%$4)Ey_ZGa78f!4A;bxZE8)2rV${#R*b@E zjZ0Yf|_RybLLsoEyC^MkJr+gE*6EyH(Df7JiZYOy@5mz zvj>%h0O5*a1Q@T0C5P3T5ltgNK%p3g(V8K(W>Br^6Kj_Lnbwem$2XoeCa8JVFlU}M zVK2WJ4G5bkpS&hF-qez=}tALL+t3gn|6?dkjArP z5Y!1f24eMiQYsI;qba$X6SDs)JJ`-7-LMO)4Ev#HI;9vpRVfeO-IW;u-qU--P9kC4 z{btShcs$mQVklnu$KBs$*jF%3HvXRk_D%eYw+~K`%{11+{bVi0t~lnEpwD%s0?b%^ zLR7^epyR=MJOY~gtfseQ(|?1c`D1^H(F=Qe+FYE|hHqNR{%Ueb_aJw^?Eh zz+Cf>UL7D=2x!-uc`%bX_7pToUxe4j<^9Ep;v(beFHt}FM6Yhf-2*am(`&($adGS~ zRAk|cvLs?x1YU-V$nd zH@JrM4t4Rly@J_o>S7YHH#Xzqs!YC#M#(p6bUR4gJ`CxhR&2iatw58(=8JetNGteP zT9a%WK?C|k78UG@gJFexAN+vw%kxBIgE=_m6&GHlx51{TOj0@>xw}s zVaJ>jgn$y5hprHQb%p14-I%oMNw0q>)k@8lj_-bPNA{KBM4!lBk;0$n;Oo$2Z0&No zx0+G(`H6lW3eZ05O8?Br4;?Es3zlF%mv^j?cP;Q>yY^GI3hoeT64XvKGNbo8h6lDq zh_RIPZ$p(l)_5tiZw!U{tL zaDt*&hjQ{(`x(ppv!+_u6z#pmU`sOcJNG@Y;|^Qlltg)-0aYCygMEoFl?v}`X~5!iX_hi^l}J%T#L%D-#BrqjQD`-f8lTejaZ&A;V&ERVb8 z&2Sv8G>$gk2H0lEd;3yCN>bhXAq6v&3YLjRF2($qyr!CIasyROl8LXE!@er;2yWQ1 z^7ccY#7oSB#z44_BrA-mj>8=WF${S!?1?fpy}0Z{(uiT1Wig7B+E#ukZvt#HeDZRKpd zp1iCr{%gsxBK&80UwCK*vDtnc5z)7J{_0R`lxH_d%fclM0G>xU67{h96aM!SoYT$-N zRsG9pNZOl4+Q9GSYie}woM2qqznt?;+K1zlJ!5c=9Il-^=WbWjC&iknruKP<_@_n0 zXgN5{T-E_M3zJk)+=DHI7Sed^>ouq%IR^F`RFO1?Ysxh157dws)R@2wSHA-jZn;jAJ=0+6nw zvUGmMWwfK+$dNIRVb#43IjHQN>Gp_VI46J*Z=;znjUQib#-1jVP2T7gO*mHQAn-?1LidGkltZ52bx|L) z>GpzIp5P*hI*u!6l!24CNo&@~Wqkz4+u{!^p4USg31TV`VU_V@qUm9$@^V#-@YaF{1YU}7H#@JMD*69oI)gcCE70Nkrx>IC&bp8sN@1dS3H0(ce*1r`bg z+DLc;11klyh^c`~AzutU0tdf~h02f+a>l}=Ip29LtEtKT{5Lp2TBZdYQEBt#;73~o zdvS@)!%LUgd_8;KvnaNnrN?SnY)r5v*dC_DrGj~P7Fbo2*TAbythS{Zs1x2{N!H^E za&d1#eG;`yd1VRKTS8?n5coJyi2W zLnPvtk&5UAG zGA~Fo6AaA^K%3bpN|0vuPMfwerYD4&X=R5+VB5S`-~?)8H8r6%76~7^2icPf9+oO~ z&x4>J9Ns)db(Y}C)W|H#2nC8t41qQ#6F(Gf&@{m!s;TQ~I$t$a2EB3ghBrC9y_fBO zwT`N*a7)>wf>hy@A=35G@M`m89xKb6&LxQSy&Fq(9xQI5F!!k&>5~ZUUcO2jsot^5 zBLHbT^hx?!z@MeCa1}M+81eGoo}3W~SVEavPMZ z^Q3fB_jy}%t(e5ZrhhWXF^DfQyQRXZqOAD!P%8RP2~JxKwSGngwG1=XEk#)#s47RB zVd2OlpGxW;NVSr3Iln*G zVEA)9{Xzk(rs?v>uw!jnES0csY7t_lN_EM@x~6K0b!63&;E@ez3M0af9Y6%BAsGYF zDhG+i`UH5#wo+pR&q=asi-69;iH1f_Z=px-%yf{#rUD9DwZ!7pqVbm(JqGXj7MttL z*lm>VooSI!g(Fv18GC*Sh2l&EhG+N6rwr9i?iNyK3t~bJwNBJO-O-1cpYDjJL_F@j z-Um>nloSsf56xaSLJzDmg48afBx*LkhfA=X#Jd?r~p=$qJ#|E~F!MlaK*(H4wM_*Fm2= z4}4N{3k|Y{6eEa6N-@7QKyftCl}xaeZ8Z)J$LVwZI0YR*<90+sbVH(uAn6m3e}Ga% z-K7k47n$I$O;iKbD507cwM#^oE|Y#`tIusc{0Ym?Na2S=%rDSTMJ4owxhM~q0Q7}2 zv`w-sNBq zwaU1e{rHEcs~mYFKMum$;Jnpl>-Z8Ge!a5rj6BywIk{1O)g?wyRnViwyavC-Ix5nH zd;cZoD))Ny38=vA(Ubs8bbnCSvp{V;Sk)PZO#C1-Yx59n#t*6ly|c!Wsw9pqmt)JV z%aM}o7S)1D7GZ|b&T4uw{>ZA4EFgnmfuKvVph;)IYLX5dDlOazHvFneLn|xY@#UE+ zP2QObWcjvA4JWlWHMbQ|%I~%2=`|ZWX=T^kjoHLtW8Cbr8e5E=p`9 zNG=tCshdD=X-rwvt&79)krsG4u7hohv0$rgcOyFnFch5WZYqx?C@Lx5SDo~39L-#u z8Kf99UsE0euqv&+~f|yqwU?MiXXW;c~yemaTHBXefyJ_e}|yz8yizC*lveR^op<)*$k|1}?L8&|8j>cxkhc znx$$;U5l~am>5*c;a~{?0Ax&EqCL)AO2D$iT&5G$psOsgZig(4zrhn4QG>%enhp_Y zlx=!ZcCr^ltUz=V;7OynPj8JZeoet(*ir_kF}sx*6c#JhCmC>$PoUXxKm*fm?-XFB zB4cuP4TBlIvUwgOf*Et#Y{NWtb`cB^(xUNK5Y@m>(UklRVoc0!={inX$5k=Xv973v zh8-+IpP}O16)muZ#e3)5CE6rZ!Q+e)se8Rdx7X0ftSv+DX;OX#+VQu(Cfo7fQyp^a z4`C~_cwl1a!?H)~-!|7dg3`Um$sWiV*SrVJ9>^WtSRf`Es%#qsJZumP9hIsv(=0EI zF;NxSILVVohPFti$K!z~Jb^HjKn@|_;86D%p8VQhNEpk z)L=_jXc4?gkah}>8al^GOxZSq_TSuXF5`1fZ<9cCC(f;xKt~3AnJhRzRH2>7#|>%* z0SAo*i%LULIXlW~z7Jnaa=*O_H_pwsVQ6^+SJ@MiWewYtGlFxk(GB6~@Q77|Bd%*p zjWZ)3%U5R1+ER#d`;pTOKasxO%VfplP{Ugah|SZ&+&H*ARmK4EtHzu(7Fu~Rj&;l} zyLzJRQ5^K|l|9Nc{iSRvI+7{-KuYBYeulgmwKN{EYVI>@o=6u%QW`&>TdFEr;U};^ z1D|QgSyIXD!x$3R;gBLU3^Vxj`av7v()0n+Ikb{Jt4xY6RcN$HxHbQ-LlVUHO9kZTGhyX?h2_t z9U>5e)-tOHs>|be!tAB-?tUPKmjK7%QpwYVODiP=9Me~BocRSC53Vvs;2D|h7_f5I zhP*h8t3oGftRe<`57#1iTn*V1F`qg^PDhkqHAH(i-gTpB7Wf@Mml2G&OT|-FTA}=| zm<#@n9Di9@Ls=)axq!p2-ch*gnljZMNn@M7FTD(ZGDh$=Fmo0u)%n4R_65|UF0R$1 zJU1?=Rq;$x!1TWoa6#T(D=FSum92NNo=w)@TKF7x`D$;iT#d(`Gkin>&xqz?0uvI} zoQIa+gfiU7lw+0^QVph?8tde$n&8O|2xa;Z(jb0p?glI3#+uG0W?jb;^E8Ay+%M9n z(_|?k(q6c+8wGShV&{^GRnxHqpI2LAoraJoRV%LJjHp-M5Y8EKi8mt};NgsTy)a|D zFF~f3S|A?5)X{UjE_TtcGOkWvgxDpTl3bWU6I$!ApNoKM`DUvw6P3T&s*BeInp6QV zFC#w$GHjh}2)XIf5MGv+zkmxpUPE{}a(Pz0m(j@6C(D3G9T9BFu%ifi>t0BiXr^sB zMq8P6yhakaj;EK}I;H57v}hrFMW4iyBOH59%9e_PQtWFwDs1LmUChBz8MN{Eas(O@ zSz#J4BS@4oL5Y?}G{7c%HN3k`*{+chzVtgtLhce~^FTEiGK*bBOwi?T?Ro9<7Wrq? z>KaFoqRaVg&22&-@`h5`UBuyw~mmol#*x-pBLn9Hu6TB zWH-vKk_DnNyFXeNdj#;tFButmsi~rRb7q>L9b(VSEdik5t6NC3$>e- zF@j1)MK2pd;Umb0YwRFX8B*Dm>2e=-#(7pw?9dws_j=Y1LPIozOfRbG#dW3dYm+Ex zzw^|6THntvwtU*9Dohkge;@8eX{ zCqAF)7B*r$W(#Tm_-+5p(<>#9_sLbgXT)tCi8hy^-Rg@oyOD5kESbH%F$DMull=uo z4*lA1wt*s#%)h?&R)3&uAKaB_#zq2f#?dcaV`>#*_Jm^RjNea-)U+TBnQNFu&_%~x z?|~}_nQzQ>!OLA%QxTMRp@5m%fWKBu{_ZXVOmqzEX!4y8jC_<4^u}%8!e-VOn4;eZ z1Ruvhd>mT&b(blQv7>_WeMtR0q`C*Y53L9YXp1tx<7dW(P&kJ6K>}~%Ebpe>!+t3- z3Ln;454J%oJSv_FTGnHmRMTF`8o?eyeCxFgQb!E=;Og*2**cIfzh=Mkx-H(pb?-qU z%I-!^wg-Ob)!RG#gWq~h$Z`#);U&!MRt>FfddWSjQe$y$~y*z?Ab8&odiOtPsOYGZAXcu=?$z}}RsV8^~kN1j! z;c_g9QCH1I}-wJa4mpa;{*A$;geO8Ac?uOw|DQ zXObw-Pq}Q0HYP>D9Yp}?xAZwa7ZdQnKy=_Ui9u@PoxPn|^Xin0SOrGrK20ZBz^!zl z8)i!Rkgs|51aEl^$Sd7iII+D8eBMIFM4`PRG@25CN29NyUNhQys-d$83)UCKCz-aa zyG!_3;z!U=T5tmfOl|hw))V=t&;std(Otsm7TqGs=FXG$^MCB$F_Msqhg1z~y=Rb$ zc_#~J_o*;1cPZ1G(hf7KdXBvqx0~8#qI?_%gLc4VF!2>*+xv_NQ}LDf^<0uRCH`yf zS{x5!KQ^v$ue2DOt-17q01WgeK}X<)4V-#9Gy<~b;cD|sY;_!2B2OK#ar4P;UHbT14ziSaU_&{=dY9Igh zyN4d$5`$axJ--pfQ+D0F1;5pbq}Kh_7qw3LCA)5IfRwKHDBrdpcZ7c*=lV-_iwGSK zBQUXPT{f#=sG}9n6lkP$!=44r7SnDV#9kNi2W}&9CGEenbWXhc7Mr%sJ+@K?-I8 zk!5oSrTg5u7^#jyy0YT}DrizSlB@`&#QMzGLC6(qodpIeZ;`+al;up37jDy6$sZY& z(?7)(6mq33Jnj|1zMJ2TUYGK`PVaGLyHST&cQPJc(H-6f5O0k*<71{}R*7@FQ8NwU z4o9?_28z&0W`INO__#A~e2+-B>tr}YPwYz&{{QCKbaloD(0oKQ)M^F;0EuD}DS8ro zl_X{teM>X;qA&grQ*`?$9$#aOdYl_MTb!&hG~Wo4d)|tF;pIN}f-{4@cx(YU z`E-y096u*3pGkd-`Dn4bC$8D!R**Xzi@qi0+T1~i7DbB~b0Y5K3!43I`Ye5r#n_!M z88u^EtvFkX|Lo_`3=fy3djE7u@#g7E}e-gKio#I-Q@Ry52^9u}L~Y?N7R+=e^H z<&_+4CKrx4A7)Q{9X)Q=w5Fv&(Q3gwL)=3%veUAtp0SIwX6d|F%yp0XO2pebnwDji zU;gwc*x7faJom?NuBcd+QM5VkKHo6WpBTFREP_Em-ifMW55k+T{FW=;6T!C(kQse~ zJ6D$tg<^k1Eu*zcSdT{p8>8=hJN~S>CYoL#HIJ}6blqCXU>C;7h&k}gX>r59dii*WaRI*^*+h4R zTF*ne72b%6e8^lb{Rc>NB)|=Iq7QaV^go7?4*4WZxS}cIUI-~npG~s7Rfm0eyHIxX zkTGzS*qzk_qXC;=I#)TRkWE$z_{K3O5HtsNM?l709xhYou#CRgaZ83GBrquV7~)9G z72pET70^2&fcd3K<>t>6`oF_tCN#`t76o!~Q6Lu|+zg)!1={e>DVscR{{_$LTjIG3 zf4QHQx9}a#>{Nl*utv6;7qm+J&QB*FddlGcJ?mfom-JtJ_e1&1(M&g3PVtl-wwiec z)`5!gZ=a%P#RuJu=%x5NiF*jDQoaa!dV_QRl%0a_FD`J*DSOPk ze{q4&T{>BmU)Y6fv`2l3uJCu@cz(*9U7r1|w8%>Lt)Gb?m+iu^3RipN{+~J1ig!C| z`6=1K0AH$}aV2I}zO$^4%HSz1t>LB^zlyJpD3JYM;c>THoCe~GuzY8h+c}4oOey@QGq{Q>%29+EO6aP z&iM5Cfwd<(2X9xl+jF-DeFu%pf7w}7_RaMdK8OT-BBtV=Tb<_ZjtE?EtFwB$gAc3( z)mpe0{<<=(BYvS0h+m>(*b^gf454Lhg>(Z;ys&hzA9hr?>^Ld%xNphKmdkdyRW`j(ic%}Eg z+N@*iy4=Hm>FiUwF!aJtSuCQ>@R-~8)1Ic%vjTzpj&a`JVOGF8#u?w?SEXD3r~q?t z&H)VNX7gw6H#N=;JMI$rM@`RzJO0PN-B(wl!kfRrdK|t}4KUE{bMHRZd2r_31J@u4 zs*D!(&r1Wg7oLl?RU{vMtTScjy#uz{Gk@nZCk5uV zICsq1EBK$qLFc(Sp9Z#w^z_Z083??0wX=S&y@K~F3ieFd`!0WA`c=+@`_u-Wy3z^m zyG!tf!-73?_C3BJ@RQ4(tL9x5cyXCCHg9(DmV<*mvkrLDANcpBJtGIU27?eb&o@iazc#(7B{Qb8-V*jk~5}kLTJ+7<4pBV=Rd+wND z8wjlXMbGGh6aB#h_6<7K3*QJ{uussLbLi8->-G*hA0E0-@N&SJhuszY+g`z*rw&^j z3|>4Z*t69Uv;2Xn*E@SJ-nFE9Pn2dabg{-`;3K-0bK2s4C#{=H>@UA?oW=VDdv*`@ ztX^yfgNt?zI>#FW!C&nXbatwa1^>KT(D`Havpc=S=(3{X7#(;K_!@slkT&SPjtu6} zd(K=T42a8L=V;MDkQB`AofULmI{KO5_BBDL{U^WOew&@aiJfZ5kBGcf00yM(cMdv7 zFFCC4!C4bSjBi+KE;;-fq--gG25UUKyIS7s72 z`N@73QWw=s4ITq{QcdNK+k*?`6y=oDCQ`oMDd^l=vukkOPQjj+YL@zgN9`DN4nB5| z;LbY+d(J%e!oa+)Qs(T&VJSHSkDU@L+$0jyvR;L#m4rW*1|9$Lmj_?oA?RFr{9mU} zI}N$*ik7fC7@pk&DGN{7bLP5JMXqgNzX{w{OOO=IEtnB>q9@ev_`-H9Ii4vQWz>t# z4{R6g*>u7V{@`z>2c4;PjYVHiBV(g;*s(K;e+rhz$}o<&uS^T}JWzLGAb9GwL1$L| z4hNsNEwr7FC$^B(D3a=h09If6B2pK=a}w39sRF=q9ZW>u8l4t&F0DU!o0qp?F>|30 zrtsw_1)Y`ky9aOFCg}XTJ{p{}O|a*JlMe|5-K~Q?e>tTF>JJV!_!z4m!U%WB2VIFQR@8ucD@Y1f#(E;g5pO3uo*eY$*yl zpP#WHXahg+=T30VmOn>2s#g*xx=*c zAUM;yO2lvdTLgR7pE<|B`-THWqv>Y@tPEk<%)R@biH1B^Sg$O^*l_mD;Qs*r|JMl6_^+$N>Q$B?}9%sLLbbfZPT2a&YAkRa}FyAP6`Hl4nO~A z!L6V9Cg3S!VJ~I-gLn9+w!3Eqra9{_91Gn0wKH_lp;K@E8a!C$6q{;gK8$|t?DEU9 zsn_9TugrSz&^Ms(P}=j;U+&}&41d#eN#oMM4%dI-2@kDI9wjjaPL7fY;f^ny&o24# z)L%)mtovl>=X~KDdg-q7mVQ1VcTmdvda9h$lOG8z-&ihBnXJMe9TaqKy7c`({b$ZK zm+cfd__LndE_>S_cyUwD)tC491I10wyr$iDcn_N*uolc|@gjy>3;zz1yYuJHMNLZs z=lseUZn|Rf``96{#4dgv!;7>2itWnJ$BQ~G3!eftllSOJ(h?Rv2ogGC4;T$Q(G8=} zvim=E{&2+^ljp0DMV^q^y<3ZrZE}Qk;06Oi#_^C{Zd%+EKXr^N&zyV{aFpJHL5!uB zFynckW=bF3k{M3|38nv1Mms&u1*Ko`iSx~sXG~sy8HId{5lVzO*Ic#54v&DA5pgI) z@O2N2@;Ffaj;m$_uDi^6nU5z&C9k;j0d z@Z!~%Qp7!%I*F_21YR6fit`H>cHWy z^M}^60+8DYGbixcaL-%LA^xr2cnvd$e;qjo8yrnXDF5u`b`v=yq zb#`e#Z0jk)YbQ^YF#PRTor~IkJnh^|Q4`xD1opLJLiLrBZ}`s7TG)z-sq0M;aA?$e*6?vVmfy0`_8D53j&Y_sxozu{Rb6+wchdnYM{zra9`9LHQp z-RlO(w#S7|1AT-n%NRdEkz(o#8+2G7Za=6N;Y> z%ss4+iqFM$uHwu3sQ7x!!Ej-jENR)(Z+$eY_=k8u3k_x#54~ z-Ex{Ux99M{@uz7^Uw|+;NAvE7o(~wGh~|^LhFuYRVshgReJu&EP_t>JcnDE%)5zM6Cb0v9N z=FSx^tMJ$loL@b*TcGrBJ-0nJ-@oTam_)rpWMGyo>9j1|t1h>CX99EY=$7g&c<-n1 z_{@6$45$2w#eucm&gD;Z)*q^EZ2bu|X6&Aj>;9hC zR{qG3nb!&RZ9jeTak(~phX&#P>^|Bsi0h0E6*HDXEj;2e@TP_+n7B`5+Do0QpV-k^ z*B7ZB*LK*4B?Q#eqjzVG+xjom^GR7-h@C2V%Sb7Ff1M;0-yk_QH}0J-=k8VE-~q?t z=6}_}!OxEo<2Hpx?g>DMJQ_s>wQoQZ-YIbIJv}u~Rrv!y{+Dy((=CBBUv;*5=8DqZ zKZ<_dd!tFM-qmj3ADurub4cLnKRP4N9J*aAcsPTlp|GmEdMifbOSVhi+|z34a3eqUp#WZE5Y;qf>+!+Q7|o?iFJMV^xJz*eCZ&6 z;NaJKt{>Xd9|)~;9(j5H!1KR#+?Njw-1B#5<|}q!hrc`by|Qay!>!KHEBgnYS=-}( zbyt7stXt@cxnD?&NR|nJE9TtdELeNOq-jiCxc{q8``U{A)+IL6s2<$zznuw(g};s!35 zmdnK@H8)%n(*orxuHk~IS%83np(0>fX%|J3>y@Hh9xLCX-WDq>O7qg9g88bI6_u6s zT47l|logp7mCNsQ&OFb(7u53m|9$_ztDKoRbLPycP|&?H@Hl(#wzEfq zMab{>Fq6k#U)S`Dw({e9wq5zfXwl=IB5GaRL0TQb6S~2JUi0zrY@ka-;E`UmZvB^6 zhLyhP^8#`}(Ym+393ekiyDp?^%H>OWXc}BtMzJ(o4A-l*n17pRJnL|H&*h5LwK4}{ zfV#LSyg$6bp>QoChXUaWHB{VKho+UHNoAU2)xUG)bB&u{s&lh!4dQ+9)=aQIIGa?{TJ5#_InSxA$MJ;+J5pt*1GuG zUu5#4b))_mtWTSvue4^VWTSuA^wN?({iF>#gbjnn68_ zdEM%>8zM!CT$=gv2jX@qowpbhbrC6VN;6!#m@0S8^&ZlNOUO4;ya~aggD%sPjNC?I zcJ~jGQT4FQpeX5zD>}b9=)dUgcx>WS0fX(_MXAQ`jl?aocdC&TA{NNkQ;bS7C!`qB zjm6FK_#AIZW6@f)`srq?B4fLQx=r)*n~nWVM8~Uk+8$iZ5toB}-tN7-LMB;9$| z8`@MX67oQzcV#n?E#>A}#;H(bW%~@HM;NjaKFhm2Ok@e!^9JwFEyNRg+vle#fl=yF zjmUt&c1$z2hKnmMKT5uMP!H@?+}MZ#iTTDf<7l`TAA1}8Rom;$9mLL3@=da_$OwtW zydDToL3=6`JU5HZ6w0F_MLTGkk<~`D?%B}}W9RWO1?)S;pT`=?V?~znTpQ6{j-2BC zxQ#d^h>zZ z8f`U>_7!3nQdsRb_xyGCoM+-`ce4=S@|T~6_E~K?kNEvARYg!Y{u6K9 z*IslOaPv=R&sAe%5_KP=X*^tL!H%2Wu!I3UTkUvX(h{o7d*&Hc?M0`K^9T9j>x}p) zG{;GJv&QJqL3HbM73@kUUG=9Tv2@bih-j;k+(ATi`hK8IR8p7dJ9wCxis%_1QBqx^ zEkxAYINCvUjF=C*IwP~+j8J4a{y}$ng0qS2N5j!kbn4tEfb8fWoGvDFSGb!+5giiN z5q1B^0e*Im5?%g?5O_nHeMnrM5vM_5-h$#V?sbT^VdIZOl3W>SUh?uJyTNFV;%)=5!;hlj!D3;L^ph6}Pj>jAI9eenC&ONGKz5XljJsk`vK_ z6MUoN53sSg)_iHA@op#4=Bgj>q}n%P5%A`+i4=^MOCypMU5%MeIM3k8 zEp(%~Lqyy(qQ75=zu6i@ge*o1!F8nc=L5Ry~5;MI&ya zXp6#sTS7*&8{k48-QQU2z>(v$?;-crptIT>s_Yb?>dX7jF@AX;HjC$;J;#GoQE(q{ z^WCb7D+=yj$DMy1>S5Lcql-jp_<9sMD!vi$xtiRW{ZTd&FgZ>1?0*nvGMG9)3v3eEV8|_Gv^g zZ@$SJc9rNP^mZeqcR(*OOXxdBNbkM9MQ@=$J6syO`iS=W!?1kbM~rA)I2`d?da^JI zzXU#g`(muPb65ap8jqXLG?My?EA<1{O2ge(I3vz>rh2Nh7*nY36^$sF@9X;0LH2WB z(XP4MkBb4WO+V39zrV9?jOZuM>BSMc_qs^&rD%R9W;Xrb#9f+7v)47!=siG;p7`Kl z2#(H1g7tAs5@_OqQ3VTWOx}7RxhxCw)*+S<&0Bo7b+*k;;Ur`C0MYJ-n!)~TIVi*V z)6U|&6Q6Z5LlG$Ol$fQkD;j*3)mCcO(h{YK^fd8jtH&^D^c#q5-QH36P9G?;g&x#F z_r5(yj0);^_I>1GfXYMs3|}7l4Wc|8!z92id7ctg8Y7}ayS~}|{Hf%LLhvL?Wvun; zXyEC!|MZi_swffB=9acx9Gs~;zo0Y@o{bs7Yf++`zN^19zK#<2=`$|Vy-S9PU!-{4 z$QU8IiMxz@M+nE@cD?)&mQ!hO9eWn~%X$jTz<68qlE$$Sh_`!djyH)yUGW*m+rG7K zTyZVpy{C^fMqP_|Yg_8xPp%cSblLc3W8g?}tNwU*X*@bow9>c2;vFd>VyE}?HK*{L zo4EOf(Uhv_WuC@f?f2fvhzGm-=y%dw)O2^3-u9z}6rnHQ!0m4$rb_6-i;X_9D4oey zN@H5A=-;lxl~zDo^c=b&ydRDgo!fua4c@GEWx&q`7xC>23EoGPbF1jB|>9ExJ-dJve6T-h<`wI}pVhr|6|$2LCcA z1o(3k-CN~E$E)Ww*1ePVie|#dh!Zb1UxI*EbLiJq8a>8}e&S{CjIkh)*GxBV8Hag% zWoPMKJxq`^oGH@abN=C`!Y!P)=Z%IQgq#$IZ5mi z&DY2KqUzK^8bjj|)f3+Ic(F<7Z%>kjJ_P}LUm?A{rXa39)jLoJR_rauNb8%4>|}X( zTKl7qqv$&hG~%a;K9?;xBk@syf+JXIl+meMH#HB0(KKDBU$ z5ICzLjqI7?8a=9|G)iZRw)$sb(s+BOxMxUpDDyc$4Deo%#pf4=Jxs}tz%Gbgb!d0T zY=f}(&Jw-#??TbR&Jvvy_JEv8s&O<1BiUc4kV8lXgSU2L%*}i{n;ZP@W`3EJ6Z0v( z(eUicumQ7z2Tw_3@QuQ8jrRq}m#2AkhxtcdTKsU_w?i_v$^pMwa!4W;*Oq#>pKf~EJi zG)id)M80FL7^c6ZOXJtMm<-JsB8_&pfJdQZ9!ZKvy2YbdO5?*@z{8Nz+dQ3kxDa$w z26$X9q~XZ`kM9RctdG4I|iFqPL$Oq3FjWf|@ z6{6qnpNVi;XEY_&yWiTxY!9=8J2EOg?L*Ef7&LL8paP{XWHN6k_g( z0R;`ltfeBdo_tW3qjA24rWe_NAp&&~6gwJWMt`qpweDXhn(tUB8VPym52JCGxK>7= zHpXR%i0J2fld!|J9%MAz3KwKP{9(HSzCl|CMZshH1Vl<#>FI{e@=fLgf8aWo_(o2s zHSS*|2FSgC8v7QBj%@~E5CYfL=$^rKAY9=3hWF1!VxVYNeifW*e$f6;V_1$D+3L#Q zk;^tz*^72oB4=j!@5a43qC>0pzX_j$U@1gqzR=3MJ4all%co8mKino(gh&3$@=V7J zfNCx^;-0@6E0%~hvdOQ;14~3VdF+Hyz67i3Piy?lOd`w-HRMv^k-wib?p=zFk2WWb z+NENeTvcOCx?SAbxCH{x3i;EYy>Hwu976v0C*zwtL|1v=PezkFMWy`wN8|H5g+uQD z(KvUf7%rFpXpC4UVr9aQM*cE!hrI8&ac-GNki(7})0c}ICEFc0V)8@>InOkb@>ksqH8$deX_V%PPP+4bX?%c?@~Q8QKk~%=dQ2r6>k9F((9L%- z_sJJAa*%0c=Zo80Myy6H2v>!|F@zas@-g(GO1%{=^30>` zz?BhEflmNoG5VhQ*mopOdd`CNoTmArX}q^ebm{+P8>(KoA+(4B(TyraQDr7Em&FtW zw=tGD;8|+^{I$`gKy=<% zMmH>`%J=qvjTcMAf4$EXlh=~ZjNOlk=e?f$$+hvYQSvwrIefHEoQ}TcHi*uu&z!ug zfWV+}AcS87Qym`KE2Z}B5B=gCO0nF0;*8N^gBU0ee`t)}AQHM>uS;#$=Y0Aq{B7#G zu-T8^*9^Ix@(jIk{?bP4A|JfW_;`aDD&s#k!ZwOdvfU>}|BYgBn|-gblxm3et1A$q zXz**VNn_bY2&T_R#=kd0FvhFWJJb-ZWit&b0Qbk|_PGb2DwE!s4~Sr)f9#b;@`I4k zqDmv?A;{?M_ee$=L9*s;lFoS9?rkpw(^Se0Z+anDaK{-?wu*?X@sY>Sv7 z_r2j=zeRi^ybYTVA+lic`g$iT2Qa<}1lR&(di*awc=sN1oXMMs5|MYVbU7gkQY`?c!J?{n!YYbPb=jWd`R`(F^ zMug(=Zpi(qj|KJr-%s!hofpEpw;114h@qVdw$zhx4fSCQZ7eUH`*DbIHqLHACQ;6M z(l41(Lj1V*jInYLM(ghPN@L3&(N{lpkMw@Jht_i|iX_dxw*__lnefF_BU z3{qZsN%E7?=}j>?sMSaHg*nvt>rK(7OMg6GfSOlKQpD$i$$&7Ufc5MgM8e$nurcT@ z(RIMbkNSiYzWfjilM;=!5S4)G^?5_PLx{GI7;6yj);ym_QTRd?j)r%H!;7mwOd*cO1`s2&SI@CM6$Kp?+ujiMf6lrj5lQ4n$BJwk=AImjjU&PacW@!aCE zhYfj9B=wDcxL%2IIb2mA%h9%e*eE`TuI22%j3*C@E?0f}uR38pJ4-3s)erg0Fr5&~ zUOi*{dQeQdJaIE6X~fs>!@%tzloKS4CDvb$7&pEn?!3G+Lc%{u`Iq_p=RRW8yd!$b zqKCX!yeqEL<(YSk+3yQehCSpR{egI*ar0L9+9LA=fBu&7#}P47KKhn1;&bR9hQH;# z|8p@;v_9_kC#>vGB+Rwtj8XH2SS^dzdT;+yls1q(?>2gUD-0P~VC?-?6v@|C8dJYR z?>cX#_m1zxY;pOOEA5D^&m*dxE3ml}yDv8U61DdVE4%Esmzcb^m;W%&~ClPA%;$tH`9vA>Hca(A}zuiwQpvPrHn zwpKhQGZq;?){3@r>>_W&KSUoXJ1+7L`Af_SmV0j9aKC&&K0VLd2dAKgydlFlBjqmn z^DP!)|6HReSUxO!rP&mz-ZKs5B#6GPodHcb&&rR;V+{sAm{QEemOrs!Fa2aoIbgB ztY6NBt3jsZ9RDL#Ns{w5g!F_5v9WUo@aB{WLOoJY28QmU?SLo(_UbmlSmcoX8glZ~kO8ixoy@51BCKh8Tak zzPrnpF3p#&2MOs3Phn$cBTCnc`1T~NItxs2bQc{1M7r2()hJ=K>M8qn=mHw_H$#7- z{1vc)=UyoEQ!&DOb5E?u^$%dn=_OO7K6Hfee%gl;{lj!`ex#f)+uV`Ki8lZ6Cpsre z7!3x>gqb^s_!B)b*O%zhyn}|ybg5@Y3hyJs?~Uv8rs`?*$rx!sF1rsp;Gk%aW%z!}Rep8C?6ZB%3L-G*`8*r&DR#;#X} z3$HO<_7HOZ_0)bMykFfQLxlclOX2-#hD^r(QK;}vnT38|UynVjh}m+h{%n}=R?e19 zgnqP{O_tNxCVRY*@U}>nU4?G^ER3OZWDh+PmXta2d)@Vu@W!XeZ*_gw_ri#}MJ~{v z)`juREpoHi=N*$SPYUtAF?^nE*DB{MG(6VfFjDuL4LW$!=gF439CXH5HeXiBQ)j$4 zFOX?M-uS2YKMUom2J-Wh-to7|Xk9+~i&1pDd{b7|7&GpWcgmSH-jD7ej}|`~m)#`~ z$ce|jNAHqPHCSpV=vbt z{?ClOd*!dP)qjn}#i;Qc4tqP@CzBe;fggBR7&2H$?L%+jCOJTamj*-R&`ba7Zvsz$ zV7&K$oId2&_w3ClPjG%Skg4vZ5lB^cGK7$x@N-SM)WU!_Cw^eu_@Hdp%kcrGD%c_; zT->`Xr&|l?hGrxpt0E3KY)PK`-}gT9piFBlC++t(ctXw$lE3cpCO<7Jg^Z{$)-={5 zywjeQe+v2iP9y#~c}%|gnla>g`GI`qRd3@LWG^9?zv8{RRL%>M1v`v?Z}?OF&tNk(0Ut z%6LKvXxn3c0gb8xS$zSW`jVs&zMGAmETCpjC;?SH?iWy_NB>4Zs~@)n)ciq9K-)H0 z0y?@bP(aTVD*@%*qXaas$P&6rGMviSAk?#x0&*YlhA3g2;?>F+Gl%XrV zPn+_i25p*_asdQREP|J7#-U$D!qwN~j)FDS4*n7!Tsg0^xu1}p@Eh4sGmEE}X-3jX z(YE)pWn2W@+dPi94v>Red8eu^%A23%@a!bR?1B(aofK=mH8pY`7CcLh*(Xq)dfs8I zI3b^tv9}wMzskqupxcz-uUc#g{!EVdliy^H43B<_vk=(GqHn z<&7D}^}2qCd^+9xwyw7eLQ#Ly5co$@jV6tN|1rftTWsU~S0jC#5Wg8_2s}5>F`74q z=l988w9nR3zIwB_q^a(~6zL}Kk2B;PAxF*fPM#&-5i)m%k<>zesOzKG3C(Q!$7!_t z5eax}H?Ao79-uIl@16i8uE)4$8Hp|R4qbeNMI*WqeNphuitxK>itxHw#v>Od9HI!H zvIx)3G&;4^+ebwBSb9eMYdyt1xVfUd1(fEVnZ}WpdZ&nAu0;}$V`xMYCn~ZpfTAQ4 z*~*zl`&N2l>lSHe&%F{&6I|Tm#yRMH=9wABy{+`NW4cWTZ@j@{RY-bshhEddW$wSG z`3l(y487-7m=!_P^z;^<C(VYG4;;o93cJHno3 zNL`exaNJeqDIE!=(zVHYnO_6tFWPa|d$0M+PdY-2x`UGIhq)6}c!c02r)$+36CVEe zTi-)R%tACb5`RYk|K4W4g`%ehQ4?3vWi@jlA)%A7aBB&7BjKPj@TIMf8CRcOUvn^_ ze4<`iOd%ucll8;hYmoWs<4SZHI8ywlw2*f0BhByXqxzeN2-P|u9Rth?LirlS%1spM zbA+RW_=PvY+(bx6K-ht1frYa3znKCrvI8rblo0Nw`e6r| z+BlnAl)0Kvke$mH!!R?KaCK!j$xI}q16=H|*O(J*luAh%MKQE4?sdX-C7eGg<%A0( z9K~U=bB!Brp213~P81`|?+N9vPkSlo$MwmsHQ%sNDkTSq>;=O4#d(l$4-qb~5?^N) zs-P}kO2$Q-iwWnCwUUA++c-P_G3KQDsFCJ1^--hD9`#YNW_W#+({#!DxY6d%=T4uq zV;i&IS%YL~E0)*Li(;Wgz2M+VZyo^ITxjD{5^#8NF-Cy3)6MjO4un5OIvJ^7N^^+xj=GiicEr2HuSRaynfbrU);yc4l3?iv`UWK^ejJSHd1lFxDs(sQE`6=yA}5=oOib4t~G}n zFSgYaT=%9U>-oQ&i@+hxr!)tBD6HB)>-=s~Nl7>1jPKLPZRB;_RGFo@Y$BT#pF)63;^zM_cNxjqr|o z+i*OFq=eEV;y@wlJYv0}tI@Ti9^qQ%#@jypI$VuACLNU)nTQEtN#VH%dS?MwZtyG# z3&0bXlwT2qsVN6Hxpe1p zpxDb$1h{N-ql&F75Py(`&-8uiP7V4~^O6@!h1|H`T95_aM zhKjd*9QmM}(V_!^nJKx<{Vtl%sg2bic$=&LJ z8rGH5TF3ujHP#R`E^`&U(*BOIE%gJ{m-{OyeAP#7ZQs4sr#O#x*dXSALmixCoE@UP zT5UGlAq4xnZ12~r$;SDm#J`U37P+0}9w*Abth(R=d{LbP(yqAq^OxzKxIKVlE}S0c zcBsIs2i6HUxqiSb_r$FM0l{ah$GH^&@c=oJg15fh&b=PzUMTAEmb%+{(BnLa3&^BP z<_fuV-IvYVy0S=g_FBi|3WL37pYun2XyPX%dU?%U&zLwi-DBd(jPvZKu>y~-Vly0% z9lKv)C#-8G;|cqTHHDLhli_)>gp-e||00e33b)>eD_1rbYTlwDRP$EZ@~x`Qgk&(Nu!mwKt>$y7*sF?gJS8UXtn9%hVF?mNt zOz4jHLq5T~&S+x!RTzz_g@8n;)>SyJA2qJLJ7OS-%b6oy6Z7O%k(C~!V_C0YC-T20 zu0K`4!nk2%tci z8!xV*;ZZqI7>( zGNewga6rAZj)b7Qb>Ne2XjFFDq2f~)Ia34 zzsH2s#zx?gPCFNa{JE$_b+&uYz#(Cp8WO0~@t!R*Sf~6sgbN+vmg*u@dX^Ir)DizO z4n=L01XNMoDgUUzRQ=gja8!kN)3ho~m=bC{Ym|4B6-PC!N*MJjp;mmS)lh#5l9!m| zr;rujYKc?l zrrop}QjYkO)mn9F#I>XvJEvM1)eqw8s*~Gv@}f5O3M{4k)NlV&H0s5AR_6hQgrXR$ zP>lNmit(4a6qFTJis<}(rTBit$M*bcv#P(`mR-)xRt4USw0WE*$hXJ&I0}W|9;bp+ zz4k=(z>_CXlCcPzL}v7wMFZI^TyzbYXxM%7`J-5&t3E+usp~^m)hGX`n({nb2dAby zQ_=nc2-OtB0bChYiVz`c!{k&ldac+DY{VXXf{yQ1alaY|FK11YLh^D?+=M65-OlyZ zQE>U=RxG)%=RRD~7TY3lQGZr!iJ%z4@pOdSxz_e3-?f(ST732{5MOBF3n_i>6*O{@ zZOvr7FG{`Lb!2!}P>;_PG409lb$_bC;8QrOs?YfQe5Xoz{OFMPE!!AtdGbsE5f2R4 zfpOrV)|VzI{)`sG+dVNapsSt@r^lJ+E?5THR*z+VE-s_d%#hZ_feeS%o$+iZhWx5L z-+wPtQ+FOunbH?^T$sBkm!b$m2+D=0a4Ux;q=&!#=q^~w_N6WuZhqyx8p;v7+{SQv zRsa#09*p>bGq6hLNe@<3k0#21^wgu|QJTNQ6p$ny%!^#bEVfbz@dr+=C1q4;2NzGgS6NZ=8h{#%yhVDrC+5NG5 z)r%xWH62_tc`#8Is%Zyi^aG-5LO1Nm`$~lFpp7H6xzLFA8XF@|;Agdja>HQrg$%2Jr!L|5J6wmYz8!2qvN_oQA?#F7F_3rAFK z=$NtakpHbK>X+!y_4}jqzN1CPdsMP&9zk9;0bctOn|ivGpc~{x0VF9l*5RuGbpUJ zu)lmNerm@>6dHR#eTo#fR6wjadze3-GoddSc=))0${=24U?M6#4}Z=BRfO#XRXxSm zd)Q9Z+ryPyeIUidpGi?o43B)k*ItJ7p=7NY*PD#OahM%IIwQl#aIbV7|(`w54%o>SCRhYFtq(^;DjobVd_NVE_R?FsIalnV8kz4f*m6mPI@xZ5m_gT%u`rm+ln{AR`FF+@xG$r50Rk~5L*vJyxxbCZ`DVv5Grvh zAt`lmDq4Gx^%OGaqfPOlGx`u<^_3tl1J`r?-=vItUQ$_u?NusRe9m-K1x_!4)WgtS zaFT-2;9Ngz{(MkK^6gSc+}uSq6vW=y!B^Oow+qu}qE!CsOW}&Wha*v0^l(Pq1$Z*z zT=ko1qW);r+pBx;Z{K*I_~~&@`z8}kP`#t0gC87G3co3^rJCttsZiCepL|n&=0XBx#Jn0e^gcW9)Y-D(37GA zFQ(3};`>gl)55WAO6;USI&?=a8nFEx1Ba-_l&_SCX^W6K@%o82KYqbcWb*RxgFblR zjqL>8{H@dKk~;iV+Gfu-x@Ho*@ zrhWUdyz8#QU|wYJ%VG!Cy@7~597Ltk!)e7XbYX={b@-jF4qt6x+T#peQwSJmRv|i4 z?i3N;V|~1mX1v9mL2DSJ%_y6}W@3N?=`=r}9hX;WGiTRACRdv(RR7gZ`9*hBut{Ej zA04~R%WFJF9s<*h6$ zyFyHgP8ai{^^_q4R;&MbmDCQqt_IjW5MTnT9d-@lu40R)I1jiOq%bz>6C~n|n7pq^ z5Aat^2zCygH8GyDJjy>!3C{-j{~8m5y+iUZB?dH)IuYRgVN3`%4&fcTBfb~xF*NCf z-i{OJVd&;8c^JA2s1!U5?KweTTvH^)&rNTvo7%R;Jap#EPxo@3#@D)iSJ}&=5jD{G ze7HN|BtB~yizlz~^Z^>D`z>hYPxeHfi3VEmD#jnj+b~}M3k0rmLXCfo6I-d9?QKll z5ZxPT+;zErxhrn}>ca?0KPoLatH_QYIp^*l6R&Lh#&l)OzA>aVU0$<)Ou9|9Z_Jez zD$_>oACu*`=GxYMV@UIeu&WOc3P0!^$azq?tO%~N%xH_avW{t z|7Ob{OK&QGk^u63V+L77kJrHtHu}9O+O~~HUFF3kMo8*McF|HNrmPhn0@E*Z#d_|| zBX|B$?A{+hOW6~Hod>i-Y&TFZFFVbm`%=$0uGV&jT95mU%Cv4uBq-c-+IbwB8we6;xXqrY=%z2Ym{CZ_&r zqs?qjL{UwEWsRkh1S$Oor*5R z38UrM8N$tS694Kv_+TR+`}k3N0*A`L!ofC2!>IQIeBZSW#kA!#*#bk!Ne8y4vgnCEw&Z1q^Q1()%h^@bghpJzM?YwQpc2?9DrM2%j(N$T! zoXGu~ifWrMfN>T4iSfbei9}g{Lot9cQQC|TRQo+JxYylHOgLa4DsWk+3Y1D)P2yN* zfOYEy4twnVhr=G_bl8LI2nN#g&U(Cl{#g&&LbPj7+5h;k$My>z_OSVt25jHstcN;U zq0VP)wa?h1hCA76M7!fbgtID6w@!3BUr_^ zLf}LKhJU4)_HA{zfH`lDez!k6zBzigK->lA=o2@yCfJe#0xJ30HQ7H`p18?BFLedZ z&Mhs}W{(s4wDs!2VO1KwWY}F0O6c!mD6Xcae&MOOv)JQ=vT7~s8C;hz1y5M(aYBDZ z+O7U?(!`s)>cZ)rxhL2$dH_0U|9&}b_)Z!W!Uxb6*A!02emS8=s|_mO9*f$bn&?tm zF%p`m5W_pPPK6$4q1wxEuiU~?N3Xmx4>o98u{We<``NwgZlU`7?uwsU=YQLY_FgyG zd#}Gopzvu^D7$YxyenYu9qKcGOre()Q|P6}^j^dP|0e%Pe?+eQs%TypZn63ewRxX^ z)WHMGqI%dc#?lH!X_lb>i>^na4v+_E*pWxqa zR#;W5F>VIX`c&&HJ005fAdJ6(1sA^J+ZxP{2nF>z#RsKz zBP_8({i=0V{sk)6mSXQq4V>)dW*uQ5L9U;GtV)GxY1~{+)@rf_%~B<@T$EU{{2|Gz zlzi1sa}w=Q)Gn%odO}u36~HW=n02g2ml6tzDS8xq3h?;Q6=_s!~E|$@#zNEumwt(G;UTAkX0$=0tsgL z3COAxous{Vk%O{qYeq>*o&thO&sRMF6RE)LD7gmJljC_}j0Xo^76*n6sQ9XYC%A~r z-jlK0o|0q61?4!v!a~J2uA;h$I#Dv?m%2g>^^O~d^BSyI3lu{f#Rdl0!y>D@AeQ3~ zDA!m&1zD9|Q7IAKto^igprj+H#=YA*vN=x*!-?v%dKn3nf{V^%DQ%nTYyH()N#VA7 zfmLm~t`64M{HN5^m4kh<#(#uGY3uwMb}0ndK_*H!5=m+HQ}9JhOK9Y!Qv3JH6Tga> z=ra+@{wxK}0A|oc0P{N>F@y>ervbasCR-(U!~W5FFOuXgBGpaxSSz;}bTQ`9^eCQ# zsH5M$AuTS+&EIY3wGLOixTOknzB)+FMV4VX&q?{e(^Yh(MA{7;iM)`mLcPRxo~i;z zI6Q&63J1%I-~}{z{};N7wv@yxA;&UU0#p?kM^qO>wa?O35Us6PYfa()eqYzFx3;b# zjDnoMuWPF+$lI^abCH80sjI_lN<98obrly;B)BYHMI%ZAw!Xng zG!e483pDcmA8xLn#zq>&KqkddOS^&1XdI^~*rlQ%tBS%_TAd`)|Cz3$hJsLe+qw!~ zTC1T6lPp^`HPVHxKcc;m@`x2i|695WB!yKK2Y#UH=TlXXL+^p|aTHjY_-vq}@X+PVwI|YzFEJ7Q=6Ki7JF|*n9tjGgO&A17H9jVDz z$MSx(y%qch1CnU#CAIh~^DGTWSaG!a?oy(>&f{5rg!X2kb>t0K~5-G0_agL=zdn z!AD;Ph_f9U8Mv6&$QXQxyiOuUsYJvqW78eeTDi{?DlW!ccYdk@5(TOLU815do+t>F z6J@7=^m&OKgCo2sa!8qF21&+5#D?IQE=dO4i!+A=q?$J4_ScghcKKhSYC=kYKLY&z z;_#MWSp`B061(2~ibJxs%sF(2Yf+bw8q2;YBBaJ2caMO$Q8rdFBC(6Ei$a=x+&HZ< zo)@{g{=^G1C>&G?g8J78ANy$1MEE>D`xxa696k2lSi@3pOV;slvrDm{%OK0 zWZzwM2o0?|#G0w1Nn?e_(}YpJlbEsANlZL+#ciC3u$Xg&u8IQ(pY8^U;iH)T2#Ps^ zN{WEG7d5Y#?JgpWt>I;@t~!&+n>V9)nRqEjGF?hhJBrevb}VT=GWq;7nR_V#G%Hgb z)K*RvAw2~INgYdeg4Xl;0Y@@pIXx>V60DuTf+L}Wmac$XF_p~ob#S<}Gnr*X=}*!D z4o=7msclKk891wCH>(ry^)mRWMBBP$5~!u*RbM}`w|^+<_Gz-v`e!mrITXP_rMsHy zO@r2oGy(KDcOFv8ufWHxkjG0{4=_A*hq@MsD~(;STkF5d$Cn+gT^G90*OPX7>rxxN zJL>J~T=82$)l!K$Cd3kVmk>3@wYLY&YC12bDr#I0E+O0NSip82ZYdqZ;Yr*Nv~L4) zCuT9HIkcKWyL@wK--MWN)VU{CsgGW$ovaH?p#3|HNpvHM5}|7OQaF7V`RZJbpjreK z3Lv*lH~LwcNym6D*x{nl#&FN?(^OC>yW{8niF!8M_s@{pn8H0wQaBmfP~yvZrp8Yl znN7$vcGu%l+7;?zZ2uDx=+A6My#g578~6dV7O(sAkSC0#mU;#H7oU3Ntq66q)!#KR zE$`K%Yrss-(y#E{FdTS24E@UgJM{|9BJ{3_KVQE>>Xp3#om3v=z#1{y-R}S9 zg>)-Q_hs*O(%$J^y`yST?aE{Fsz_;9&Kj~^%R^349cf?I-|27>FBC2GlZ~vpUT3E>p!!$*bSWF1xLFpE>g`tL-A+M8bD}0;Ia$!moEb zl{Ut&v7#G4O)jt}iJ4qgy*$~X@kwT_`p{&6^v;t^VfEehxG2fcYClkv8iK#uZ&W*pOKE4~ z?=~EHzmc}#tGCq4(f^12#&7@Y&nO=T3#b8fs(|)jvnVc_C0ciJ*bOH(Q^;!V=?4(d zcA=61?;I+9LcN(+rAB~G%|%MJEl`MJcfog3?EKaBj5^Z*(r58R<5E}GbRgrx zt7|?+#cg_hU8NtSPQT@jFhdaLV;d0ljM&66^FivlZITEJe?YWiX^VKsd* zuYX)kyJliJ{lB)Fu5+YLRT(EYl#8yVCtv5^ zNWsj)T1#7#P+H&6@x*#dW?nHz*YS8e;=qJ!ROZKyDnID&h-#ZtU4GdmjUmqYI?kAxbJIrJ{kW42kH zHUdQ7^aee?j3ZX~Dj`10VZIew@6Dwua}*-9Ur;++V>q1QwG5*fj$|0ia5Td>7aQXkPGC5RVLZbr z45u-i&Tt09Sqx`0yqRGV!#NC78O~*x&Tt;XOoj^>W--jZ&PBP;Wyfs{momJA;WCDI zG0bDQlHn?bcQY(xxQ5|chW9WmW_Ult^$a&M+{ExfhMTX`T!{W*c9bxDjN#)9pJcd& z;WG@kGJKw4DZ`f-ZfCfIVHv|$8NSYN7sGOfdl>FzxDU{EuG;~2yv6V!!*>~0GW>wy zA%-6_Jk0PjhDR8F!LW+qR}7Ca{Fb4~@Oy^G8UDnuhM=q433i-hc#2^y!#^3GW_XsN z7EOgE83r+Iz_1a+#tfS>Y|b!@VM~Us8Ma~Amf__LUG3TE$k4&CGsCV7uVmPR;Z+QK zGwjPSlHmY`gBT8BIF#WqhQk?N%P^YZNQSWtN4waFV>piC1cs9s#xtD4a2mtu3}-N$ z#c(#mn;9lCoWn4c;arC44CgV-WVnD~Ro(H`OL4k}U-h?`+otynfemYkbLoj> z`+#hH8pC#gY|&)fMYfq_+fKGy$@UD{ZYNs_+3qIWMzXCV+gh?cO170`d!B5xYDnMN z81k=PK-RYinM$@#$u^5@-;phzY`>9hG}(fiz(!{r(p!;j0NEnQ)`M()$<~o-RDamPS$y38&9?* zvdtpfbh2fTZ35YDCmTM0axUFXwxML(M7F+Udx~sb$+m-Rmy?aIdsJggJ(s?aYz^3# zY^U+GfBG@n46i;x)|Qy}RMYpz(yu1l7i613wnJpwO18JihF9dZ>T(JYkBeN4DD2 zE?EB}>rba)Yu^Yq`f6%=6xlu_+wEkd?=+@wCfh!;?IzpnWIIK+m&n$F+RGNQT}!ry z$(BpD^<=w;Y-`B2m27!r+Y6hk`Zls2C1fVq&X8>m+1gQ^p8?yshhEq8K`1qC0s;Dw zWi0;wMUE%&hfvyX{D~I;Zp0t|P;B^}duYXqygW@`Opa3urz{;%{@Q#LnwA0p32XRn zw5F{BK);~<7pA@xrAE8%?NB`0!*E;dmR<1GGsa+wK?6NqgB#Q4q}A~GKCjjI{Hl#qqy>vY71Q`&(n^qYl0if<|Y zL<&Fz{`g1HkhJmPQhdY*KYU6<{mAlNgr*JY3U_1|jd}*{339~1LDGGN9EmQtDr~O> zK+T2YYGhaZ0LQ<mF z&;jA#7$=(1haY#X8f z@o5RvieAU(|3d9~imd!oBOu$^lwc~8P03FB3AP_;(`*4XDmSg53a!Jjw+ z5P?7bff;^ES|nqlx`j{!@J9^!mj_5b593d`0qTV}n)cKi8_&n+LtNRKW5L2)$J~XB z7o=*_u8-IH_U)IQma{lBH>Ypz(p;_aRrP)$T1Y+2RgJYSj@a85B+t)Cag1G%lbgLb zB{yT?f}CN%FP!VhU6`Ak=}5UfB{R)N&0UziBsn`ZV}a`yM-F^5ZI3zG$qQ1_18}3_ z#}b>|jQMF`TudG^VjO zIyoaVE!DAbfg?99Cl>)4Ym@rLIBuMD{WM36BVp3mX^v@5*VJh@HKsh{e@=EvzwC^h zl-m+1Ku*8x+XfC;oY5z%PjYH%-}JPlmq3|B2r?Sj-xy3E{*lDPuJJSQ{v()ca7q~y&@&b(-}zF1vZeL$D}&xBch zGUr?x)g|R2GhH!5`Tt$b%S^vCZi_FeqGT$vz-+iKR_8O91d?5hYT+eGZejLCljjO- zXE~Q7;T%hJe=j+76j_=7Tu)qR-Z`0gEi@&MvzIsROa>35^&)o_UUQ#Up z;ib`KC;Q6w@A{vd?Bq+!aQ3CiFFW&mcCHI_w>gV1tsY!b4PE;8Rn%qo@t{+wyW+-y z1LkYfFakK@lXG&?QZaG>*WbdaQAOdR=JROdjCI6Jn1I1#>a?i=!%muGVYXxb!fcFN zG@LZXd^B0h?xij1r6mK-(URwA+0F3RYYuR5_L^gS7o$JxT|ZJU7sm8heUkUdSUs+R zm~Q+$PM?Umah>0!sks9a6Z`icG$%PHBPDU+TnxNv$@7hfm3o_YPN!!34^;khF&fTU zJeR$t(`n2ZuV3pbi4M||F#SG;Da$l)-zsRbrQGptH7&YvkQR?cQXb68PMD!I3DQa& z*u{sL*BS40k~vJ%PQ#2(!R)wckmg9matdZS%vzY0X_%Nd3(_LzY1$T;(f4cG0hr|* zF*#b=90dQura#Q$Cp2w#XpmO*6bNC)KdWgcVMe}ygoGjDgPOJ$X89paI|wsO3N5oG z7&a2xR+vf9?;a<2KcP))g>VCeRsu5`-?yxSnUpBB-mPKI5!zCi@o6rh?S-WrtE#YY z2Hw z8>D67eD-WIcM9zQ%*b+~HKH}=8$v6DS+XB^m{l&!Vq0Gh!ViR&1hevEq!?!27ebqG z1tR=LXq#Y0|0uL$FtwAQYY%^zTVa+qmD;k7NN8KB9e^2+*W6CR4C^ShL7fnBKdI%x zEWS=^2g#fvH3#O^jyX~*f$7S^f_X+~An@gj?Jz6XpdxeugGZ&-8)p2!r8bS+FCYRk zKbKlkH!wOTwXHDAk4voRK7h8mzpJ!7RQ**SdB` z2JQr1_aK*+b+@jS0ui=G*N(u9EY`K49&m5fwL+Ms+Yu0E4KCYt?HQzD=8c*9CM^@6 z>Bdjg(44t3Ol&ZeglZxStGt>p%%odrBDw|qT4}<8MQJISy)-RrDrl#IcA6&2r(s>< zNYF%50z9T`S|!%QkvGC)z7~|VL=#mjH7#j1aQA@mJqUE4CL%XtMY2&7c~}URKLlnE zfyX17sC)#GJc=-{Y7I+YL*zRV?hWw%59oiaH6|e%la-R|r=$F8gP_ z4uaRgY>yCOsG;%u!4x&L^j#qw?}0fgW!2|GmK+nB0~Ip<3=%A)C~qXS8XOufZ6-x& zbE%hfl%lee)FUIMtaM5dIaX?66F@fwm2kQgVK>X*ymYu1O06neio9Iu3W~o&imW?P zD_vl69~fdem9+u(N2Dx$2kt{)^bv4Jq)0;L3p*-B$q&H)3Pvq-t-O^kk~-_bRfF^( z$JM$hxn2);%+Z6AQguH>nj=%!q8I8SYzc6vgeA*#QJHt89vrq_4~pNY zi_*>T_?Ir?pFkCRQWwS8;d7kOMT92Bx|oKJ@XE(g-B5Nl{|+$WGb+4%Oc49T#VIq3 z-0&Ii+R{K_98XK8sO*6CE_meKqs)>m3ZG=TvuZ3lh@9xMu>2&G+BKO~=r1@t`Uf(p zos&r&7MaxE$#f`xRByCPCP0@+W@&ee5M3j=se>VtIv_HWurI>yaAj6?QDz?2sf4ez z%y?|akUI>0IpgP8bkOl~cy#6T*$6EjTUvz3!*(i}<(3)QO1Z1jtQ4aoBLA@G6oca5 zl)E(C^2ZXL{FB;PbXNG9mX`Z6W!}|DNxYCu#IKd2JSkx5IAzwL0+9QDi*U1LW)&!W zrCTw2(!!ToX3b^FKM%V=6h6x`9mUFBW4WWzPmq5x1~m*X=rk;ku#HwqHz+d+wVnK5 zwIbMSneSTWVaxo=GLKv4Da+JCR8AXPW^2prXqi1i(7jRw11v;*LzRPgD}~Wk%C$#T zifNoC`r#J+Xgi!`&a%u@%UocYOD%JyWya@Q8T}lC3NfU?g3L;^TQVJ;R77j702?i{ zq@7Bjc7-x&qCoW8c;%)+h}WWma0X z+VP+wD6w+>jAhcWNc2^ADKmPdqN}n*TD3&EX}Bi3?N+#5mU+N3KTzfnEv$_aVUlIi z41{xpDHEAAg(CBa74Ta!(RB@Uy<~M=HI~oomitf39fTPng=}t_Z7s92W%jnrA(pw% z3SViNpIPQH%lyeQYnAEJWJ47}Q_E~)nGVam$}$I8=Czg?XPHwhbGBv9wahHbyu&hA zS>`>Kxrt459gkUvt(LjNGRrOVEz3M)nO|6@X_+T1^R#6)uo`ZdWnONXT`jY(Wez2i zx~`EHVuEE(x6CBVoM)N2mRa+xsx=78zY;2+fL~;sk|<5&$;**yRSsy<=tsIb`Vrj_ z4r>wQS!UrF#h}(Q9Tvk<%UwcM=gKgfk8J|kwi)fd(=U1$c-%L+)rd+faEZm7mIoAR zv1L|fDtGxpW#;87v+6dO#K5s!A($;d<=u7Nj>5WbI|W&k0&hiv-lgHjBt58I+|;p2 z8^!3Pt4B>8dBgauuo)w>8sT5qWTRP^Ak5TnhtMWL=%HkwXe14X(_kmj!jAF-#;;N{v2#5=cXm*`YHR7xQEV3PEAZn&dFuzGJ|Pj|E3sv zU?9|-;12WSV+>)D~n3kQr5H+Osr#hJ;5?_K;Zl+D2 z)ITyYF=gq}ibsH;J9!@}%T=e+np%BUsT8M$dAZ_iD;phsMC=G+T<*sNLx zM3J$S6JgZ+gpa(xkg9hH3dsvoDHv}&x zxkR1F7^B1b_s?DEN2e%ki~a+EO-WDAwx|`l;efP7&J>HL;lQ+obCGXiGuW7&p@%lU z8tR-x!e$uHX6XHlCo=RM?bB7VtR15Z>A|z z2I=k`v@k1;I}W={F3!KH6Qzm{my=>R{?OxPUbOf5d3uZpz0j6dlK|$%(OdOVK~xyV z7k}z8#x0q8vvz|L6VYw4K$BB))3OtD(iSaFTac2*ZK0>rIc3t+#Qv6S7OMVr?6kyb zk%>;{)TF)|XGiR)^Vx``Cz=heQOd}>k zz$8V>a|9MfW{%N6GN|{ki^d$4IAuH~Y=E!d&scEFSnxucru7F~BWtBT)A%whsDZI) zrM|oVAQZUo*Ohvys$h=a-}zlgn%5KM7HdLqPHeY=oZqpP;_VpzS$*HsdY#C5(buRZ zGR;SLq3F9%^mJ$`fVJv5%IowT8zZtSMGN#52@95BEKZyP&EO$0-ah-aI)~(>Ey&HjozgyaASZp(KZe2-Muk#S0WG`aAA?{t8=w-k9sO49uP}=;Wqn&*ix*iR{7*24yVB z$aP}sK$5yJi8Tpe0hQMwsWAO z3}xpgX6G*86g8n-WA2umh_ejnPB8yWTbh!VMaLkBpj?Gwf?VkQGI9xfz#nW*+ASFi zFg?vpNhhC5zYqGR%*4eD(w1hWVbtPkb=dElMv}BcRr&FAv(xG&!Ss0=x489|vZje~ zr(3_gXRQyPh;mrCgrd)D%9)&>oO5e7q9#;fQ)8DKr^?*&c^*W>rR20zS4NKi)83hfM^&V4ztX1@2(kna2#e6{TfpvY1Z6OpqyrHM z4G9VAIGvCLY0O3vBI?X^iyLm(D0omo8U{fb#mFFWpLQ8HR2oMG1vL&hEGqOUAmjSo zPt|ie=|cwQ{jT}vy{?yws`Rhwsi&&WT4$;IRN|GE^3)8<3=&sWRF&0UOZWz3RZXL8 zMTi-D3T5w=cy+l)F6I`ZT5qIphl%T}+jLeYwDM`m^<|~ia#{Ggl6^xRwia@}%)kZG zyWha7TFPB*plWDh1HUZvc=fX7GQm1LmYj%7$+YI#iuN2 z@RW%wQWq4~PV}h2o|nO|%RYh;T z$zuKacCoTohIpiRTG4bjE^jA@PZCq;=bHYhMbq_z7g-ZD@qtbM{Q)hp+sTnatE?$4 zpIWgb5APf3i*)UhE_C@JmTFYy-Cp{66RlNVaT@nDLpHo!Co^Bs)Cp7kq@@>O$H7Yg zTjM4cRn&Rt-KKK!Vkd`qXuveFXZ(aB&OhK1v60K1(;8m_JsKBvo%3zHy1o%V#mkG6 z$GU0O@EE*c8He$y_{r)JYda*1ZQb-iOSS18#C!eI#mZFurAn<|thn_OVUa^v3=-QL z3AY`>uES9CUTxHZ_Uw!i^Et<@Vq=_U^(P6<+9D&o!Dh`Cw|B@9cgH&%Vsm_k@v@hb zmTO=At3%qzVd4p_emb$O?m$QC+vBlZQ}MQEs(7(uirCoMAs+6chdml@?LM5LAHP~l zv;3H&J1VvG9!s6Vq6X1X&&s`RE*!+o@ihfITv2@KEn2fE&mxZ@8 zsp_@yRP_c_9mt}sCkHKe)zy?$)Ys?YDLe9x#Czr~u6LK$c^WI~z{ldtqxf{Z+)uGT zmNt0no%6)@PVn!9Gk-2EkSX{T%)?uTkt@|er^vPG!<~$)QL&|yX7$ZPiI9w3C>EN9 zsA&!&A6}BiR{cY#iQ;sRG;!Cc40YC;S&a&R8kKApt42={e;YeGMSNA9TJNr|cZ#KR z)9c-(bywl%^0}g;LwtUoU3{L9B35=!70-^+U%FH4nRw&q^xC?b`GpJUSXy7uP+HgE ztP;14)^~@sUi0rBom^jrBXWLeRmF_bTJ-)EtlzSlD%}4m&mz|zmrLB+Srwm7gKzP3 zcQ`D^YlBn>CGH<1EM?-M&bVB9c#PE=`YY}X^15q#L1A@@8@lMnPHXt)U5?Nq7mVw= zIK+moZ7w$VCBO+Dp24fUp2nLk4fVL0B#vNX`A)mgdn!l7^0oAut`6}|*VfBuv9cRq zazD^5UES58TVLV>_zdC+fUuaZoL}#1zA)a@4b>}C@kLkjWj&r-UuB8D0kEu_={~`7 zcnISwaaOAjPdTjCfQ-ZHcYsoYGWKtz2K{#~b$2D`V}8)GydPf*@9=B2`k#|6c$w-b zz|pF-(sNx!dA9I%mutK}XK@v+?`>nTOz?MkciLNC!J84G*HJ{vuc>Y=CEo6i({x2$ zb!nwhZqrzda&S1zU0hw3zqm>+<@HH;6p$@G?4Bczc2{l>O1E#qt^Wp# zw+F8%(fv11mDrvoEb}oCtzUp#53Ui#H$CX&o}St$K0wvsH{r;7RZT;#G;)efJ>|G1 z8$&qMzoRD^;}R8@nBuv_dT|=dsS&Rx%oES|#Oi$u3s?B@ia6e%c$=G4-%#VNHER2! zr>9>0+@Hr@9`Vaiyh(wF$Xt-0b~y>fm%#XX~7idsD{^qHNN zpEDCp+Sez$sL-9~&c)5X)dPf}l?T!rAWpVvlPYj7I7|__dK;PLYAwfOp$lc3JfCD=?|x$v$?Z z6=hAI<8)1*Q;;=#3Kl@V*fRodKa^`x#vvK|@bUsSP8o;Q?@v*+mgf=2`poi(6MazM zLh(H|qm~1*@Ie`WLG7b%x@S8JoP}sY;^ofSGeHt%p*@Mx&r^x;vold9?Z#_IO^2v# zqxfs0M{FO3BhX>;*dpV=QTpxw%5vX5THo~LebEtmf33A2SZyLO42vFb_+Y$MQ(o?A zbYFueVxbf`-1Ee;etP~r+7;fn@m`Ye7#S58iw*r|%__zX+bUXgZ}&qQz$hbv{bm_h zC0@gOPW~J5wvX`LL9riCZKaRHZG6m|C+_PX?FC7<_iy#%1^cN9%gIS_rF3;4TxmJZ z?7SJ+40uJp*1v$aN%6H!?&ES}K7rSu0{6?Zcv_6ZnrP{dTYc%+C9rq?+AY57kKf<) z$HDI=D;;M2h(*h4D{Sj)OUt|!9&yhAzD<3@C0NSOk%4~~46MnKAst4C;^P4+MPkRe zv`FF%oboCw#H#VBk)#4TbBY}f5tlx{ys##>78m?$E=ZeSo?mf|(=`Eulia-NPH}Qz zhPYvnLu?wBF;O0Ral|Q?$IAzkQtI6}d#{{pwKh>BEJb8lin z-jeP@aHq|hhaH04G-9b97*Z@zx}t<5L-gaima8}ETI@x~hoI;OvgjV^Y#+tGZ`!({ zLWhR7dLjOLC^@-w-nTee_)p0)rzsBnh}hb)CJwQ0EvD62W>txm!*KM#=JCKVxDFso zgk|jC00Ue)yf)k+{xl}VeByp=tX(`kRv&*@>lgQVQmQzVq`!DbyK+?1IAO(L(uG@k zGw3FT+(LJcFbxmiOwu#&*Ia|Pj8mt7Od-L&6={2K3bvSy)VSi-g*qY*i)LhgYr=5- z_yH}}dwe8%wT&7b!puqZ_A}XmgEBrsao{MqD#v@US2@MTQB`zpE$evz`?^PL9n~lv zEX0NYGdTGY#u`SaWpk>rah4Z&Fm#fUk2Dd&(OYIO%zx z^tpU2n(&qMBxC>A^0$or$EYFtpnqz8E$@uhlO|acyx^f#Eo#Ngxixzt->dR=P92i^WuEKTj5~pY>#!3rQCBAPc4t^^ulyM7U_>CTf z;}E}eELu+8$VpUVw_QnUB^YC}50dl&W!j+P50bGhoFIqc?67T5WjMaT#K>P8O16!grro&(4Shgz3ZFF4x1Dy+P zq&mYCi>AlPcf|CCB)Pym;uN-+5c1HH=gB%iu?WiFK1`IwaeSvt`IyS91)|SCgj?eq z$LY5n(uQ~s=AbW!$;Nkt;->rYj;Y1CHZQogs$T3Fr>@G~Zo+Kw{v3fZ>gVHf#1G@t zCF1dMGypz14vTAjM{>1+oX{xrw(*p6_jqiLNP~NslP%Vb&k-+-7nX&|a_e~#W?22A z8HOQg==-DLVyASm8#zr#LlrW|Ar6h_CmP~Jy0A`&oK%WR>u`BmTQ6R|u=PwMUa{++ zt=0NlZpqdMozN0T>9a(K3AmYFfH6Hea69K@?o5Epi$$$U$VXw)!`b&FoU#_7NZ0 z)md*{iqKkpVN7qARWypdIjIXgSJ6X(Pjhf)KvBHf=HE;n$~{%}NMG%c1|G2mTT(^-`y4;_Fb%k_P^?XNt>pCsba#xD}`4QYU z4I|69pR$@hrSkq?P&{@*V`*Jv6F!>aNaO1tI+@Gkh)4XGl3J~Rz%>6WcRVsOm=XVFq?te$@X~hP-Ev)KCUoZ=eeNTV(tg6{DT! zm5KU4f7E^xE0*E@jUF@9ny-luFV<(B((q#5JCpR!=WAEQisiWPqOY&k2I#J?)()1} zC+Qbh2rH)GHPpT z6*r1EF46D)K}+oYE-k&k$wGT%=RTG0!%5cjb=zh4c8e8L(D=h-?f+7iM{JbAlDgdTUXC=+ZMl@pznTWaZ^+PhlH#C@ zeWzs6TRI~pw4CDb6BGyjOtBAI4`|HOoyoCWAKjkN;yQ?5oDT8j47F0+TeP8__P9{w zWtds?6+ddJdT@(2)^f)beXwR7(0TSWTqLcS3X9h|>$Q(-gY{jp);P<}Q+0Qo_0ryV zASZZ$Dhe*^LY3Zysqq?Z64jRXFO}Pfe&qt34#LxE^H`X$8z`k%cs++ww(LASmXL0M27E0>EHmx!9x^>k9WCm zD=a^np*z-V$@(WgExz|>*yw%VQFhBu(&+ZC)HwTMZHoSvty+A?oil0S?w(2O>ZT5# zplQCwNoZ-EjAb8GV9NUsdz3}HLu2v3l^8#oqnd> z8#vXLiI->NCQ3tP1>2>bY4^MrhB(Z*agf9#M!M(HD88G$fX+Bzy!la&Atp7nZ7bH( z=np-_ar`j)X>k|fG39*ERg3E?&M=-QUM-M)QcW@Ed+WvH@a8*0e&|H9w}4JDpBA77 zq#@@^iUTVCTGl4l!5NKORX88dA8F;hI|s#%(`xYjlM4G~98|x*As6bMmIf>rFD*cE zq|jJ1YKf+pn^`Y*;9fD-vUyQ#nS)KhoY*uc?aaiN(W)S7$3WyX#lgqBA@=&W(I5Zc zDGvNdagz`4VA7UlJk_90?DQN|-ZtT9xC`Hq0DIq!WFL7^L_CB`S$@+%{8EJ5oY8ml z^UCNw83*6t)h}GCb?k}vNWLv<=Y6Lk$oN+gc7zkC$Qnj`hCBKC0y%iUxE%-d!r#Zm z*sJ{A;UKgEu?W526Y*ZeSP^s){$p_i{aH2_=VzH0mhrL=$Sxq`CdBGr%RpaDZJ<*i z#ue85mT*i{ysat57n5MK1vQ&LCKS^W6O48Fkkq322j-WQgj{x4Q;e;|X7gKGI+g^j z;n-k&i#6D}sb|O%=$sI+B-mVbTgc*zvHRjfU2L|dxKOOk_~(m(|4dh{-JThYYd*M5 zdm=_(xm~k)16}QQ__g^gEipbzg570rifc(pC<$48c7H#=)o!zA`sr0&`nP`rro^B( zZ$p%%(qa`I2gHcEF;-DB0+a3V_waR?HH7@|M$C!B-}f&}i{{%*Kn*-SU;a@gnqeX5&TZWz7B+szIxmF%eTPf%uuSychGJRKjGHASYMECxE=|_LFR)74^jC7a~Ub$HB|9H z=D>2rzcTV4R(v^_cDsZN)C`g(k}*YQj^fn?n6*U)M#2s*;9`UCxIln;V4-qoa4vI@ z^RJYQRmKy%mYR5-iJzuPnbZKIz#ew!Vh2Am)6`XTT=c}`O|lPNr+5-`n7NiY0kaIr z{yAnl^FC%5^M&3b<&dT&Qh_@pW1C>^S4{b>yxPP==c@9C{bQ1`3c38nm#OjwKVxEV z4yK_}j|_u%Bny%7d)1&XIp5&(u2A+a&d*}5Wxj?vfoBmtBNKV%LNqkeHkDObn_EzIG7 zDllmtSGZnrfSKk?lf!1_&_=}v!L*yUFw;qhxa1L)pU9kvDQ$ArU|-8WuF40PA7KtMUs$2?Gchrn{NbU4tPc~l)vUp7oREOYvShH6 z+0J}WG7db<=gsE^Gp8`uGGEHYZo=mPO?nMr(sco8#+Fc9CwOkxbgIx~qf z5N}~7aR%ZSm`S98IHcGs)fy<_02`2M1Mw+lQg0xR$4G{HKq3yr1DHw7f%rmZ5_KT{ zH8Y7j5YJ&Ikq6=hlCl4h+5;tA&jzIWK)jrp)E|h~Gm{Dg@pfiXgCKsLnN%T&KV~L% z2;#4qNhN|Jb^8bEp#l;C0m(ybsaHwrK>VI~<1%DCYcN3 z{gqh%)Bw`EpoFmD5PBEH)+&`x`WM8B%%p=soWx9e7{r;(q>DjZ$V~be#0!{7CxiHR zUQQsv3`+1blW+#{MrIPwAby&ebTo+HW+pui;udDo)gV5>O!^wc9jjG`NN0oCJAe~N zaDx);%p|-)oWo249K>^(Nr;2El6e?jL?HGtmou+qCV>vhe}tKYI>27>JSQAvgAg+* zcTjzEDYh4-0TrYQSiwaVU5WS9%?+6CLvRF(e}^9kl&i&VbILq47VCv!qaN&pu# z$1^WtPGG*B*~WarV2>*Au2U7*Zd1J1;71jI&zu34=l_BAsz4?iWHQfXhT@&-c z%uATJF#DL_W?s!4W)3j-Xi)y1ew0-M(m5f>2F1*KnXhARVP3_2nt2@IpH;R>6XLn z`>SFMIi=%Zj8_Slae|+@hPmZQRlyC+nWz~*#l6fyW{AK@hop-{`Teknr~+4lvaeLd4W{`g5M9*!BlizJfX7dc`*|lkO7P zuak`Z&yJ5lQUcUOq(fi6VmdES1>qFMIKD{sPgb1C+>)*MGUm*QitCu6UnBkB%v{U- zATjNKnY<3S8U>nFkFc%D3Q2;B8aO^yF-cPqJDEvpiukw8nfS5?@eU(@p5k51t_sCR z!CvZNOO;Btwx<-gFemI# zd^!%te`-L&3gxgz2j!ra4aOO~P37k?C-6qJfH^oy<>Lhb>5oLcsKHM%la?0oJIo|q zM4Z$S>z^7x;#-t(TSsPICG^;r@=3Og^65b>aSQYFl6}I^+E(Bc91@s0A%$`%KQ?$oZ@y zhvzAWhP=>hW|kQeizQ>M2h}LDzn_`p%7{s1o*HDR5uN6Ik}sqD1)Ws~ zNajqQ|5s5$SFGEk>e&CdH1J7fH!2WfHsp-HVkX5m%I}18JymGP8;xQ%WRCJAV`PLI z)MQ`DOgFOS`TuTC5ZzS^HyZ{CivPlF=lng)Hs<3-`SHrWFFHdTDG9Jqg-&MI1&XgX z@-N}*{~eqlpzKBkb}h{4uROiFNM-;deH4N7NrG0$cWGgmSedlY$!*OXg94QLqUoJLZ}12A=v+^ z2ctM4I81Ria{^cRTjr)QD*syM&?v>bn0+?IpD~l1A^AVfTrx!QFU$ci7wFcVTLcL@ zDlmyT;TgpXn1if&wTjvHv&w&k+0XgkFxy$;sz(pyKj9-~pT+DA@(qPWoRG;Cu4k@& zUKQAFIQXaHn4ZdEV29!qgZT!=6lPzu%DHOcsExw8k>}+rwbC~o0#N5Qk z?su5|d?fsuIbnxtVAtNN0i*~?4R$bxxPi05^8D}T0u6=%v(B6V=}B_%95YEx5+7tH zX-eWQeNZ8e6(xKm9n8FpIgPoN`O-do{wIw~a!^VJbTZ+sc!^{TBDsev*g=3DJi_?` z%7Rq>HG{c_2iV@l_CIjGkNusG7a`?3a&eExV<1oKjMPENVIFfPpMJ|F<}< z4DG$X7brF~_kPc;wD(Z|Gn`ofg#$LYVazx$UV%4h~GoZhQ{80gO{rc2H2FpOm5(n%woODU(HM! zeDeB#HzyckdV>dZgFaCWs9-j<^|mk@8hbNwR-8f8(MpvaaJY! z%zLo^Q-LZ@FvRzsVKzkgPBI%}e8Yz+2O$>ao6Bs7^YtIj4Z@T)^8XiRL#*$f5!`@B z`Tqa?BUOSS-j|K@I+w6*)_#qSCE|m>1)B)3z6&osnKQbF?fu~Yb zend5JMXE|L)B_9C6dNjnUD6dBYJv|l8!Cc>Ca8QvO>i5tp(=RV$mi#RWf{`mD-4;z zH7Y?Ea)W!A4OPK@6IBIRhRWa(W)f(ob)J2ZvNu!**AjQe>6&lD?UwAt!)H#2 zyBG#>Smzh15z0l(QbZ08YlveK@JnswH%i7x29Bu0+raosKjpu*CVpJ8#mN7e*o(J! zjD*RPWa$W3nD|Z;Z!z(!CjP|4V}2Fwe+iiO|44?>DjcB~!xpChqNwt{~aO^Gu8xBT)^y z-NX+@vsdhjPN12gaNx5D{?}h}>qeSn;vy4QnRtzfw?#45|M92<+!UG;-GEdRPcm_V zi7z*Csfn+VObZGBP`|iYB}96>uB`#`A2;O(O}xj%hfVymiF;0MT}4#C7}X|$IL*Y< z6sr~^zu3ec6aUV{x0-lGE6e)Dn$`rWUu-t5sfZQ_85A2D&0iJvj?%O-wHvKoKN2E1o7_}Ii> zn0P35Sls#-IS5XKDF{;$rXk=Ff|!Yb8|7ja0`As|LWCj&`a0xg2zbsRN~r&(2)IQr z$`HyCu0dFWa4iB}Xcc&XK@Tm&?-4d2;A&gEgzyT&YY4cQ6>lKCg@BtK;$4JY2)hw* zohkl?@IJx^2zwBQq2a?3KEm&DA0yg_Fail95%%NvCkUhPdo%)WUWm^SS`a?hZ{Dj7 z@{UDv62dqH+;S8bBG?fe2+0U32&o8Z2_!8=(ZD6k#4h8A3S%MC0jd8L}C;d5qve zScq^nLL~yOv_%aO5bi{{3t>6J-3We!6$tkr+>5Xh0hf&8J_H?iR>f-kxF6vG zga;9DtsvGSJcNKNBl?#)ME&*Qw+v&zw9=*`f*M(cjC!mm^$(P>rw% zp$?%Qp@Dixz5cK4CRoA$)4jy|-`q|9M|%kx`}Y{3-?0~yP5*CS`QNaw^gqkK(%g4H zW?go6n3cDzB(Bw*_Nn%(xb8{?3?jmY4p?*bL2Z@w;%RC`3C%SedQ=Q0vaD#X#r5uK;#{le<~^~TB<54t5v0nroOkyB5kfX`6b3S;#~S?|IlKyxiwNqu}ul7 zM%jj?Vq{yUIa0)!3#4a$sU`MmyQ);>lvRZ+Z`&-RketWmIM+Ngu0a`}bGBKObsA|0 z%jsi-{@wgBqx~np#7S8-(ve2WmuH=;7FA1nWG>ymov~%IZ=Lf+Q@$coxx5es;OTc~ zEr2cDw9!W|(R3C{rb%T~K|3?RqWl{(0=;KU32Zylu5A%x?qS=sG&x`J>`hBE=Eb!w zNINyAmAT#H<)$R-q`g?CwI)S2KV#~dzWca#ezWD6Hlb5HGTpO0_<-;kGToHgj!ZWt zM`XGs7&6^}5jv%u*G6AV-|Eql^hKw&XS=pD(QM2a%G}i3Xu;jKnrLIs)a5>Vf#GfS z@6K)-AJOF2cPCjdXvQ4xs{cTZd+qnyUFVSB9?`z&pdlt`$Zt0f{6SmXE26eNzWq{d zr3za+#7f&2|Nkp(3w;-49Z72Y`M#I8>SwpJ(gtC6AZl*4F-=vJa|;KuQDlPSSsX=d z+H=%fIyyrWQ-8X7u;jNzzIhX0EsIP{c%NpyX z?T13nZ65WJkaL+2R`S;8GGndhRx|#}NNYm$hecY`&C1tjJseY!y zlWtq8^_klKd9L;BC=Ug6{Sg^;^AV=K(*^bkb+DqZ%T!+l{ctFZM^w%uu1wo^YGuWI z`Dp}q^y25CND98eBXxsKxw28whrNV$KUq5}vQ?TFcYA%X8GVQhh1#=%Px|OmJL|hW z>wkNsZ#%sDw?}%DQFND$lbgwi8+Vq`+=b3GPu0A|70_{kxB(xN2 zKD4O?+AFpAKn_G)-S|`$K5HQdDOWhDl6CWf!5y5-}SZTC(dent!(Vm(;W^d ze&#!;WEDy&RCIE>gVao?lZb0x9z+Qt9Y|d_T^iCN(Ld>Dy+GfXWbLWz6Rbl|d-#RUTeeN0glw@d>B6jX!&aVZ5w%*RIzd(zP~ z#iepfG1Q9|ic3hQMrLZRWL6h5Lo36T@0_{!0rh?V|L^<#KHryfX3m^BbIzHWGt0ft zO(}CeU*}M0Y#A+)7yd;{E7t|LjJ6?!0{!<^YH_s9%A5Ti`}s+NTA|f}yg7)5I_lb~ z^g^bJg1kA8hB|-HL8V8#t8~mWb9fUEb1n6CycMpNz5{LHKggTguu#Xip(Waf`W3>eOzICem8d5%bTBYyuLB&33v@j=5u0ovbyPkT(z2`REekv*OJQBzNaR zjlo}Iz`RcQD2(aMwt7#g6smO6cQKdh{H({S(xS~j={lIJfnlQF*`4TAv#T``ajGh# zuM)FK?>!N+Xu1R7DsWGAJmgywQkw^CpjNF(BA40|f_>)-f7bgY;sqJcs}c!`BcvJ7 zqTvt!ozwmv13m+?qES)(r3(@n$$uKGb2Nuo`8)Wv3p)Gl?jF|``cIrb*yV(`Io&FR zMcbHnSS@g_{2Uqw;T=H$Ds^d}L;^~}n>aFaoV_l`kas8SWaJYlAjbK12IH(+6Cl&9 zT4lJaM2_Sl{h7h|uM+Pr5reV9U_5Ckup1kKnfXn*0|=(bOL^tg7 zx(aNS%2GGba~w7XLJe=`)qx?A<@SsH1ZjS`GRI;_siAb!xV3+d!wW@Y48~ueyBxsr&_naelECt%N5P{@E0sZ_@T$@eoQGy#ZDpSDv8Oa}h-9AoaeFWQ z5Q!*rU^pA{LJ6da{o+@IoArMgB=eUackoLYhz<);-hikFV@4Z5`pFtOqLo?qNt?mc z3B4%>+n7trZxD&>eXw(g#U)`&>kI|pm4e_=28pz#OC#%*@}@YT=GQHYtOtUAIJ7wP zliuvD9_HqaK%Oed=aor7RupG* z&reUV*TT(DJ{`+eJDW#u3um8qH}h?CZ8AVdgQ=kE84oL_F6M6Aom}-TkyLgGC7SkE zA~GIRnzS^(vAsPDcQog1@5K5znTxm2XJZ`A-FCENwk^zKceHLFf)xw)Tf-QJ`nA}! zzJ+Ca6_g=eAuY@sc6d8hJ81Np4ytEo_cwpL>FIRst5(Ngkpt)VEblMrgXLU zS&aT8(aH%BY%uEDDmjoS6b?1%KaKz*%p`+R|6xQ)kDVha+tbhd?yd+*OHS`%luhem zuKKL4?=on`n7{35eZAUq1!V@*ZK0Uup{@IxopyKcItX&2SnJ)gFy#5N*>ehl0A=G7 z04tiCvvv<=rq1TF-M;L*=H?r_d$WGc&F*`A+pG(dNRN8_-!^KWkLy5kyvIeRt^wFy@1oMH-7+EUXH$|4_)it%x>k9P^CjDh7H{{hq z&*;B>)ofqvY*+dhSo12BnnL%#Y7Q*+&RNySvka3ksFbL2$#)S-I~vb-B?N zI(+^Uu};habh4Nze_EMW9`Fy^14W=ptsx=mj;Y5|C@8VQDRs*fc_**D-WYkO<}?oI zf>0B1Lh%Py<~s*EF|Y0=ZgPSREA=-oD1Sv7|Ad)$mjA_8cPJ@3>c!aXcIG3;Uy)ip zWF>cwZ=vktHs+OIMYEVT=AXavlb$?aB~2DU!-^Bbq$W^a0%FP&;D>F%?V`cp?J z%l0fOKfPFzy8gjR23O@#sknxj&wSTcS`4_^xz;wZH4M9jv@-WR*UhcuH)aVmtBN+j zcwBu6K>lr3vfx}aV^f?;s?Lw4QomoAx#NW^QuZxoZgTO2wDMcK5RBUb zL(0z`y(S=ov0(gV5k2Ar+K)Nq*hOaE^Yd2{`Inhz-}=z4!v!?H%oplIfO16y0jlE# zW`5D=h`VmDS9Yh_G@dY`aCPy^J_AdMt;xC z?n-;f|9e(4P)TKhpI3>R#pg8*EzO`6$`L56$#=xXL71iNu43k&Zf8p#=a_lI@4KCE zNy5QX|5P0eo=yLbnZ53G^!fx#j0J|P!n4r=?Z=$b{99&DxHI14;#tx1QcKIw#(32E z;8|93;f_0%)}LYKzy3(K)}IlK>1H3LmECAyIphm*M7esJmArR1l}S@hF>`&bd!Nix zplxqEp=~-!nv4WsB{eezHFWPYkW>)d<2E4EssJz%=2oB6%p7yCPm3#Gi)Q>mA6V8$ zK4az$_u5Hozh>r&dwEje*Q{jN{eDckU%^UDe@B6OUorEQf3l^HfJZ+VAl*8_%xeK} z1biLvgcGc!&A-5?JI>6Rb=lI&W6T`*(CPh$U8P|nIY4TnlFZ8C@QC)f18<) zJ!~hM$!g z@}vW8_suob$oVxuhhg<1%Bt;+sT%lbhY8QZhpbspqg-+(T>K#j}pS`M+Vh%C6wM1j3=0EJSsAI}s`joHi#TDr!&K&q%l@`K{CqRo%W)x=`>3)-LHZuLh-127RWXj1(q8tl%gHn-;pLXiw6Q|FtyU6frF^p`?;#MaK4199e@NHj0H~60QXg(!GZ1k zsv~Hy$3uv@by5?<-*lo@?(YKCVn=_FatQV!P}wfsgD-HRt=KpZ&Yfrn_Fx+?ccO1J z`wq@opp3mmif^th+OZwT7BO*fem(?Q6!X5jDrT-bpXCf-vkCfAEw#B>`E zBLt=!j!v9zKW^c3TTu_sM_Vo9yPzx`huv?;UQo6a(tPDRQY(J472Vgi=W(Pu?>`1} z?*=HMkoOwr9`Y)GZsr?ZsW<`wzMfRabzbxxR=klf@}i0Cwe?)_qJ!9jbv(eErm~G2_(pHqozac* z_uljjW9!%P&3<$Sb6LY3TGLlq)H*)0H7Ia^%h|2z7|LQ-%V*lqa}xXIeZHv!^_GH9 zGJdQB9W4D`!MLqI9WNC^VyZt4r#ud;$20d>4 z;UKRpTnK$wpr3q%@m1Yuh_nY1Ro!Se22Ica`fBsh$X>92BJS3gn)vVl+RJHNCUjU! z7{c0;s(%wKTN^-go!*A{rxY)17zg@OWsG+Tq|<05UlU0EoMM+Yc3cR`95A<@p9!P` z?c7ZaPLEGuhp412bWmZQ7`FN?5Q+`@ zrI0a2Rq?m{sSlqYMD2a7zeLq%RVlARqe9h_ktcu)h;Rkao$m~y9a;=p(xA|oLZ$QU zdim!d8bl@UeT=8{p}tP)lp6`w!qh(uIpw2w`SsDXRgW!>nQ9hz_BrnQJk(pGckU;4Tcd?n*@- z8YI^S(e_k2yPNTYuYwiMV#aG$tbm*nwMeyMJY-(9B6g8#MJy}|pi?xSX$zd)CN)^W z77Fb~K!IjOb3xHZZxl7Wom4Aga|GW5NAB7WtoYnf-W5(=s016|=Zq){1tThVykJE3 zf<`0Qg6-To62=Z3av^GIHoOTr<>@=B4gQdM(FXhZstxwrghsxw$b$`Ek87~u^S6a= zKH}^udg8F4=*fqo#@*(s4fgW{Uqy4C91b=tYA!z+gf_r&_Bk7B2Y?N8K7PT5_H&=J zq3c#Y{xz@x&by5^bcLMq*=*H@x~4DNaAdY>!;#HGqgpu9femv5RawqW$7W5N`q>l;RDq@faBM z8I+pSKlJ8w6z#+YP3K)l(e&}ztA(Y%Jw@akFsQ*dZqtO#ze0gA|1>nCv=bElRETLH zZa>yAzGTCqWKn7DQ^p^RqT#+{gxJVx*bbtm24j9HO6rbmCjE_7d|V7zx+Fz@Cx-T> z9dlsxXqJL)c=41Q`sguO+A#V4fSh8REP7lgLxw-Cg_z_phDI>&WIlEbEgJ7_MkVa_ zJVNArX+VQXN2eeqbTkO`K_mFTW9ed7PZVK{tc0$tgiYDsSj!Z=WhFO{qpjJ{Bv~Fudr~&IkpDTJx;bC@ z_j#+%LQXl8pjx#CG7VM*w@L;*hhYpah(nEUB%t7eWIk~W_236yr#aC#R-lG_6kAKSLKQtZ(@y??fpHD=TD%K5_`b-nF+Ly^;iEObECmO z*bk3KfjvMVbYh1B9Pgg&hd8;*L>flfNfS?-M01&8KEF4K&UHOI5$c=Dss#Ifbr>8| zswVP9Z__lGvChhOC0=U$3Wj7eGrpOQAuBr7h?i5SAx&AN#LxEVxRu!Wer9%OH zI!S&bmUgD>v!&b^M<=sk^Y|Zebb;%c*F}TnYJ)i7aIg67>pU+W8a(qlKN?Rx*mzh= zSC_wxZfqCtHI>Rp0J6}g zP>!2SJ5W}(h|iruN3&^J*mw@R9mAuiQYUsNhEJJFLw#yuu*2q8nez961Q_WMF-!u2 zPqP;CV^is%u8V=`KbwCvvaxw#_BEJ2%IVQ^&t%$zvQs(oj1=0DvW*Kkp9XuiKBIW$ zG#bQuFW^t7(E_$(K3_f^#`~y|ym&g4kC`w31bONjJY4w3|6d$4`+X6CZ+Z>q9;r0O z##@wz9(kM3PNl(JtD|1hZ9MQRV}~{B=8A;gp#c0x$d^-T9`(2kaSvv}s#HM6{6dHw z(3gl5XL(K<^`*{hW{4tda0e72Qur|Wvve9sog-63?cONF7?}$}IagUCH_4z~sWTHn z&CVXfAKYI;S)DSFzm`cWyh4Uxwcv460h!9`gu6okLIm&{!n9KQv@UX5Z*tJbS6U5MaWb7*^q^Em%iEkJlt1m7`-hO&VXyk-s^1PQx|kULZdX9eZ0fqcwdYRDOJk&#kgXa%0b6*#*>IS4s75EOt%Cm!k=gtvB$ zJdZ#W@az^mw`%?s8iqD`f#<5qvrO<**L<(?{CwegIfs!ahbU77)76?iD$|h{n2JEM{F{27h}y~71KM9iZT*~3(IzD!G1=S$0Qb-p;K%6{+Q zeEBC7DwxV%nlJx`s`KT#C=Jb-uFjVt$i6U_#e8w;_tJcM*cnE=(qDF80H-47CzGHB zV?NGuXh=-OFc!3-XasC{dk5ru_ukR^F05O*D{t z-o_YEV7CP#kYxsH9PK=~uPy7w*DQx4>ZAbq+vRjJ^|OK?0sNOoApi68U8~iXk6J<7 zdQ^0Ra`E)j@~{q`AHZo(ncY=hxdH+Q^L?GW6w)s2-gq8aNPU{F?~Hz%0*^!aimq@& zvS&Phw~+R9weNy6?J7hblYmF-tRbGpkLN!WQhz3O=JkaT@j^QCfR*$fo8FPPc^}Tl z>nAe)#{0B=+aOfLm>&ifp-fwasn6P(SDrc=kZQ83^t^kX0oPnAM14MjVh zr-?9P_c53o_(0jquf9*)(yN@Bsju|?8;rL#(|YN<2~2MP0UahWLwlaZVQPQdhQlS^ z7}jkdZ@PxAb2YaHX%PHGuZs@AIJ~MgFIz*sDdkt!z>&?eVU^zUzV$SRvLH`6cmws4*dqT(fgA2GJov>;bSlgC;9;BTOlIZ5ixIDO=e}F$o2;k1oV$fO zQO7zLZK%WT4hCA~Hy8ftR_guANlSs|+%jJ*4Rvm`r1UWme68x`Key7iC~MhDp8N^T zVC<8Y{K7UcrELpty&X*PX(>Ylry&c=x#bRA{WX_`bee?X1HSaCzsMjLC<#)Xf0!5+AG`MjxoU=MvjnYAt7y_dFa z-ve)tjQ880|&^EpPr4IJKzP@S!*T8=ijHTl2T}Q?KsB?>?)qfxB6l4X^-* zK@R4%@1*0JGvLuf^mXq@lgm&>q$nZ6aN%=1=$2c0L)9Rv+6} zKT=t=$M&hnw4R3_png8x8<>h-Wa@@Y6IG`By)2UAUSz6;0>zUbJwUzv_Cs2{MgczX zQ`u_a*(DtB^oNk`+G?5lw4U`G*G~_HT7t`X)M&R5*+4HDhJNsKe4CIjFLWf3z?ogp zTc*$mWd2qU@g?mbb#>@_2OKHJBJO1B^?a{PT{=GP2}}-91YQkj^s1tSutu*|Dc*na zTA8-X*$CobCsYfux>|W(WM)+xXoVrKg2Cfi1(f){R4CCxC;>0K^wpmNiv5ydNXQG_ zrxv#n#rjVnXHegUxn#fCMiA#;Qrbe7S~^%!{2>QEdb^alL*pRQsGo!NOra?P&8kzL z==knZ>hj8^c7h%bbfrR6!?RgvpvqUPe2z3zuwN1BUUBaQyPq(t9)Rxehr0=+9p!zbkG1M&iW%NO!_ci@4!crp$V z_I?j+AKpr80j8KDpBVMGdb|lFc(KZ0488`XumoaG8Tp((ic(Tz(WmjPB^0v`=t65t zUsNk6>Z#>WHl|A1QOgq#!M$)=55|`sqHUxhkl1~QUY2x(@vfVh8w;WGCtuLHl$LSd zGTNr&+FxIksczPfJZTWSDp`b=KlqF?>MxypLSW0R%WPdV+O`_vnz z%=WKo5P!Ohdh$=o>2S9QV1|{f68K;(s6qs5!JtQ!+a0B?A`-C`a48Ogn_k!nWxjac zP~WCeA{&d<14syn)A-dFZ90IYmMO^D_uoeIaY0bL6}k2p^`TP2Ln^mCK_^h@ z^gmQi`w9-*(ieYIzM+D8O4}e&RzX9Z-v1j~(jFT+VEu(q()=VW6~EtqPBJdXXMg5l zC*c`E%LkOFoTQO{gE|NorDL^GIQHP}j8+Yi|MPz+|MnzxYo66eGXd?vN!nJr+@5i- zO4#(kOqYGWrZ;HwDNa!J>!qibRw=XYQ*QeW9Tc_f5;zXuW(3g=4h^E6K{aE(KeQ`+ zpklsOxt3JFua< zYC{&R%UYeezoQMeU=Ls!K|**r_c}-2y59V)QA@E;_zFDHsMqr^@&zlDC!V8zE_=k7 zD-%Y&eI0cS-s;Ktx^uLhlw3pk@pE*gROG?rao@uhmwv#9T%hgfOrCau`UV?+Zfvj| zdwa(DXYeGq@ntW|23&+$TzVG%O!V__JeiJq-Ak+bOR0aFRK6Yy9T}U#&ybjT%&<*9j)^m%4ooh;4uO|_(Om8_ zi8ZHu$WL@{^T|-pGLo)PZhez>qaVv5H>n+E?Fk?JGwkBsFH?Ey&$N!x`8@6y>gKrd ze4~PesNkZn_;M(aM%ch(zh9ua4mM1#`URSkb~a)1u;1um+B^rMoYqvzdCFaDps7`| zp@y!Z(t$e4f4&VBv(Hhv+3(O+mmd$n5LkGk9IpBsHX>!h9gj~pHgCY@ub1(FKWLX$ z2f!G3EAJ|-&FYQ!QRurxRL=SXUQ>{soTl7-7oO{NI7{WyyKoz4lM9mI9<}ZX_uEO` zxYIrA)WPADi0$H(V%o2Oe2ncaky@Z0)(Y&lJ*A(HxJN0xyh8b?`?Rlg5fX*>sjGCW zlJcGR>5889C)G6q1;84i$${fCt{j(8Z9ljyv5XwN3{rfdZrWe8vvlty#Mi%Q>oKQ6 zh+wIKcZFaf8wg7W1+N5vSKbJJ6W_K|Pe9!&8huiZ!duEP@6=Z*U)U7fgr&v#Z|d9k z(>>r{vCDgLm46TDYLn0+=n8MtmVVVB99H=a2juj>X&)+8K`{92AKFTSP|Q#ML$l#= zH05Cr=!eoS2qxDazys>g6I6cofCf|P+hdgXtfQe)$_dJ|>u8L0_E*YJ*U?RG-yBt4 zju(Qa{dI`ID%10m4P%1fr4EmUcIK`A({NfEeOGAM^?iS@ykDKnB0X2S?f1p&tVVrWY1fzWa&gyCWba~d{nN09Y_ zGMe{(3Zt^(Cgt%@LDQaPLen*>rbU{jA!U?%JOfR8mr;4_Gt|@sq}BDbkM!jilz(3j zd!eXm${*H)j17l`j5t+BvL>VG5M5QmLZnTH=>EG5B>ZuR@~({ak=h=ld^%%oq#v$P zzLK#`u2!W&f_5(yph>VU<*!MsH?t{~^Cgx*+13O6wvM%xGGSu3&_lf?`$fIF2g1)p ztG9GNKc$Cy#{IJ1iuI@L+xi4m{^dJF zb{ulx^UfPA1MoOZWN5a>#pjxhDuTnt8W@&qls$X7$%g&H-Y@1EO<8vq@;U#cDf4#m z`9VmX0Y7^HsoszSsU`B|rYwls?S$B+Z4ajG%iKv zyE}N11MB8EWP779MTGee`Ar9AV&S`ZS_?LnE!fE~wP2&!scpP#OE$gfxNRUC4kA9= z&!y8@+4Q*myxY}vnz{c zhqmy)U0Ekqu!Z}%F)wzxh=;kccAdTzelE+!-OoA>(ZnR)wNV}yY2(I12-(C7-I$M5 z@B`(aLrpevGylkfUJ#2kESvb4Ck&p6Zb6d7}7e;}z+9{$1!moKU zH^q%SLo(Bs^vnk6IPw z@kYMKi?sj}sm4*Q>_CEP7FMY;7-#!J^ ztMHx=>##=tu?Iu}xmyPoNZFtdctmeDs7WCXzFB6zvNyXTFYAa!zpvyQ`?B5g^iG&- zTF7%lSu4K3GkX%&DH~j;jc1{rI}l*esI-Aaqj4>DMQ!^oZ**q}w&Fei8Nb(s1u?^N z-o7gv)3zr}g2UIut7p!|yTBm@c5$CmqCA{~Hp8RqygAm~Aqbwo9_Y$K*ogvO+m-pS zgcb1K4-0l_j^2gi2+BUR5ULaeOXZYL>;|5>xSZ#81JB$zOl8*q=EUp_5MPZK>MM-F z{UMb0?#}e^D$JLZhX;X^JeG359^j-|@1m1ZbSyCs-7}OOUnGNPY#FmzD1%dOQ0AY5 z{e92(;K0BMq-3_dad1T5z8ko0^{gTEX z4ugOYl*VU8v5~C%Ot~_O{YqKaR9-v+3f`F^caCNsQ06(E9~%jTY18EXqu4Xb>OSE8 zN3-*;R!NO+GJv5<&6sEP%B89DD`QwY_+dtpJaR0HXS(%E;Y9kvX}K5g_d0WEb0=Q- z3XUHbDXS2HukHfXRMrpIjw^9I?RC~R;-AS4&Tu~Qt{6PeAD%BX7ORKnuR(;ihO39( z(s=do?Dr^7IDUDqSO6{$YxKG}2!9>NznZ{8eBO(D$;q`C(B@jG;^^E>)EI4{sqLB6 zqw}dZ8(mY3RX-c?j8A?87VI=LJ`L(ke*~g5uR2dq>xqTFU_TL^ z)mU662xrGN@T*=adyXKQ+Vvcv6q{NH1W?D7ryivPdA~%K?{{r3lAP0EKERS)HlVS` z#P(v>Sbj5+#dUpc>`Of+t}uGMOcl*~kLBq}5L&Fq@+C>E%_~2Td7-YUtQd89eRN|V z;$p7!i+skvPh!K}KZX)GrJsEp5d3}$`U%D@9I+zD@xD{o+wSkji1MLod1*s=@mO9p zg>_`#$H3F@;SSCAXi>K5p84?;wlIO#0MJ{^Kk*fCXl9uWS~>PG`s& z+3YpyG;u(qVx^Bju~&nh@v7PEUDhc=etixrwqhTJ@@6@Vv$Os9)*M#A{^`Smav{1F z_mL;$vWe7P>1}DKV1G3j2O+BxZQRy}S1n}2ogVdSY(or!YyQvV?u*#J5)17mcUrO-xCegt zH{9x(d~_?jFSVTBf~xOWX}{v?7{)i%GC%(7Hs-)|PIBEg2G2n*JMh{a%!36v$aXu~ zL&l1l%htQuMu~mZOy0hi!B3#JG?DH1vF(hF{#!nDfL)=^MID8=%kMXOyS0w*C}m?u zc4m#Z$B0;b-tx~c0ACPatT&J_yKBuDF`$c>;ni+7e!`?k37iWiKQej zItUvvHVl3)@C9fkz4DC6#xk~zu`9RbpmHWrmwI2JR_#BHYAt+B_^_jF%qY`C%VE}} zpWUHBFVdjb1SFcA2MSbXje7Y!hJl27DIn2Ua0?*lC5rApBK)tTtg9D?H`pLrh1^B^ z@&z)LIbiLSheYmwjJ0HvC!}IdummPO`kTlHD^Tg3KgkJSvsC7iQcfm0d#D8!a zPHwmVB=UEsS(r|G;|`IXzJoPd>Y)%h=X-XLvGeEUJ{K7LjHS&jA}_nh_E0JHXCn9e zk&Tli$7;e?UuE$vozFf6!TIUJk0+Iu*NAL$jr~ET?CV5+c%A)4r4yHl{AV=_mmHNJ z;HiZ6j+9tOzNwH0-h$1X^xy)K=l;s>P-*D*f;*e>>$llC$KB$}Lmhfx7;5p(|J8N$N~n5+GVX9O_} z7m^dF2%lQOyrhUTM4tU8^QTf&9pM$*n6G@Smf3*5r-*#^9*d`J`$>7^Ht7tNE`LQh z{fF(6{y9nH;(u5(IB$Pt;W~Isu|un5 z-*!@eiOqYT$N5Wtv9kC1n2ypmcBN3R?y*^Xs$a-h_mIL z$6BP7!Y@!^q@tSpA0SmxwrUQ4 zZHwe5_lS@lQTD+s9xzC{#Yh%+87!S+wHfm5!BQv6j=v?h8X`^8vEZ3JFG@;hU#H6d zL`fBJM>~U;jga19^QX&wqop>C%}drC)F(-G&}T`igVrTz4(dHgbI^yAGzY!0=sz5E zZKCR+-zGFV=zDP1e>ms>5>3t<1yUXK_C(b|!zVU6XwK{Zi-R7&p*d*LNX(wPU=$9P^HJh_aYaZofe4!kYKz{TE0>oZjl&Ab1t-WR=mKpUUeNNT(Tl z*jr9nDE(mNauK}uQY?DChZc(x;Gu|R2#<)v#$VchbVs7e*+U>T7X2Hf#-h%rg0M{8 zfczbxbrEhhU7@)Ez)*-tnGH4GEnv&#Vxu&TvQYut(*(n9ejpDwNuRMb0UW-lv6W5e zs&-6t7p-I3be8!FDU&%jgNLjyO~Qgs>KNl48!gC#&qDmi7@LAblk*6H)G^knlRCzp z!N&|hM==Tg{WSw{5~ja233t9C|G83n!q^-B@*f{akFDUzP0c!~E!*SE?bl25*i#?b zv|e)4(M$Z}BB1}}!M`a2dbkINx#}WM+9bV3=?{F{W+<$6<7YQRVShIn=C2cD5iWAv z$C8OkKRH<DA^x8Q)YHr)rEbEx6B4$;-Ea(G)rfp3}oU zL{F8m128HsE%^GKl8>JovVEzlXs5DSscgU90k#Vc{OV3A*6Cj2v-*QDpNJ8D01vNa zS12PL_=sJSYs66a*&f^zZPP~N{9?F3DmR$mSMWpa8hSYrC{e`*qanm#j8dQ!{zf?% zjAN?s!fz4Zy-NxVDu&lw3?}#($fwYl5NDBDtq_okg7l?Fp}pFruURWykmUOu$wqOvkdVhXz*ez&k>H@z=`}ej zhm-P~gLQASEj?MKyz>}(@_&0;YO>*(`=wV|P6(IxOWoWKLQ^LrZ;2M+TQ;g6 z;GL3%ynesbA^KI2E}UbGJg!~%U^h=YeA5W~E%3&og- zqxzUq^WaH+4QP)8u~vBu4{i=f9dwIq+{U!Ym zY+4;?1ZAWL=RK(BJxZmP{P7P=)sqx_>5tgVkJ2j)J!MTHuRciS-W0CiH=(XfM(Yfi=Brf5^GX>b4{<6x)8 z4`q~sHt(D6qC-u$!n>G1ygL`vc=_@*csDf$Sr{6LQAE2R+b}f@~iN(E)|~ ztHi-J!k;jTTEnwj{CtKw7$R#;hR%6Mbw>EiM&um`X0^s}U%u&})XEijg=c^PVjI4n zB}zT9)H&x?4gM42ruj1$oQK!!)&GXf2ZuXNn9%vpCVtQg>-F%57Nim2Yf);*0; z)isHY-RmlP^o8=PHT@gQ-Sd8O$a|Ory^ac^EthKCUnsT~5-g?XYaVEZz}SJxI#CJ> zurN-gu@`Do)uVBC z*8JKC9J0of#C0~POWLie*$-(%>DVQ)H1~0ziH^27eU|$RA zel}{uBu-eS2_RpfpztN9axv1>r9vw&v)AS|A%pv^Iry5)pH_YV5x)j z^#3}r#JH+_t{#jlbu6g^T^&(4iqvV2;XhJ=fa2N^KVBMGqB~nb@5ADo1N$TqA0bAH zSjqR4N`B3iZ^psuAx0B?)NIvVU28UD9B)Z=ZNgf?U6Q)Uif^SgzTyCn@{|csO%$pe z_=*GU@fw!lN~PmHK8xyl=k)AGNPW8y0s9EpPr&{Hh6y-8zz6{c31|@TH35eSI9$MJ z0Y?cqTEMXaju&u(fD;9LQ^2?!fhG%>DBu(UlLee6;0yt03YacnhJaZDW(zn+z!n2)IPzc=hd;i_8iE3k7^%zz+mmE#MjfKNN7ifExrX5^%GC zTLt_?z-;4uMD2v{LtrGTdd zJT2f^0jmT&C*XMjF9>)^z{>(&74SO1oceavB6Cx~TLS(npd#RH0q+QSSHM~U?+f_1 zfDZ($6Y!CMPXv4>Ab~SyeLE(gPCzRGtr6z5Ybr9f0yY=WLBN&*Itl0^psRrH0(uJQ zEugP}tp#i=V0!`m1$;%o&H{E7FhIcW0_OA(sHcD-0`?KGpMd=Z3=?pGfDr-?63`&v zYXS}vaJYcc0*(@Jw18s;953Jm0VfLhW{yB{0!|h%QNSqzCJQ)Cz!?J06fj-D3<0wQ z%mxTQlrHdk`U)Z8G4<{K09=@i#F}5>aG!h{b|W=cF~#6KQgaSdrFs~DHIFVX6hDR%6N=Q_C^c8B>ce)f-cDFlE5hOiYczR3fGlF*N~G z8JLR3R8B4?;n&#p$%UBehp7#i>W-=Vr<2nEC`$ zIhb0HsTG)l7b5DDKf=^fOnru_1(+(s6n@_@`81}cVd@H|;xKg^Q)4lO?=R%kz%$$W z1fsrGQxsjJSCElgd<)KN^G$CPUh4vSNmOvDtv&zigsQwK2h6Q*`ysuhlf&6oD+0+_f07z~(q^U-<88TPs$x5Vv`C&S^d1N_ODSq*>I@Fz;DAc6Jo!XNz+fFJyc ze<%<_&blv&)C1c^u6QItm?A?lf&b>gpA9dw)p_w14mxYzwWF@5Gc z19e9!oy~^@=|<2D`NJUH5G$I^Z}rwiwI7s}m5}T^WM*boAK!L?0c~s|k`mGqlb)mC z4w-N0qwAj&4IfUxj}gBET{Rl0@X29-Y98tMN#P<}LaqX?ZBB^4zeLho5|RZt8ir0e z;Bwdq+jf*lH5_Y)0S-tZ-9W)d<3a2$B(JmBcHg!p!b{BfB0agfNZ zAY>QfuL-FGoDL5?BD#RUa}YfM`~D0H0FHYI3Url77@;H!aIGyRe*-RtCr^vJfna!g zbOLa?HzhiFbJG_dqebHzoPLxP0xkr66>(d5*c1r-9bhCcg@iARZR_q}2|Qsn0470{ zd;qu*9_UsBt_`KcHwZitNy%xz#lt9Z?EwnG2|E$6FFbLr23!QVGki0(DwC2YJwZ{B zZ|DUI<$}V11M(@^2RM2)i~{(oZgI{hlnlcJ+#MA4h6?a~Sl>R-@Oeru0S^0>k{*3Q zfqRtX0uHcdWEbFc_!ZiD%)>kFhJJt}7^w~gIYSxg3}1 zwz@gVp$`6}Nwq(r>9A730z?bpQoYF-ZxiZJKuFPhP_YmO-Ac$G z0(u#gmlMhNIPg|LLzTp;@N2?~zk&Lfh*i~(gwM14)$lt{-vNxq4FK8@MhjnKBy2dNRpWsk&uHxeMrw0`{vOjiY-YOXt&EPV`jY9R zzh%0@?-(t=0E6fv2)M*Z^pA|D|Hw$;Rmj70BBDU$8b*EZGJPC;5U@xBKf;%6NHd9+ z+rs#;lV|{Zw5Yt5ME&45Nbt4l4iFxy;X7pDLh+Sr3l?SO=qBxQoV4$nhrusJu(Wou z%3bu2ip%X)dajl)9H;TYbVUBbV=Bh!C8Wc&MU2xFF-|wc7&j2(v_l-Gmgk7+As8Ss zA+B1XF+zmGJkE2(7zaci0w>~f_^uOT{8}60bPp95#j6TdYd9LN#jqSd=8ZTErZr;x z)Dm<)G%!)EQ1y<+@V1I`=c_nC6X2lXfCVajcY9TVQVrwxu~Bdp{0a-P!wnS|-%)XG zty=Gx#_x~=bZDOx-BcL@o@xy~QE_gaicf15E@-$~!?!j3w}zi-*c#ReRG_7XJvH23 z!vPxZ0~jVBxNfGZK>BS>0f=Ns$4G{_7JkEyxI9A701=6o+0o9B&3rYD#o=z z@WJAR7?)ebxcnlH02f>4nq7{!HrIx09pJC!$7}h?8lIuyYz^mXc$tQ~YxVkRc#wvp zH9SGXi5i}%;v6zZBP`PJat*K6aFK?0Xn3E74{Nwm!{;=7Rl~n(xK_jPHBn){P8*TU z1%|Qisu5aixU+_PYB)^8uW5L+hTqh1vW7D>{Emi~Xt+?rA8L53h67;9q~c%%or3>x z_XTkg)=PrRAc1Wav4=kg_=6u=5ZGQ3NBC&Jk9A3Olg?~)v`%L;ByPqaJf9Kn6|L(| z!}!Q(oj=cu*0p3y>p73sWw6mh_{h<^Ry-Pjbz*#UHpyMuguB0^E9B-eI@dOpb+8M@ zf3y(f;J>ig*a^K-GUGE7Qc_aL$c$Y1>oK}bOs*fV3)AtONjfV&c#{b9Tzi#Mn_unX^)pU`vouEVT^df3($)Yyug0ZV<-%x6_B|A)`qA_I#ZW zTchK#3v|P+kh@5vW7swwug}p%@arA)Ry;aK*Mt>6M`;>8G$9q)OB;zcD6(ASN3u#G zW`IMljHJw@jO?UH!Cj?N`C)&(9dcjN^36KxMeS-Wzigq-ktsU9aiQ)tR;v-aEYjI_ zt7_5`Esx3Sot2c4nldv!D=8cGSZa;7$Hr$uYgw@wSu>GXXwC2C>wE&&sD%l0;$wk- zPD++A)EXtlB5`uk)RdXA3Gr|?z>;m&Jba1Hvu|-D$CQkuq}Zf62}$W$DQQA>X=CBk zS@9W(vGECS%}U7-9xu1%#Y=SVIhBn(S;-k`vr%}Js!M8o=JbqNGX?u4m6VwkpD;Z( zA$fZ2l=zex$Xl%zWTnkWo1K(_6a^{qlhZPU3AG}Zm6n1W7FCl=j?xhgEPh`EHB85!|26MKYUVKwGclTs7X=VDgTvZ-m=qHe90&rA|F z*NN=(#1!F=+@?^sQHQ0N&77$bazI+4pfqx<5&6u7_?fD`BAb-~eUEK#vt*Nn^kPdk zH62S!Em>93axI%UOO#e>S(vfNT-CHi4(O7VF*8A}eMu{yso7br<+IWfh1nuIH!~|q z%#>Qp&YEfQSsiAx8!XeJ6pbZ%BE=G~)cBN{q<0D&Yh&XxGUDfw)lr0{=0Mz-law$k zD=9WPDLxTKQ1ArO9}gjL41-8&HJps=P4?<~kt6yL@|!-8thee;jx;6u-eZ$8Qf9zh zNhFJCOjb~AY#@2kJdiAEF_e7Krq|eP7=TH0$g{!3CJ>(O_9k_@U~1`M7Bls$c&wt8A%RD^~?kvr$X{n6tNB@AF}}R8w(<9r5&QF<_Z=B zWoi~2h1-N`sAbcg)LI3Qn@s}AI_nT}$0iu;CI_4KA}ei!Fj?80(`7oRoP*B2p@Gzd zSe*W`=@8^_AVOQ@M^D0#v)(EeJ$KTU=m(JEcKEoI=%K*l z$&Y-X>tKHf8OV~BaQA{W_?de;clLKv-r^oOnS9{^gSIX7d^Lhv1Vx>2ARs90jH%Ah z)k9Lqj%FiM$ev~(d>Yw@L#{g%Rto^vW(+Ne9Tgc9IXaeHX*MBp)CesnDlE4ZGVY>` zMYe+UE}ZoGRs};72b6!vVGsuIpH8T4G{KcI<3W53G*~jGauru;cyT&`-!A|27A!`T^6papb(+ z$dThm|6GDxZoKXA`35 zKh4z*Yeo(@^dxoufuyh#f7MP8Uvxeb%x5R)2ITx14pEVuaEKln(=(RT`4BcBmQ*=F z`htT_R}44YI$ia3fCMgIz?RJP_=Kbs^1wmcHlGaE>1vG(%8NgOWk=V&VObdhYvSP+ zL1W2>t%DngQ4pbLB$0=$d#I!_u>Qngq$eM?CssYDB#urSlpZ;a#xq`Y(Z$wbYSn_y85CycuEPR>mi;(GAYo>^O2r>NIl3aU9I*q0^?3 z?;Uld_EVH7CQ}U5#&~toQ4P83RR78ue6vG{Qz4v;!DqXWQVSOn5Q7sVl4c}jC4pTF zoo2!ARaCVfiV5y4>Fp76Bw|WGbn1RpY=jU@n5C89ekS z!s1$BXwseRa1SK!`2@YZ#25MokoCU&$U2?7)mMH!$Txoc#yZ_3{|{Od9V{==u*yW? z!9tA2{T?svTt4&TUVrPN-B+|$Hwy4%0?sdj_umdMQ0`0o?0TI+cgAyg3Xfl-3mZ2o zCODRS?+Hfa>Oi~NwFrwpLs(cMAiRhLrT97)OH7(PYicA}>XnKcW+C<&%;FUCzE?I` zI21ZtFxMW`@x34EoCaU<(zZ!30W;yC0}Fkg5A4G;#-$`?B}d{RR0z5618u^8G6C8b zu=op+7O?nB9k<<}^JIIyS2feS<=g?@+Al#H9c;42_6tS`L{oClTisDij*K3ZogGR3 z^@amfQf30~&ldZp#-_r?bxtH%9|iq!808n0Bdk6u+7dALn2`J8)(>X!uRfqN8W1t7 zmDs?Q_^JN2Y|IY&@gFzne8wH@0B$>u0t>%JSalYluIRjI;wr+TYY2-4EEll$7j&)Y zNU}%U;1Lt->MX)9`0^1Ob#6JA+v{|>zaldRv4)WJ&^Oj%IN1!w)!xT83;)7)svaYI z1M4O~;jk2P*&iY)lz}G8^uS$?kW`Cw5&T!1AR4a~lx^@p0h+_TF#m0%&Ymr8&DW39 zwa(em7i>9zJVi3Xs^5^)vdxc~oBDrRI~VAvs;iHmOzs4XDC5UlUV)Ghk;fz?fe2`9 zfPbw-!6F^@55QY$`j}K-PEFgl3uZt*l@Ig^g23iOp#SuZVRvQ&5RMbI`Ra&tF zh@c>T|9#H?U~=*6TJ37q+IQx+_dc)tzUS^enW0|kYVPYRDg;Z^!QskRqPBM}RiAcM zKDp)mpsU=k?&*rvmDE*XX)K4eCm5;Z5YR4vcMkn;47^Jr$S{(K@6<2F?s zu~n>w4L6ps)I*0Rj*2B$y`5>EKnm5SUhbz+r&Z4t-FStN2bAAr6`IQhpkzdKRmp9k zaZ{ub*~k7^a(nT_17%765io^ zv-{$Sd+=m6Kf6Cp&bOf;9xBu$*;xI$Q!}T?Jt!)AA`6$i{~3QPzAn$gM*IpLcVbxL z>^uffZ)#(fxq{8fQK>)FHB;@)(oM`%PYuYQGu$EqrfgZUar8d% zos^EAk=kW@?$nk9EOF?ti$&64PpzMy=HB_V)6MtW?r!}FC%gN1I82iBVRK^l-QQajS!oqED)6W*DFCSDNd`c+b0>>U*G_nSGU>g;~~Zcc6ipN!-}t4PSx+Dy|jGX zkc6g8uC5q+`-BPOtA>`VqdnblQ-7CK_4nTHf(oZ^+WG;xYV!a+A?T|e=+0i`6guue z^r~07Kflwkog>R4bK?_Huo!Cje{8ox#W2yx~H+-Rg zv|qiOuTtH6raRZBsweZ@+LxS)RP}IQH@U(Y?L0FOw(01Qdqrn|TB=&q*Ueq!ba6Y( zbTTh|zbIGjF2ZKG7w`QY;}&WyZaeagTYQ?6nHK4vtA5qrP2B2S=7v@}O`9wmh}~vh zQ#ZWQ>F#@_KrAH%F&r832b#)O{k2|3QE6&X2(wfbV{!Zqz7BWZ^9%cjriBd8RErDU zjOU%Utsjwfxm*`|PL{D%D2hE`xWA>lU<_s%KPhx;hWlG(|nR5!P^f3EM1A~*hm6YQ{bP+>)d zT5&o0yk2}_8+9oxjb{&cZwLP<-;x2^z4!4e#r>WVIL5^>`noI=dKulOi|*9Rz0yH9 zSmX5Rzi{BVNn@%is;kCKuAVV;+~7hpS*%a63ro?tGg2acPrB5HkYjXo9wylJM$1fl zWDr*UVA&R>O^#j-znXOSe^)tUebLL^HO>8P-Mgna=cTW>0+vTm%I99u#^24i^a?lk zC8w-K6#B#(sWY)l*Z)zvyZ9w%y6@1HZpzEf&A$6e-O87pUj)8D)%E+e%K=@@_tTvU z->ILNHagBg8{cEpk$-68>W==dzGEfQMyWgdb|dX38NNp9Ed8x*X)Zp^mzMOG0S7xn$vY z-f*sNuF3p!3%@&DVOs8-hPDpxd#-ZF@Pc!dJJEU!tz!h6WEp)$mNlEh@{!yu%UE1G zhgR$)tL#SiUxV>ARMgyZ~i4=w%#B3{M_)j?wNH?>y$uU%k|FclyF8gtvJ~%BjSrTNv6h{#muZfgIN+4Js3`YIsp~`q_Fr!A^vf}TH@rZBoIVxw4Qa7fc(+E}RiO;5= zDV2fd0|-+ZjnA*}qZ@7U`3dG!5LAMffOsn@pQ(ea!f=L%i!?{hMp4{IjxxGp7CBCS zglwZPUL*%GA1>{^ZaIwkPf;YHxDa0|$$sPv3fGX^lk2-1|9<4arG|e>j*usiB?MLK zzk?hjFD8d$MaJPdTL4p6QeZ2&a+2XaWQipe`w?c;jrHAj^7FCT&k9BD9kz>H|>5GjCdNM1}1k++d+$lqFjhOP`8Y8tF( zu+0q35oLJ|S%Udw4IdjCHU*-`jiN`H>44=)r*C@ zWEMG2J`tuOLB;gpra*u(EVbky`5)wR@?F;${}9=KEgSTk25%zA$)AuDze%oTb!XFv9o;_X%VBUrR-~Rwy-5 zvr-}QV%jaQC)d#a4mn0XL{5Be8XSSBUKvmgBf&P3CBRchfMs5993;|Hdbj{At2B9$ ziKB^^#kcEFqmQZBj`^gfLEWC^?p~=EAvV!apaU>=`zSsZ>bJvpC#Cme^7C5Rk8))vJzbdacR;W1>1-WI-{EK%IT3&;}9Exe2@QQg98$P(Nw zyqzpT-okq{JMQQ*RtkR=*ico12l!iE2vEYab@ z!pMc+B1<^A@W*5cD;GXOmgsU}|If{U zB+6X49XKo_lyGxV^rC}=oeN({mhf}o>&X&^E_sMtr|L3S!kgZ1Rji?$hG7kIlSH~cAEkpk^7UsCl`}_*p8B#qaHQ4#(DJRY^rK&lI@ZI^-HgxU;S>qqkv%HES;Z+%Rqv%!ocSjBAwf-*0#rxjbh0R&sP5 zj(_R#CMp6?7>5tYvF8kbK~^ss_T!u(Bdm-X?nKTwVK|puL%!PjbCZp-{+)3AO9y6B zA^A(fe<4d=lkgF;q$vrf``Lj%86HcP^d+(1O_nq!;m648L&NfRMFx<359?nX0(f^I zip2YdgXBn^VM${YyM!5u|1H+u-f%U!xP##b$ia?=pS66_@D_4Sm=1faqMdn=IBpBn zngT7Gu!A@}qyu?m$p{m^nJkG|!gpFbpN@Bvi(wUeK~qy-xR~2ygjPh5m1Ax~E6Fw^ zG4dqYW{$i-{{;PCGaOdYO{RhmSiq*3>}LT9(v}{dBumbl zaFg?71QDGXCftK;Q&NVJZEDIavSgNt|5KW={Us+&6qx?j724dDgJhe-(k|VsvP$N* z4A2}oo7+-JyQHA$`e?T~FNes?eNoNMM}2bqNzR)T2#NwH9`AJG0B}Z7GOTaW3>SQV`Cr9z7Q5uMl zWAu-a%V|%L11uj7Tx2R#ZA}F~vE0V+NOFSqyU0OqvIogAj`(S^q$x^=*4gr{4ZlH_ z^hMai>d)2zhldpSnjCFqxD`%NvWb#;W|ilWE3x;B|8?X*2V<`yM`(YDTul2~vZSQy z=l`8rfxVs`I8KK|hN-Yc3)6uhkNZ4w1{?Spxt<-KNiL>+2|2(M*Cy*PIdpRU-%CY| z=YiAYU`Nw|jx9|G%JF-$GU8%#k{ujFj?sUPwUbwngP3ZQ@_!&p60V$o)G;a~Ygf1f zMj|JY9oL&}79=OhrR3e@n}ktNvVWy~NHZoFxKq!gJ;VXZrj`1ej^y)y9UU?{n+iU( z%n=@Cfemah9jj6rjIzQ^a)=`yWbHUXNr!GEm!nbP8JaQ2)Qs2v#dJt=1kcmKrWI}z zM&UR+@Cp4xMW(~2=x@^x+q97mVy1J9xtivaZ93xhn&rHMbYtn!Y&zIH#V5!%UvVP~ zsNWm^kH{I!Yy6J>Ca+Pc_P8(Cr*fvY4b-euCDR+H&>psVj|-_Nro)S5n+N$e+2%tY zCfmHo=C~V{O%mjpF;8%>Z|(Nx@uiNDRSyo7A?EJte&qlc%>Dy^l1O}u=AZ1W=>+^R{1Hc#?r zWXb%NO}K4XgFJreEpbzynY%@V0kl+20ZE90Oy9W(NcbhfvH?qwTeJ0n~ZKmjeJi|6)bRF4d zjt=Q->^6gRG1+F4eiOEePt8u4m(K>6T6!Be?F;fZURw&PTdn_IDmpMe5j^YEL7@yKcZ+7@c(vwWk6t315W!@C=ESY`KX zTw#@mU-fW$|Hl3!J-pn*UwXJ-QN!}s{_`3s6oUC0I$+-Kvc{aP83!@{272t*dF-P+ zJhmaDeRXF;1vuj2c^+P-`G-yRqT#b0+U~J`;ISWUz|y|@u7N_h#el{m&hhXd50`nk z((u`RYKn(v|G>I^Rr`ZN+E-6{c!h`8czCmiU-$4^9{$r=HtnljXBE1Awb#Q3Jp4Bg zANBAz9##YO8a=y4&a=$+Rlq7t`>M5vJ9s$D!@WFQ=;6yfJeX|TSJ!wPZt!rWhbMVB zsIh zO9+06L|qJN55euB!ab(KeX7cUbcNt9T4h0UAUz?yAh<78eIP-|Ef74ht62~k?!AyX z5IlpbUx{KKHk zmO-9^d;mcxf%*`#3-V{kZpa?UUmzbr!h5m!81f0^*N`Y=Ipk@`GmvK?&q45ntz@Qi zCFFU?3lRKAIJFA$669sbYDf&S2C^3NTgdMq>mchPb&w5^jgU={S5nkvYBRq49n~)t4+%&6C-J<6MYd=RU|0$XAf#kgp*pAn!t&LjsVC zAT1#O;%9ndVIpNGp8Eqr*a`P(wd4Qx;+rassMoZGyUHz@ou4SV*P-{s)<+T5COVKH( zGh;_{3o04~g8oQAWTRer+`WwA10@|G%amiJfiOX&aK;P*yzsbq_|V^{O`KU2l+d?JNx@zc3TOPp; +VL_CTOR_IMP(VVortex) { + VVortex__Syms* __restrict vlSymsp = __VlSymsp = new VVortex__Syms(this, name()); + VVortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; // Reset internal values // Reset structure values _ctor_var_reset(); } -void Vvortex::__Vconfigure(Vvortex__Syms* vlSymsp, bool first) { +void VVortex::__Vconfigure(VVortex__Syms* vlSymsp, bool first) { if (0 && first) {} // Prevent unused this->__VlSymsp = vlSymsp; } -Vvortex::~Vvortex() { +VVortex::~VVortex() { delete __VlSymsp; __VlSymsp=NULL; } //-------------------- -void Vvortex::eval() { - VL_DEBUG_IF(VL_DBG_MSGF("+++++TOP Evaluate Vvortex::eval\n"); ); - Vvortex__Syms* __restrict vlSymsp = this->__VlSymsp; // Setup global symbol table - Vvortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; +void VVortex::eval() { + VL_DEBUG_IF(VL_DBG_MSGF("+++++TOP Evaluate VVortex::eval\n"); ); + VVortex__Syms* __restrict vlSymsp = this->__VlSymsp; // Setup global symbol table + VVortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; #ifdef VL_DEBUG // Debug assertions _eval_debug_assertions(); @@ -63,7 +63,7 @@ void Vvortex::eval() { } while (VL_UNLIKELY(__Vchange)); } -void Vvortex::_eval_initial_loop(Vvortex__Syms* __restrict vlSymsp) { +void VVortex::_eval_initial_loop(VVortex__Syms* __restrict vlSymsp) { vlSymsp->__Vm_didInit = true; _eval_initial(vlSymsp); // Evaluate till stable @@ -89,182 +89,1650 @@ void Vvortex::_eval_initial_loop(Vvortex__Syms* __restrict vlSymsp) { //-------------------- // Internal Methods -void Vvortex::_settle__TOP__1(Vvortex__Syms* __restrict vlSymsp) { - VL_DEBUG_IF(VL_DBG_MSGF("+ Vvortex::_settle__TOP__1\n"); ); - Vvortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; - // Body - vlTOPp->fe_delay = 0U; - vlTOPp->de_instruction = vlTOPp->vortex__DOT__vx_f_d_reg__DOT__instruction; -} - -VL_INLINE_OPT void Vvortex::_sequent__TOP__2(Vvortex__Syms* __restrict vlSymsp) { - VL_DEBUG_IF(VL_DBG_MSGF("+ Vvortex::_sequent__TOP__2\n"); ); - Vvortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; +VL_INLINE_OPT void VVortex::_sequent__TOP__1(VVortex__Syms* __restrict vlSymsp) { + VL_DEBUG_IF(VL_DBG_MSGF("+ VVortex::_sequent__TOP__1\n"); ); + VVortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; // Body // ALWAYS at VX_fetch.v:128 - vlTOPp->vortex__DOT__vx_fetch__DOT__delay_reg = 0U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__stall_reg = + ((~ (IData)(vlTOPp->reset)) & (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__stall)); // ALWAYS at VX_fetch.v:128 - vlTOPp->vortex__DOT__vx_fetch__DOT__stall_reg = 0U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__old = ((IData)(vlTOPp->reset) + ? 0U + : vlTOPp->Vortex__DOT__vx_fetch__DOT__temp_PC); // ALWAYS at VX_fetch.v:128 - vlTOPp->vortex__DOT__vx_fetch__DOT__JAL_reg = ((IData)(vlTOPp->reset) - ? 0U - : 4U); - // ALWAYS at VX_fetch.v:128 - vlTOPp->vortex__DOT__vx_fetch__DOT__BR_reg = ((IData)(vlTOPp->reset) + vlTOPp->Vortex__DOT__vx_fetch__DOT__BR_reg = ((IData)(vlTOPp->reset) ? 0U - : 4U); + : + ((IData)(4U) + + vlTOPp->Vortex__DOT__memory_branch_dest)); // ALWAYS at VX_fetch.v:128 - vlTOPp->vortex__DOT__vx_fetch__DOT__real_PC = ((IData)(vlTOPp->reset) + vlTOPp->Vortex__DOT__vx_fetch__DOT__delay_reg = 0U; + // ALWAYS at VX_fetch.v:128 + vlTOPp->Vortex__DOT__vx_fetch__DOT__real_PC = ((IData)(vlTOPp->reset) ? 0U : ((IData)(4U) - + vlTOPp->vortex__DOT__vx_fetch__DOT__PC_to_use)); + + vlTOPp->Vortex__DOT__vx_fetch__DOT__PC_to_use)); // ALWAYS at VX_fetch.v:128 - vlTOPp->vortex__DOT__vx_fetch__DOT__old = ((IData)(vlTOPp->reset) - ? 0U - : vlTOPp->vortex__DOT__vx_fetch__DOT__PC_to_use); - // ALWAYS at VX_fetch.v:128 - vlTOPp->vortex__DOT__vx_fetch__DOT__state = ((IData)(vlTOPp->reset) + vlTOPp->Vortex__DOT__vx_fetch__DOT__state = ((IData)(vlTOPp->reset) ? 0U : - ((IData)(vlTOPp->vortex__DOT__vx_fetch__DOT__prev_debug) + ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__prev_debug) ? 4U - : 0U)); + : + ((IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal) + ? 1U + : + ((IData)(vlTOPp->Vortex__DOT__memory_branch_dir) + ? 2U + : 0U)))); // ALWAYS at VX_fetch.v:128 - vlTOPp->vortex__DOT__vx_fetch__DOT__prev_debug = 0U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__JAL_reg = ((IData)(vlTOPp->reset) + ? 0U + : + ((IData)(4U) + + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal_dest)); + // ALWAYS at VX_fetch.v:128 + vlTOPp->Vortex__DOT__vx_fetch__DOT__prev_debug = 0U; // ALWAYS at VX_fetch.v:71 - vlTOPp->vortex__DOT__vx_fetch__DOT__PC_to_use = - ((IData)(vlTOPp->vortex__DOT__vx_fetch__DOT__delay_reg) - ? vlTOPp->vortex__DOT__vx_fetch__DOT__old - : ((IData)(vlTOPp->vortex__DOT__vx_fetch__DOT__stall_reg) - ? vlTOPp->vortex__DOT__vx_fetch__DOT__old - : ((0x10U & (IData)(vlTOPp->vortex__DOT__vx_fetch__DOT__state)) - ? 0U : ((8U & (IData)(vlTOPp->vortex__DOT__vx_fetch__DOT__state)) - ? 0U : ((4U & (IData)(vlTOPp->vortex__DOT__vx_fetch__DOT__state)) - ? ((2U & (IData)(vlTOPp->vortex__DOT__vx_fetch__DOT__state)) + vlTOPp->Vortex__DOT__vx_fetch__DOT__PC_to_use = + ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__delay_reg) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT__old + : ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__stall_reg) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT__old + : ((0x10U & (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__state)) + ? 0U : ((8U & (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__state)) + ? 0U : ((4U & (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__state)) + ? ((2U & (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__state)) ? 0U : ((1U - & (IData)(vlTOPp->vortex__DOT__vx_fetch__DOT__state)) + & (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__state)) ? 0U - : vlTOPp->vortex__DOT__vx_fetch__DOT__old)) - : ((2U & (IData)(vlTOPp->vortex__DOT__vx_fetch__DOT__state)) - ? ((1U & (IData)(vlTOPp->vortex__DOT__vx_fetch__DOT__state)) - ? vlTOPp->vortex__DOT__vx_fetch__DOT__real_PC - : vlTOPp->vortex__DOT__vx_fetch__DOT__BR_reg) - : ((1U & (IData)(vlTOPp->vortex__DOT__vx_fetch__DOT__state)) - ? vlTOPp->vortex__DOT__vx_fetch__DOT__JAL_reg - : vlTOPp->vortex__DOT__vx_fetch__DOT__real_PC))))))); - vlTOPp->curr_PC = vlTOPp->vortex__DOT__vx_fetch__DOT__PC_to_use; + : vlTOPp->Vortex__DOT__vx_fetch__DOT__old)) + : ((2U & (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__state)) + ? ((1U & (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__state)) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT__real_PC + : vlTOPp->Vortex__DOT__vx_fetch__DOT__BR_reg) + : ((1U & (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__state)) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT__JAL_reg + : vlTOPp->Vortex__DOT__vx_fetch__DOT__real_PC))))))); } -VL_INLINE_OPT void Vvortex::_sequent__TOP__3(Vvortex__Syms* __restrict vlSymsp) { - VL_DEBUG_IF(VL_DBG_MSGF("+ Vvortex::_sequent__TOP__3\n"); ); - Vvortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; +VL_INLINE_OPT void VVortex::_sequent__TOP__2(VVortex__Syms* __restrict vlSymsp) { + VL_DEBUG_IF(VL_DBG_MSGF("+ VVortex::_sequent__TOP__2\n"); ); + VVortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; + // Variables + // Begin mtask footprint all: + VL_SIG8(__Vdlyvdim0__Vortex__DOT__vx_decode__DOT__vx_register_file__DOT__registers__v0,4,0); + VL_SIG8(__Vdlyvset__Vortex__DOT__vx_decode__DOT__vx_register_file__DOT__registers__v0,0,0); + VL_SIG8(__Vdlyvset__Vortex__DOT__vx_csr_handler__DOT__csr__v0,0,0); + VL_SIG16(__Vdlyvdim0__Vortex__DOT__vx_csr_handler__DOT__csr__v0,11,0); + VL_SIG16(__Vdlyvval__Vortex__DOT__vx_csr_handler__DOT__csr__v0,11,0); + VL_SIG(__Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file__DOT__registers__v0,31,0); // Body - // ALWAYS at VX_f_d_reg.v:17 - VL_WRITEF("Fetch Inst: %10#\tDecode Inst: %10#\n", - 32,vlTOPp->fe_instruction,32,vlTOPp->vortex__DOT__vx_f_d_reg__DOT__instruction); + __Vdlyvset__Vortex__DOT__vx_csr_handler__DOT__csr__v0 = 0U; + __Vdlyvset__Vortex__DOT__vx_decode__DOT__vx_register_file__DOT__registers__v0 = 0U; + // ALWAYS at VX_csr_handler.v:34 + vlTOPp->Vortex__DOT__vx_csr_handler__DOT__decode_csr_address + = vlTOPp->Vortex__DOT__decode_csr_address; + // ALWAYS at VX_csr_handler.v:34 + vlTOPp->Vortex__DOT__vx_csr_handler__DOT__cycle + = (VL_ULL(1) + vlTOPp->Vortex__DOT__vx_csr_handler__DOT__cycle); + // ALWAYS at VX_e_m_reg.v:117 + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_type + = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__branch_type; + // ALWAYS at VX_e_m_reg.v:117 + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__curr_PC = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__curr_PC; + // ALWAYS at VX_e_m_reg.v:117 + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_offset + = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__itype_immed; + // ALWAYS at VX_d_e_reg.v:130 + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__upper_immed + = (0xfffffU & ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling) + ? 0U : ((0x37U == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) + ? (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0xcU) : ((0x17U + == + (0x7fU + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) + ? + (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0xcU) + : 0U)))); + // ALWAYS at VX_d_e_reg.v:130 + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rs2_src = + (1U & ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling) + ? 0U : (1U & (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_itype) + | (0x23U == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction))) + ? 1U : 0U)))); + // ALWAYS at VX_csr_handler.v:34 + if (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__valid) { + vlTOPp->Vortex__DOT__vx_csr_handler__DOT__instret + = (VL_ULL(1) + vlTOPp->Vortex__DOT__vx_csr_handler__DOT__instret); + } + // ALWAYS at VX_e_m_reg.v:117 + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__mem_write + = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__mem_write; + // ALWAYS at VX_e_m_reg.v:117 + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__mem_read + = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__mem_read; + // ALWAYS at VX_e_m_reg.v:117 + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__jal; + // ALWAYS at VX_e_m_reg.v:117 + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal_dest + = (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rd1 + + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__jal_offset); + // ALWAYS at VX_csr_handler.v:43 + if (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__is_csr) { + __Vdlyvval__Vortex__DOT__vx_csr_handler__DOT__csr__v0 + = (0xfffU & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__csr_result); + __Vdlyvset__Vortex__DOT__vx_csr_handler__DOT__csr__v0 = 1U; + __Vdlyvdim0__Vortex__DOT__vx_csr_handler__DOT__csr__v0 + = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__csr_address; + } + // ALWAYS at VX_register_file.v:30 + if (((0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) + & (0U != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd)))) { + __Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file__DOT__registers__v0 + = ((3U == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) + ? vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__PC_next + : ((1U == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) + ? vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__alu_result + : vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__mem_result)); + __Vdlyvset__Vortex__DOT__vx_decode__DOT__vx_register_file__DOT__registers__v0 = 1U; + __Vdlyvdim0__Vortex__DOT__vx_decode__DOT__vx_register_file__DOT__registers__v0 + = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd; + } + // ALWAYS at VX_e_m_reg.v:117 + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__rd2 = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rd2; + // ALWAYSPOST at VX_csr_handler.v:45 + if (__Vdlyvset__Vortex__DOT__vx_csr_handler__DOT__csr__v0) { + vlTOPp->Vortex__DOT__vx_csr_handler__DOT__csr[__Vdlyvdim0__Vortex__DOT__vx_csr_handler__DOT__csr__v0] + = __Vdlyvval__Vortex__DOT__vx_csr_handler__DOT__csr__v0; + } + // ALWAYS at VX_d_e_reg.v:130 + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__branch_type + = ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling) + ? 0U : (IData)(vlTOPp->Vortex__DOT__decode_branch_type)); + // ALWAYS at VX_d_e_reg.v:130 + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__curr_PC = + ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling) + ? 0U : vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__curr_PC); + vlTOPp->Vortex__DOT__memory_branch_dest = (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__curr_PC + + (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_offset + << 1U)); + // ALWAYS at VX_d_e_reg.v:130 + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__itype_immed + = ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling) + ? 0xdeadbeefU : vlTOPp->Vortex__DOT__decode_itype_immed); + // ALWAYS at VX_m_w_reg.v:60 + vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__valid = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__valid; + vlTOPp->out_cache_driver_in_mem_write = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__mem_write; + // ALWAYS at VX_d_e_reg.v:130 + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__mem_write + = (7U & ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling) + ? 7U : ((0x23U == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) + ? (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0xcU) : 7U))); + vlTOPp->out_cache_driver_in_mem_read = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__mem_read; + // ALWAYS at VX_d_e_reg.v:130 + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__mem_read + = (7U & ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling) + ? 7U : ((3U == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) + ? (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0xcU) : 7U))); + // ALWAYS at VX_d_e_reg.v:130 + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__jal = ((~ (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling)) + & ((0x6fU + == + (0x7fU + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) + | ((0x67U + == + (0x7fU + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) + | ((0x73U + == + (0x7fU + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) + & ((0U + == + (7U + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0xcU))) + & (2U + > + (0xfffU + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0x14U)))))))); + // ALWAYS at VX_d_e_reg.v:130 + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rd1 = ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling) + ? 0U + : vlTOPp->Vortex__DOT__decode_rd1); + // ALWAYS at VX_d_e_reg.v:130 + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__jal_offset + = ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling) + ? 0U : ((0x6fU == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) + ? ((0xffe00000U & (VL_NEGATE_I((IData)( + (1U + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0x1fU)))) + << 0x15U)) + | ((0x100000U & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0xbU)) + | ((0xff000U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) + | ((0x800U & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 9U)) + | (0x7feU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0x14U)))))) + : ((0x67U == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) + ? ((0xfffff000U & (VL_NEGATE_I((IData)( + (1U + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0x1fU)))) + << 0xcU)) + | (0xfffU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0x14U))) + : ((0x73U == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) + ? (((0U == (7U & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0xcU))) + & (2U > (0xfffU & + (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0x14U)))) + ? 0xb0000000U : 0xdeadbeefU) + : 0xdeadbeefU)))); + // ALWAYS at VX_e_m_reg.v:117 + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__csr_address + = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__csr_address; + // ALWAYS at VX_e_m_reg.v:117 + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__is_csr = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__is_csr; + // ALWAYS at VX_e_m_reg.v:117 + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__csr_result + = ((8U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? ((4U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? ((2U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? (vlTOPp->Vortex__DOT__csr_decode_csr_data + & ((IData)(0xffffffffU) + - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__csr_mask)) + : (vlTOPp->Vortex__DOT__csr_decode_csr_data + | vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__csr_mask)) + : ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__csr_mask + : 0xdeadbeefU)) : 0xdeadbeefU) + : 0xdeadbeefU); + // ALWAYS at VX_m_w_reg.v:60 + vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__rd; + vlTOPp->out_cache_driver_in_data = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__rd2; + // ALWAYS at VX_d_e_reg.v:130 + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rd2 = ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling) + ? 0U + : + ((((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd) + | (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd)) + | (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_wb_fwd)) + ? + ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd) + ? + ((3U + == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb)) + ? vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__PC_next_out + : vlTOPp->Vortex__DOT__execute_alu_result) + : + ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd) + ? + ((3U + == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb)) + ? vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__PC_next + : + ((2U + == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb)) + ? vlTOPp->in_cache_driver_out_data + : vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__alu_result)) + : + ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_wb_fwd) + ? + ((3U + == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) + ? vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__PC_next + : + ((2U + == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) + ? vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__mem_result + : vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__alu_result)) + : 0xdeadbeefU))) + : + vlTOPp->Vortex__DOT__vx_decode__DOT__vx_register_file__DOT__registers + [ + (0x1fU + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0x14U))])); + vlTOPp->Vortex__DOT__csr_decode_csr_data = ((0xc00U + == (IData)(vlTOPp->Vortex__DOT__vx_csr_handler__DOT__decode_csr_address)) + ? (IData)(vlTOPp->Vortex__DOT__vx_csr_handler__DOT__cycle) + : + ((0xc80U + == (IData)(vlTOPp->Vortex__DOT__vx_csr_handler__DOT__decode_csr_address)) + ? (IData)( + (vlTOPp->Vortex__DOT__vx_csr_handler__DOT__cycle + >> 0x20U)) + : + ((0xc02U + == (IData)(vlTOPp->Vortex__DOT__vx_csr_handler__DOT__decode_csr_address)) + ? (IData)(vlTOPp->Vortex__DOT__vx_csr_handler__DOT__instret) + : + ((0xc82U + == (IData)(vlTOPp->Vortex__DOT__vx_csr_handler__DOT__decode_csr_address)) + ? (IData)( + (vlTOPp->Vortex__DOT__vx_csr_handler__DOT__instret + >> 0x20U)) + : + vlTOPp->Vortex__DOT__vx_csr_handler__DOT__csr + [vlTOPp->Vortex__DOT__vx_csr_handler__DOT__decode_csr_address])))); + // ALWAYSPOST at VX_register_file.v:32 + if (__Vdlyvset__Vortex__DOT__vx_decode__DOT__vx_register_file__DOT__registers__v0) { + vlTOPp->Vortex__DOT__vx_decode__DOT__vx_register_file__DOT__registers[__Vdlyvdim0__Vortex__DOT__vx_decode__DOT__vx_register_file__DOT__registers__v0] + = __Vdlyvval__Vortex__DOT__vx_decode__DOT__vx_register_file__DOT__registers__v0; + } + // ALWAYS at VX_e_m_reg.v:117 + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__valid = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__valid; + vlTOPp->Vortex__DOT__execute_branch_stall = ((0U + != (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__branch_type)) + | (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__jal)); + // ALWAYS at VX_d_e_reg.v:130 + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__csr_address + = ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling) + ? 0U : (IData)(vlTOPp->Vortex__DOT__decode_csr_address)); + // ALWAYS at VX_d_e_reg.v:130 + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__is_csr = + ((~ (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling)) + & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_csr)); + // ALWAYS at VX_d_e_reg.v:130 + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__csr_mask + = ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling) + ? 0U : (((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_csr) + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0xeU)) ? (0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0xfU)) + : vlTOPp->Vortex__DOT__decode_rd1)); + // ALWAYS at VX_d_e_reg.v:130 + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op = + ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling) + ? 0xfU : ((0x63U == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) + ? ((5U > (IData)(vlTOPp->Vortex__DOT__decode_branch_type)) + ? 1U : 0xaU) : ((0x37U == + (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) + ? 0xbU : + ((0x17U == + (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) + ? 0xcU : + ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_csr) + ? ((1U + == + (3U + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0xcU))) + ? 0xdU + : ( + (2U + == + (3U + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0xcU))) + ? 0xeU + : 0xfU)) + : (((0x23U + == + (0x7fU + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) + | (3U + == + (0x7fU + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction))) + ? 0U + : ( + (0x4000U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) + ? + ((0x2000U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) + ? + ((0x1000U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) + ? 9U + : 8U) + : + ((0x1000U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) + ? + ((0U + == + (0x7fU + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0x19U))) + ? 6U + : 7U) + : 5U)) + : + ((0x2000U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) + ? + ((0x1000U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) + ? 4U + : 3U) + : + ((0x1000U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) + ? 2U + : + ((0x13U + == + (0x7fU + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) + ? 0U + : + ((0U + == + (0x7fU + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0x19U))) + ? 0U + : 1U))))))))))); + // ALWAYS at VX_e_m_reg.v:117 + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__rd = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rd; + // ALWAYS at VX_m_w_reg.v:60 + vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__mem_result + = vlTOPp->in_cache_driver_out_data; + vlTOPp->Vortex__DOT__vx_execute__DOT__ALU_in2 = + ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rs2_src) + ? vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__itype_immed + : vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rd2); + // ALWAYS at VX_m_w_reg.v:60 + vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__alu_result + = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__alu_result; + // ALWAYS at VX_m_w_reg.v:60 + vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__PC_next = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__PC_next; + // ALWAYS at VX_m_w_reg.v:60 + vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb; + // ALWAYS at VX_d_e_reg.v:130 + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__valid = ( + (~ (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling)) + & (IData)(vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__valid)); + // ALWAYS at VX_d_e_reg.v:130 + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rd = (0x1fU + & ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling) + ? 0U + : + (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 7U))); + // ALWAYS at VX_e_m_reg.v:117 + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__alu_result + = vlTOPp->Vortex__DOT__execute_alu_result; + // ALWAYS at VX_e_m_reg.v:117 + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__PC_next = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__PC_next_out; + // ALWAYS at VX_e_m_reg.v:117 + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb; + // ALWAYS at VX_execute.v:69 + vlTOPp->Vortex__DOT__execute_alu_result = ((8U + & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? ( + (4U + & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? + ((2U + & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? vlTOPp->Vortex__DOT__csr_decode_csr_data + : + ((1U + & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? vlTOPp->Vortex__DOT__csr_decode_csr_data + : + (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__curr_PC + + + (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__upper_immed + << 0xcU)))) + : + ((2U + & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? + ((1U + & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? + (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__upper_immed + << 0xcU) + : + ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rd1 + >= vlTOPp->Vortex__DOT__vx_execute__DOT__ALU_in2) + ? 0U + : 0xffffffffU)) + : + ((1U + & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? + (vlTOPp->Vortex__DOT__vx_execute__DOT__ALU_in2 + & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rd1) + : + (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rd1 + | vlTOPp->Vortex__DOT__vx_execute__DOT__ALU_in2)))) + : ( + (4U + & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? + ((2U + & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? + ((1U + & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? + ((0x1fU + >= vlTOPp->Vortex__DOT__vx_execute__DOT__ALU_in2) + ? + (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rd1 + >> vlTOPp->Vortex__DOT__vx_execute__DOT__ALU_in2) + : 0U) + : + ((0x1fU + >= vlTOPp->Vortex__DOT__vx_execute__DOT__ALU_in2) + ? + (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rd1 + >> vlTOPp->Vortex__DOT__vx_execute__DOT__ALU_in2) + : 0U)) + : + ((1U + & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? + (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rd1 + ^ vlTOPp->Vortex__DOT__vx_execute__DOT__ALU_in2) + : + ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rd1 + < vlTOPp->Vortex__DOT__vx_execute__DOT__ALU_in2) + ? 1U + : 0U))) + : + ((2U + & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? + ((1U + & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? + (VL_LTS_III(1,32,32, vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rd1, vlTOPp->Vortex__DOT__vx_execute__DOT__ALU_in2) + ? 1U + : 0U) + : + ((0x1fU + >= vlTOPp->Vortex__DOT__vx_execute__DOT__ALU_in2) + ? + (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rd1 + << vlTOPp->Vortex__DOT__vx_execute__DOT__ALU_in2) + : 0U)) + : + ((1U + & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? + (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rd1 + - vlTOPp->Vortex__DOT__vx_execute__DOT__ALU_in2) + : + (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rd1 + + vlTOPp->Vortex__DOT__vx_execute__DOT__ALU_in2))))); + vlTOPp->out_cache_driver_in_address = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__alu_result; + // ALWAYS at VX_memory.v:60 + vlTOPp->Vortex__DOT__memory_branch_dir = (1U & + ((4U + & (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_type)) + ? ( + (2U + & (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_type)) + ? + ((~ (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_type)) + & (~ + (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__alu_result + >> 0x1fU))) + : + ((1U + & (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_type)) + ? + (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__alu_result + >> 0x1fU) + : + (~ + (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__alu_result + >> 0x1fU)))) + : ( + (2U + & (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_type)) + ? + ((1U + & (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_type)) + ? + (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__alu_result + >> 0x1fU) + : + (0U + != vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__alu_result)) + : + ((IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_type) + & (0U + == vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__alu_result))))); + // ALWAYS at VX_d_e_reg.v:130 + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__PC_next_out + = ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling) + ? 0U : ((IData)(4U) + vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__curr_PC)); + // ALWAYS at VX_d_e_reg.v:130 + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb = ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling) + ? 0U + : + ((((0x6fU + == + (0x7fU + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) + | (0x67U + == + (0x7fU + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction))) + | ((0x73U + == + (0x7fU + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) + & (0U + == + (7U + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0xcU))))) + ? 3U + : + ((3U + == + (0x7fU + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) + ? 2U + : + ((((((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_itype) + | (0x33U + == + (0x7fU + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction))) + | (0x37U + == + (0x7fU + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction))) + | (0x17U + == + (0x7fU + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction))) + | (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_csr)) + ? 1U + : 0U)))); } -void Vvortex::_initial__TOP__4(Vvortex__Syms* __restrict vlSymsp) { - VL_DEBUG_IF(VL_DBG_MSGF("+ Vvortex::_initial__TOP__4\n"); ); - Vvortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; +void VVortex::_initial__TOP__3(VVortex__Syms* __restrict vlSymsp) { + VL_DEBUG_IF(VL_DBG_MSGF("+ VVortex::_initial__TOP__3\n"); ); + VVortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; // Body + // INITIAL at VX_csr_handler.v:27 + vlTOPp->Vortex__DOT__vx_csr_handler__DOT__cycle = VL_ULL(0); + vlTOPp->Vortex__DOT__vx_csr_handler__DOT__instret = VL_ULL(0); + vlTOPp->Vortex__DOT__vx_csr_handler__DOT__decode_csr_address = 0U; // INITIAL at VX_fetch.v:44 - vlTOPp->vortex__DOT__vx_fetch__DOT__stall_reg = 0U; - vlTOPp->vortex__DOT__vx_fetch__DOT__delay_reg = 0U; - vlTOPp->vortex__DOT__vx_fetch__DOT__old = 0U; - vlTOPp->vortex__DOT__vx_fetch__DOT__state = 0U; - vlTOPp->vortex__DOT__vx_fetch__DOT__real_PC = 0U; - vlTOPp->vortex__DOT__vx_fetch__DOT__JAL_reg = 0U; - vlTOPp->vortex__DOT__vx_fetch__DOT__BR_reg = 0U; - vlTOPp->vortex__DOT__vx_fetch__DOT__prev_debug = 0U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__stall_reg = 0U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__delay_reg = 0U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__old = 0U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__state = 0U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__real_PC = 0U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__JAL_reg = 0U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__BR_reg = 0U; + vlTOPp->Vortex__DOT__vx_fetch__DOT__prev_debug = 0U; + // INITIAL at VX_m_w_reg.v:39 + vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__alu_result = 0U; + vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__mem_result = 0U; + vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd = 0U; + vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb = 0U; + vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__PC_next = 0U; + vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__valid = 0U; + // INITIAL at VX_e_m_reg.v:72 + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__alu_result = 0U; + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__rd = 0U; + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__rd2 = 0U; + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb = 0U; + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__PC_next = 0U; + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__mem_read = 7U; + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__mem_write = 7U; + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__csr_address = 0U; + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__is_csr = 0U; + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__csr_result = 0U; + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__curr_PC = 0U; + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_offset = 0U; + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_type = 0U; + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal = 0U; + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal_dest = 0U; + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__valid = 0U; + // INITIAL at VX_d_e_reg.v:79 + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rd = 0U; + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rd1 = 0U; + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rd2 = 0U; + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op = 0U; + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb = 0U; + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__PC_next_out = 0U; + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rs2_src = 0U; + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__itype_immed = 0U; + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__mem_read = 7U; + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__mem_write = 7U; + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__branch_type = 0U; + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__upper_immed = 0U; + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__csr_address = 0U; + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__is_csr = 0U; + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__csr_mask = 0U; + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__curr_PC = 0U; + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__jal = 0U; + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__jal_offset = 0U; + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__valid = 0U; } -VL_INLINE_OPT void Vvortex::_sequent__TOP__5(Vvortex__Syms* __restrict vlSymsp) { - VL_DEBUG_IF(VL_DBG_MSGF("+ Vvortex::_sequent__TOP__5\n"); ); - Vvortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; +void VVortex::_settle__TOP__4(VVortex__Syms* __restrict vlSymsp) { + VL_DEBUG_IF(VL_DBG_MSGF("+ VVortex::_settle__TOP__4\n"); ); + VVortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; + // Body + vlTOPp->Vortex__DOT__vx_decode__DOT__is_itype = + ((0x13U == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) + | (3U == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction))); + vlTOPp->Vortex__DOT__vx_decode__DOT__is_csr = ( + (0x73U + == + (0x7fU + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) + & (0U + != + (7U + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0xcU)))); + vlTOPp->Vortex__DOT__decode_csr_address = (0xfffU + & (((0U + != + (7U + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0xcU))) + & (2U + <= + (0xfffU + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0x14U)))) + ? + (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0x14U) + : 0x55U)); + // ALWAYS at VX_decode.v:249 + vlTOPp->Vortex__DOT__decode_branch_type = ((0x63U + == + (0x7fU + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) + ? ( + (0x4000U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) + ? + ((0x2000U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) + ? + ((0x1000U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) + ? 6U + : 5U) + : + ((0x1000U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) + ? 4U + : 3U)) + : + ((0x2000U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) + ? 0U + : + ((0x1000U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) + ? 2U + : 1U))) + : 0U); + vlTOPp->Vortex__DOT__vx_decode__DOT__alu_tempp + = (0xfffU & (((1U == (7U & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0xcU))) | (5U + == + (7U + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0xcU)))) + ? (0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0x14U)) : (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0x14U))); + vlTOPp->Vortex__DOT__csr_decode_csr_data = ((0xc00U + == (IData)(vlTOPp->Vortex__DOT__vx_csr_handler__DOT__decode_csr_address)) + ? (IData)(vlTOPp->Vortex__DOT__vx_csr_handler__DOT__cycle) + : + ((0xc80U + == (IData)(vlTOPp->Vortex__DOT__vx_csr_handler__DOT__decode_csr_address)) + ? (IData)( + (vlTOPp->Vortex__DOT__vx_csr_handler__DOT__cycle + >> 0x20U)) + : + ((0xc02U + == (IData)(vlTOPp->Vortex__DOT__vx_csr_handler__DOT__decode_csr_address)) + ? (IData)(vlTOPp->Vortex__DOT__vx_csr_handler__DOT__instret) + : + ((0xc82U + == (IData)(vlTOPp->Vortex__DOT__vx_csr_handler__DOT__decode_csr_address)) + ? (IData)( + (vlTOPp->Vortex__DOT__vx_csr_handler__DOT__instret + >> 0x20U)) + : + vlTOPp->Vortex__DOT__vx_csr_handler__DOT__csr + [vlTOPp->Vortex__DOT__vx_csr_handler__DOT__decode_csr_address])))); + // ALWAYS at VX_fetch.v:71 + vlTOPp->Vortex__DOT__vx_fetch__DOT__PC_to_use = + ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__delay_reg) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT__old + : ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__stall_reg) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT__old + : ((0x10U & (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__state)) + ? 0U : ((8U & (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__state)) + ? 0U : ((4U & (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__state)) + ? ((2U & (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__state)) + ? 0U : ((1U + & (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__state)) + ? 0U + : vlTOPp->Vortex__DOT__vx_fetch__DOT__old)) + : ((2U & (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__state)) + ? ((1U & (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__state)) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT__real_PC + : vlTOPp->Vortex__DOT__vx_fetch__DOT__BR_reg) + : ((1U & (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__state)) + ? vlTOPp->Vortex__DOT__vx_fetch__DOT__JAL_reg + : vlTOPp->Vortex__DOT__vx_fetch__DOT__real_PC))))))); + vlTOPp->out_cache_driver_in_data = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__rd2; + vlTOPp->out_cache_driver_in_mem_read = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__mem_read; + vlTOPp->out_cache_driver_in_mem_write = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__mem_write; + vlTOPp->Vortex__DOT__memory_branch_dest = (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__curr_PC + + (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_offset + << 1U)); + vlTOPp->out_cache_driver_in_address = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__alu_result; + // ALWAYS at VX_memory.v:60 + vlTOPp->Vortex__DOT__memory_branch_dir = (1U & + ((4U + & (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_type)) + ? ( + (2U + & (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_type)) + ? + ((~ (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_type)) + & (~ + (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__alu_result + >> 0x1fU))) + : + ((1U + & (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_type)) + ? + (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__alu_result + >> 0x1fU) + : + (~ + (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__alu_result + >> 0x1fU)))) + : ( + (2U + & (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_type)) + ? + ((1U + & (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_type)) + ? + (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__alu_result + >> 0x1fU) + : + (0U + != vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__alu_result)) + : + ((IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_type) + & (0U + == vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__alu_result))))); + vlTOPp->Vortex__DOT__execute_branch_stall = ((0U + != (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__branch_type)) + | (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__jal)); + vlTOPp->Vortex__DOT__vx_execute__DOT__ALU_in2 = + ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rs2_src) + ? vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__itype_immed + : vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rd2); + vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd + = ((((0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0x14U)) == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rd)) + & (0U != (0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0x14U)))) & (0U != (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb))); + vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd + = ((((0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0xfU)) == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rd)) + & (0U != (0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0xfU)))) & (0U != (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb))); + // ALWAYS at VX_decode.v:238 + vlTOPp->Vortex__DOT__decode_itype_immed = ((0x40U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) + ? ( + (0x20U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) + ? + ((0x10U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) + ? 0xdeadbeefU + : + ((8U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) + ? 0xdeadbeefU + : + ((4U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) + ? 0xdeadbeefU + : + ((2U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) + ? + ((1U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) + ? + ((0xfffff000U + & (VL_NEGATE_I((IData)( + (1U + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0x1fU)))) + << 0xcU)) + | ((0x800U + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0x14U)) + | ((0x400U + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + << 3U)) + | ((0x3f0U + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0x15U)) + | (0xfU + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 8U)))))) + : 0xdeadbeefU) + : 0xdeadbeefU)))) + : 0xdeadbeefU) + : ( + (0x20U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) + ? + ((0x10U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) + ? 0xdeadbeefU + : + ((8U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) + ? 0xdeadbeefU + : + ((4U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) + ? 0xdeadbeefU + : + ((2U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) + ? + ((1U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) + ? + ((0xfffff000U + & (VL_NEGATE_I((IData)( + (1U + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0x1fU)))) + << 0xcU)) + | ((0xfe0U + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0x14U)) + | (0x1fU + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 7U)))) + : 0xdeadbeefU) + : 0xdeadbeefU)))) + : + ((0x10U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) + ? + ((8U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) + ? 0xdeadbeefU + : + ((4U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) + ? 0xdeadbeefU + : + ((2U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) + ? + ((1U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) + ? + ((0xfffff000U + & (VL_NEGATE_I((IData)( + (1U + & ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__alu_tempp) + >> 0xbU)))) + << 0xcU)) + | (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__alu_tempp)) + : 0xdeadbeefU) + : 0xdeadbeefU))) + : + ((8U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) + ? 0xdeadbeefU + : + ((4U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) + ? 0xdeadbeefU + : + ((2U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) + ? + ((1U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) + ? + ((0xfffff000U + & (VL_NEGATE_I((IData)( + (1U + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0x1fU)))) + << 0xcU)) + | (0xfffU + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0x14U))) + : 0xdeadbeefU) + : 0xdeadbeefU)))))); + // ALWAYS at VX_fetch.v:94 + vlTOPp->Vortex__DOT__vx_fetch__DOT__temp_PC = ( + ((IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal) + & (~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__delay_reg))) + ? vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal_dest + : + (((IData)(vlTOPp->Vortex__DOT__memory_branch_dir) + & (~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__delay_reg))) + ? vlTOPp->Vortex__DOT__memory_branch_dest + : vlTOPp->Vortex__DOT__vx_fetch__DOT__PC_to_use)); + // ALWAYS at VX_execute.v:69 + vlTOPp->Vortex__DOT__execute_alu_result = ((8U + & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? ( + (4U + & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? + ((2U + & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? vlTOPp->Vortex__DOT__csr_decode_csr_data + : + ((1U + & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? vlTOPp->Vortex__DOT__csr_decode_csr_data + : + (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__curr_PC + + + (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__upper_immed + << 0xcU)))) + : + ((2U + & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? + ((1U + & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? + (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__upper_immed + << 0xcU) + : + ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rd1 + >= vlTOPp->Vortex__DOT__vx_execute__DOT__ALU_in2) + ? 0U + : 0xffffffffU)) + : + ((1U + & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? + (vlTOPp->Vortex__DOT__vx_execute__DOT__ALU_in2 + & vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rd1) + : + (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rd1 + | vlTOPp->Vortex__DOT__vx_execute__DOT__ALU_in2)))) + : ( + (4U + & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? + ((2U + & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? + ((1U + & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? + ((0x1fU + >= vlTOPp->Vortex__DOT__vx_execute__DOT__ALU_in2) + ? + (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rd1 + >> vlTOPp->Vortex__DOT__vx_execute__DOT__ALU_in2) + : 0U) + : + ((0x1fU + >= vlTOPp->Vortex__DOT__vx_execute__DOT__ALU_in2) + ? + (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rd1 + >> vlTOPp->Vortex__DOT__vx_execute__DOT__ALU_in2) + : 0U)) + : + ((1U + & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? + (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rd1 + ^ vlTOPp->Vortex__DOT__vx_execute__DOT__ALU_in2) + : + ((vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rd1 + < vlTOPp->Vortex__DOT__vx_execute__DOT__ALU_in2) + ? 1U + : 0U))) + : + ((2U + & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? + ((1U + & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? + (VL_LTS_III(1,32,32, vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rd1, vlTOPp->Vortex__DOT__vx_execute__DOT__ALU_in2) + ? 1U + : 0U) + : + ((0x1fU + >= vlTOPp->Vortex__DOT__vx_execute__DOT__ALU_in2) + ? + (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rd1 + << vlTOPp->Vortex__DOT__vx_execute__DOT__ALU_in2) + : 0U)) + : + ((1U + & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? + (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rd1 + - vlTOPp->Vortex__DOT__vx_execute__DOT__ALU_in2) + : + (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rd1 + + vlTOPp->Vortex__DOT__vx_execute__DOT__ALU_in2))))); + vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd + = (((((0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0x14U)) == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__rd)) + & (0U != (0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0x14U)))) & (0U + != (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb))) + & (~ (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd))); + vlTOPp->Vortex__DOT__forwarding_fwd_stall = (((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd) + | (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd)) + & (2U + == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb))); + vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd + = (((((0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0xfU)) == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__rd)) + & (0U != (0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0xfU)))) & (0U != (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb))) + & (~ (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd))); + vlTOPp->curr_PC = vlTOPp->Vortex__DOT__vx_fetch__DOT__temp_PC; + vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_wb_fwd + = ((((((0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0x14U)) == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd)) + & (0U != (0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0x14U)))) & (0U + != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb))) + & (~ (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd))) + & (~ (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd))); + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling + = ((IData)(vlTOPp->Vortex__DOT__forwarding_fwd_stall) + | (IData)(vlTOPp->Vortex__DOT__execute_branch_stall)); + vlTOPp->Vortex__DOT__vx_fetch__DOT__stall = ((( + (0x63U + == + (0x7fU + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) + | ((0x6fU + == + (0x7fU + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) + | (0x67U + == + (0x7fU + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)))) + | (IData)(vlTOPp->Vortex__DOT__forwarding_fwd_stall)) + | (IData)(vlTOPp->Vortex__DOT__execute_branch_stall)); + vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_wb_fwd + = ((((((0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0xfU)) == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd)) + & (0U != (0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0xfU)))) & (0U + != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb))) + & (~ (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd))) + & (~ (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd))); + vlTOPp->Vortex__DOT__decode_rd1 = ((0x6fU == (0x7fU + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) + ? vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__curr_PC + : ((((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd) + | (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd)) + | (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_wb_fwd)) + ? ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd) + ? ( + (3U + == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb)) + ? vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__PC_next_out + : vlTOPp->Vortex__DOT__execute_alu_result) + : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd) + ? + ((3U + == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb)) + ? vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__PC_next + : + ((2U + == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb)) + ? vlTOPp->in_cache_driver_out_data + : vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__alu_result)) + : + ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_wb_fwd) + ? + ((3U + == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) + ? vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__PC_next + : + ((2U + == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) + ? vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__mem_result + : vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__alu_result)) + : 0xdeadbeefU))) + : vlTOPp->Vortex__DOT__vx_decode__DOT__vx_register_file__DOT__registers + [(0x1fU + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0xfU))])); +} + +VL_INLINE_OPT void VVortex::_sequent__TOP__5(VVortex__Syms* __restrict vlSymsp) { + VL_DEBUG_IF(VL_DBG_MSGF("+ VVortex::_sequent__TOP__5\n"); ); + VVortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; // Body // ALWAYS at VX_f_d_reg.v:26 - vlTOPp->vortex__DOT__vx_f_d_reg__DOT__instruction - = ((IData)(vlTOPp->reset) ? 0U : vlTOPp->fe_instruction); - vlTOPp->de_instruction = vlTOPp->vortex__DOT__vx_f_d_reg__DOT__instruction; + vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__valid = (1U + & ((~ + ((IData)(vlTOPp->reset) + | (IData)(vlTOPp->Vortex__DOT__forwarding_fwd_stall))) + & (~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__stall)))); + // ALWAYS at VX_f_d_reg.v:26 + vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__curr_PC = + (((IData)(vlTOPp->reset) | (IData)(vlTOPp->Vortex__DOT__forwarding_fwd_stall)) + ? 0U : vlTOPp->Vortex__DOT__vx_fetch__DOT__temp_PC); + // ALWAYS at VX_f_d_reg.v:26 + vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + = (((IData)(vlTOPp->reset) | (IData)(vlTOPp->Vortex__DOT__forwarding_fwd_stall)) + ? 0U : ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__stall) + ? 0U : vlTOPp->fe_instruction)); + // ALWAYS at VX_fetch.v:94 + vlTOPp->Vortex__DOT__vx_fetch__DOT__temp_PC = ( + ((IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal) + & (~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__delay_reg))) + ? vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal_dest + : + (((IData)(vlTOPp->Vortex__DOT__memory_branch_dir) + & (~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__delay_reg))) + ? vlTOPp->Vortex__DOT__memory_branch_dest + : vlTOPp->Vortex__DOT__vx_fetch__DOT__PC_to_use)); + vlTOPp->curr_PC = vlTOPp->Vortex__DOT__vx_fetch__DOT__temp_PC; + vlTOPp->Vortex__DOT__vx_decode__DOT__is_itype = + ((0x13U == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) + | (3U == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction))); + vlTOPp->Vortex__DOT__vx_decode__DOT__is_csr = ( + (0x73U + == + (0x7fU + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) + & (0U + != + (7U + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0xcU)))); + vlTOPp->Vortex__DOT__decode_csr_address = (0xfffU + & (((0U + != + (7U + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0xcU))) + & (2U + <= + (0xfffU + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0x14U)))) + ? + (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0x14U) + : 0x55U)); + // ALWAYS at VX_decode.v:249 + vlTOPp->Vortex__DOT__decode_branch_type = ((0x63U + == + (0x7fU + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) + ? ( + (0x4000U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) + ? + ((0x2000U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) + ? + ((0x1000U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) + ? 6U + : 5U) + : + ((0x1000U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) + ? 4U + : 3U)) + : + ((0x2000U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) + ? 0U + : + ((0x1000U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) + ? 2U + : 1U))) + : 0U); + vlTOPp->Vortex__DOT__vx_decode__DOT__alu_tempp + = (0xfffU & (((1U == (7U & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0xcU))) | (5U + == + (7U + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0xcU)))) + ? (0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0x14U)) : (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0x14U))); + vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd + = ((((0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0x14U)) == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rd)) + & (0U != (0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0x14U)))) & (0U != (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb))); + vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd + = ((((0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0xfU)) == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rd)) + & (0U != (0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0xfU)))) & (0U != (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb))); + // ALWAYS at VX_decode.v:238 + vlTOPp->Vortex__DOT__decode_itype_immed = ((0x40U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) + ? ( + (0x20U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) + ? + ((0x10U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) + ? 0xdeadbeefU + : + ((8U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) + ? 0xdeadbeefU + : + ((4U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) + ? 0xdeadbeefU + : + ((2U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) + ? + ((1U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) + ? + ((0xfffff000U + & (VL_NEGATE_I((IData)( + (1U + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0x1fU)))) + << 0xcU)) + | ((0x800U + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0x14U)) + | ((0x400U + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + << 3U)) + | ((0x3f0U + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0x15U)) + | (0xfU + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 8U)))))) + : 0xdeadbeefU) + : 0xdeadbeefU)))) + : 0xdeadbeefU) + : ( + (0x20U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) + ? + ((0x10U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) + ? 0xdeadbeefU + : + ((8U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) + ? 0xdeadbeefU + : + ((4U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) + ? 0xdeadbeefU + : + ((2U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) + ? + ((1U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) + ? + ((0xfffff000U + & (VL_NEGATE_I((IData)( + (1U + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0x1fU)))) + << 0xcU)) + | ((0xfe0U + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0x14U)) + | (0x1fU + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 7U)))) + : 0xdeadbeefU) + : 0xdeadbeefU)))) + : + ((0x10U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) + ? + ((8U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) + ? 0xdeadbeefU + : + ((4U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) + ? 0xdeadbeefU + : + ((2U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) + ? + ((1U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) + ? + ((0xfffff000U + & (VL_NEGATE_I((IData)( + (1U + & ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__alu_tempp) + >> 0xbU)))) + << 0xcU)) + | (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__alu_tempp)) + : 0xdeadbeefU) + : 0xdeadbeefU))) + : + ((8U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) + ? 0xdeadbeefU + : + ((4U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) + ? 0xdeadbeefU + : + ((2U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) + ? + ((1U + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction) + ? + ((0xfffff000U + & (VL_NEGATE_I((IData)( + (1U + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0x1fU)))) + << 0xcU)) + | (0xfffU + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0x14U))) + : 0xdeadbeefU) + : 0xdeadbeefU)))))); + vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd + = (((((0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0x14U)) == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__rd)) + & (0U != (0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0x14U)))) & (0U + != (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb))) + & (~ (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd))); + vlTOPp->Vortex__DOT__forwarding_fwd_stall = (((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd) + | (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd)) + & (2U + == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb))); + vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd + = (((((0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0xfU)) == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__rd)) + & (0U != (0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0xfU)))) & (0U != (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb))) + & (~ (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd))); + vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_wb_fwd + = ((((((0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0x14U)) == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd)) + & (0U != (0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0x14U)))) & (0U + != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb))) + & (~ (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd))) + & (~ (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd))); + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling + = ((IData)(vlTOPp->Vortex__DOT__forwarding_fwd_stall) + | (IData)(vlTOPp->Vortex__DOT__execute_branch_stall)); + vlTOPp->Vortex__DOT__vx_fetch__DOT__stall = ((( + (0x63U + == + (0x7fU + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) + | ((0x6fU + == + (0x7fU + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) + | (0x67U + == + (0x7fU + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)))) + | (IData)(vlTOPp->Vortex__DOT__forwarding_fwd_stall)) + | (IData)(vlTOPp->Vortex__DOT__execute_branch_stall)); + vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_wb_fwd + = ((((((0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0xfU)) == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd)) + & (0U != (0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0xfU)))) & (0U + != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb))) + & (~ (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd))) + & (~ (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd))); } -void Vvortex::_settle__TOP__6(Vvortex__Syms* __restrict vlSymsp) { - VL_DEBUG_IF(VL_DBG_MSGF("+ Vvortex::_settle__TOP__6\n"); ); - Vvortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; +VL_INLINE_OPT void VVortex::_combo__TOP__6(VVortex__Syms* __restrict vlSymsp) { + VL_DEBUG_IF(VL_DBG_MSGF("+ VVortex::_combo__TOP__6\n"); ); + VVortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; // Body - // ALWAYS at VX_fetch.v:71 - vlTOPp->vortex__DOT__vx_fetch__DOT__PC_to_use = - ((IData)(vlTOPp->vortex__DOT__vx_fetch__DOT__delay_reg) - ? vlTOPp->vortex__DOT__vx_fetch__DOT__old - : ((IData)(vlTOPp->vortex__DOT__vx_fetch__DOT__stall_reg) - ? vlTOPp->vortex__DOT__vx_fetch__DOT__old - : ((0x10U & (IData)(vlTOPp->vortex__DOT__vx_fetch__DOT__state)) - ? 0U : ((8U & (IData)(vlTOPp->vortex__DOT__vx_fetch__DOT__state)) - ? 0U : ((4U & (IData)(vlTOPp->vortex__DOT__vx_fetch__DOT__state)) - ? ((2U & (IData)(vlTOPp->vortex__DOT__vx_fetch__DOT__state)) - ? 0U : ((1U - & (IData)(vlTOPp->vortex__DOT__vx_fetch__DOT__state)) - ? 0U - : vlTOPp->vortex__DOT__vx_fetch__DOT__old)) - : ((2U & (IData)(vlTOPp->vortex__DOT__vx_fetch__DOT__state)) - ? ((1U & (IData)(vlTOPp->vortex__DOT__vx_fetch__DOT__state)) - ? vlTOPp->vortex__DOT__vx_fetch__DOT__real_PC - : vlTOPp->vortex__DOT__vx_fetch__DOT__BR_reg) - : ((1U & (IData)(vlTOPp->vortex__DOT__vx_fetch__DOT__state)) - ? vlTOPp->vortex__DOT__vx_fetch__DOT__JAL_reg - : vlTOPp->vortex__DOT__vx_fetch__DOT__real_PC))))))); - vlTOPp->curr_PC = vlTOPp->vortex__DOT__vx_fetch__DOT__PC_to_use; + vlTOPp->Vortex__DOT__decode_rd1 = ((0x6fU == (0x7fU + & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) + ? vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__curr_PC + : ((((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd) + | (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd)) + | (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_wb_fwd)) + ? ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd) + ? ( + (3U + == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb)) + ? vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__PC_next_out + : vlTOPp->Vortex__DOT__execute_alu_result) + : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd) + ? + ((3U + == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb)) + ? vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__PC_next + : + ((2U + == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb)) + ? vlTOPp->in_cache_driver_out_data + : vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__alu_result)) + : + ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_wb_fwd) + ? + ((3U + == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) + ? vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__PC_next + : + ((2U + == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) + ? vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__mem_result + : vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__alu_result)) + : 0xdeadbeefU))) + : vlTOPp->Vortex__DOT__vx_decode__DOT__vx_register_file__DOT__registers + [(0x1fU + & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0xfU))])); } -void Vvortex::_eval(Vvortex__Syms* __restrict vlSymsp) { - VL_DEBUG_IF(VL_DBG_MSGF("+ Vvortex::_eval\n"); ); - Vvortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; +void VVortex::_eval(VVortex__Syms* __restrict vlSymsp) { + VL_DEBUG_IF(VL_DBG_MSGF("+ VVortex::_eval\n"); ); + VVortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; // Body if ((((IData)(vlTOPp->clk) & (~ (IData)(vlTOPp->__Vclklast__TOP__clk))) | ((IData)(vlTOPp->reset) & (~ (IData)(vlTOPp->__Vclklast__TOP__reset))))) { - vlTOPp->_sequent__TOP__2(vlSymsp); + vlTOPp->_sequent__TOP__1(vlSymsp); } if (((IData)(vlTOPp->clk) & (~ (IData)(vlTOPp->__Vclklast__TOP__clk)))) { - vlTOPp->_sequent__TOP__3(vlSymsp); + vlTOPp->_sequent__TOP__2(vlSymsp); } if ((((IData)(vlTOPp->clk) & (~ (IData)(vlTOPp->__Vclklast__TOP__clk))) | ((IData)(vlTOPp->reset) & (~ (IData)(vlTOPp->__Vclklast__TOP__reset))))) { vlTOPp->_sequent__TOP__5(vlSymsp); } + vlTOPp->_combo__TOP__6(vlSymsp); // Final vlTOPp->__Vclklast__TOP__clk = vlTOPp->clk; vlTOPp->__Vclklast__TOP__reset = vlTOPp->reset; } -void Vvortex::_eval_initial(Vvortex__Syms* __restrict vlSymsp) { - VL_DEBUG_IF(VL_DBG_MSGF("+ Vvortex::_eval_initial\n"); ); - Vvortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; +void VVortex::_eval_initial(VVortex__Syms* __restrict vlSymsp) { + VL_DEBUG_IF(VL_DBG_MSGF("+ VVortex::_eval_initial\n"); ); + VVortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; // Body vlTOPp->__Vclklast__TOP__clk = vlTOPp->clk; vlTOPp->__Vclklast__TOP__reset = vlTOPp->reset; - vlTOPp->_initial__TOP__4(vlSymsp); + vlTOPp->_initial__TOP__3(vlSymsp); } -void Vvortex::final() { - VL_DEBUG_IF(VL_DBG_MSGF("+ Vvortex::final\n"); ); +void VVortex::final() { + VL_DEBUG_IF(VL_DBG_MSGF("+ VVortex::final\n"); ); // Variables - Vvortex__Syms* __restrict vlSymsp = this->__VlSymsp; - Vvortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; + VVortex__Syms* __restrict vlSymsp = this->__VlSymsp; + VVortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; } -void Vvortex::_eval_settle(Vvortex__Syms* __restrict vlSymsp) { - VL_DEBUG_IF(VL_DBG_MSGF("+ Vvortex::_eval_settle\n"); ); - Vvortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; +void VVortex::_eval_settle(VVortex__Syms* __restrict vlSymsp) { + VL_DEBUG_IF(VL_DBG_MSGF("+ VVortex::_eval_settle\n"); ); + VVortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; // Body - vlTOPp->_settle__TOP__1(vlSymsp); - vlTOPp->_settle__TOP__6(vlSymsp); + vlTOPp->_settle__TOP__4(vlSymsp); } -VL_INLINE_OPT QData Vvortex::_change_request(Vvortex__Syms* __restrict vlSymsp) { - VL_DEBUG_IF(VL_DBG_MSGF("+ Vvortex::_change_request\n"); ); - Vvortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; +VL_INLINE_OPT QData VVortex::_change_request(VVortex__Syms* __restrict vlSymsp) { + VL_DEBUG_IF(VL_DBG_MSGF("+ VVortex::_change_request\n"); ); + VVortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; // Body // Change detection QData __req = false; // Logically a bool @@ -272,8 +1740,8 @@ VL_INLINE_OPT QData Vvortex::_change_request(Vvortex__Syms* __restrict vlSymsp) } #ifdef VL_DEBUG -void Vvortex::_eval_debug_assertions() { - VL_DEBUG_IF(VL_DBG_MSGF("+ Vvortex::_eval_debug_assertions\n"); ); +void VVortex::_eval_debug_assertions() { + VL_DEBUG_IF(VL_DBG_MSGF("+ VVortex::_eval_debug_assertions\n"); ); // Body if (VL_UNLIKELY((clk & 0xfeU))) { Verilated::overWidthError("clk");} @@ -282,23 +1750,101 @@ void Vvortex::_eval_debug_assertions() { } #endif // VL_DEBUG -void Vvortex::_ctor_var_reset() { - VL_DEBUG_IF(VL_DBG_MSGF("+ Vvortex::_ctor_var_reset\n"); ); +void VVortex::_ctor_var_reset() { + VL_DEBUG_IF(VL_DBG_MSGF("+ VVortex::_ctor_var_reset\n"); ); // Body clk = VL_RAND_RESET_I(1); reset = VL_RAND_RESET_I(1); fe_instruction = VL_RAND_RESET_I(32); + in_cache_driver_out_data = VL_RAND_RESET_I(32); curr_PC = VL_RAND_RESET_I(32); - de_instruction = VL_RAND_RESET_I(32); - fe_delay = VL_RAND_RESET_I(1); - vortex__DOT__vx_fetch__DOT__stall_reg = VL_RAND_RESET_I(1); - vortex__DOT__vx_fetch__DOT__delay_reg = VL_RAND_RESET_I(1); - vortex__DOT__vx_fetch__DOT__old = VL_RAND_RESET_I(32); - vortex__DOT__vx_fetch__DOT__state = VL_RAND_RESET_I(5); - vortex__DOT__vx_fetch__DOT__real_PC = VL_RAND_RESET_I(32); - vortex__DOT__vx_fetch__DOT__JAL_reg = VL_RAND_RESET_I(32); - vortex__DOT__vx_fetch__DOT__BR_reg = VL_RAND_RESET_I(32); - vortex__DOT__vx_fetch__DOT__prev_debug = VL_RAND_RESET_I(1); - vortex__DOT__vx_fetch__DOT__PC_to_use = VL_RAND_RESET_I(32); - vortex__DOT__vx_f_d_reg__DOT__instruction = VL_RAND_RESET_I(32); + out_cache_driver_in_address = VL_RAND_RESET_I(32); + out_cache_driver_in_mem_read = VL_RAND_RESET_I(3); + out_cache_driver_in_mem_write = VL_RAND_RESET_I(3); + out_cache_driver_in_data = VL_RAND_RESET_I(32); + Vortex__DOT__decode_csr_address = VL_RAND_RESET_I(12); + Vortex__DOT__decode_rd1 = VL_RAND_RESET_I(32); + Vortex__DOT__decode_itype_immed = VL_RAND_RESET_I(32); + Vortex__DOT__decode_branch_type = VL_RAND_RESET_I(3); + Vortex__DOT__execute_branch_stall = VL_RAND_RESET_I(1); + Vortex__DOT__execute_alu_result = VL_RAND_RESET_I(32); + Vortex__DOT__memory_branch_dir = VL_RAND_RESET_I(1); + Vortex__DOT__memory_branch_dest = VL_RAND_RESET_I(32); + Vortex__DOT__csr_decode_csr_data = VL_RAND_RESET_I(32); + Vortex__DOT__forwarding_fwd_stall = VL_RAND_RESET_I(1); + Vortex__DOT__vx_fetch__DOT__stall_reg = VL_RAND_RESET_I(1); + Vortex__DOT__vx_fetch__DOT__delay_reg = VL_RAND_RESET_I(1); + Vortex__DOT__vx_fetch__DOT__old = VL_RAND_RESET_I(32); + Vortex__DOT__vx_fetch__DOT__state = VL_RAND_RESET_I(5); + Vortex__DOT__vx_fetch__DOT__real_PC = VL_RAND_RESET_I(32); + Vortex__DOT__vx_fetch__DOT__JAL_reg = VL_RAND_RESET_I(32); + Vortex__DOT__vx_fetch__DOT__BR_reg = VL_RAND_RESET_I(32); + Vortex__DOT__vx_fetch__DOT__prev_debug = VL_RAND_RESET_I(1); + Vortex__DOT__vx_fetch__DOT__PC_to_use = VL_RAND_RESET_I(32); + Vortex__DOT__vx_fetch__DOT__stall = VL_RAND_RESET_I(1); + Vortex__DOT__vx_fetch__DOT__temp_PC = VL_RAND_RESET_I(32); + Vortex__DOT__vx_f_d_reg__DOT__instruction = VL_RAND_RESET_I(32); + Vortex__DOT__vx_f_d_reg__DOT__curr_PC = VL_RAND_RESET_I(32); + Vortex__DOT__vx_f_d_reg__DOT__valid = VL_RAND_RESET_I(1); + Vortex__DOT__vx_decode__DOT__is_itype = VL_RAND_RESET_I(1); + Vortex__DOT__vx_decode__DOT__is_csr = VL_RAND_RESET_I(1); + Vortex__DOT__vx_decode__DOT__alu_tempp = VL_RAND_RESET_I(12); + { int __Vi0=0; for (; __Vi0<32; ++__Vi0) { + Vortex__DOT__vx_decode__DOT__vx_register_file__DOT__registers[__Vi0] = VL_RAND_RESET_I(32); + }} + Vortex__DOT__vx_d_e_reg__DOT__rd = VL_RAND_RESET_I(5); + Vortex__DOT__vx_d_e_reg__DOT__rd1 = VL_RAND_RESET_I(32); + Vortex__DOT__vx_d_e_reg__DOT__rd2 = VL_RAND_RESET_I(32); + Vortex__DOT__vx_d_e_reg__DOT__alu_op = VL_RAND_RESET_I(4); + Vortex__DOT__vx_d_e_reg__DOT__wb = VL_RAND_RESET_I(2); + Vortex__DOT__vx_d_e_reg__DOT__PC_next_out = VL_RAND_RESET_I(32); + Vortex__DOT__vx_d_e_reg__DOT__rs2_src = VL_RAND_RESET_I(1); + Vortex__DOT__vx_d_e_reg__DOT__itype_immed = VL_RAND_RESET_I(32); + Vortex__DOT__vx_d_e_reg__DOT__mem_read = VL_RAND_RESET_I(3); + Vortex__DOT__vx_d_e_reg__DOT__mem_write = VL_RAND_RESET_I(3); + Vortex__DOT__vx_d_e_reg__DOT__branch_type = VL_RAND_RESET_I(3); + Vortex__DOT__vx_d_e_reg__DOT__upper_immed = VL_RAND_RESET_I(20); + Vortex__DOT__vx_d_e_reg__DOT__csr_address = VL_RAND_RESET_I(12); + Vortex__DOT__vx_d_e_reg__DOT__is_csr = VL_RAND_RESET_I(1); + Vortex__DOT__vx_d_e_reg__DOT__csr_mask = VL_RAND_RESET_I(32); + Vortex__DOT__vx_d_e_reg__DOT__curr_PC = VL_RAND_RESET_I(32); + Vortex__DOT__vx_d_e_reg__DOT__jal = VL_RAND_RESET_I(1); + Vortex__DOT__vx_d_e_reg__DOT__jal_offset = VL_RAND_RESET_I(32); + Vortex__DOT__vx_d_e_reg__DOT__valid = VL_RAND_RESET_I(1); + Vortex__DOT__vx_d_e_reg__DOT__stalling = VL_RAND_RESET_I(1); + Vortex__DOT__vx_execute__DOT__ALU_in2 = VL_RAND_RESET_I(32); + Vortex__DOT__vx_e_m_reg__DOT__alu_result = VL_RAND_RESET_I(32); + Vortex__DOT__vx_e_m_reg__DOT__rd = VL_RAND_RESET_I(5); + Vortex__DOT__vx_e_m_reg__DOT__rd2 = VL_RAND_RESET_I(32); + Vortex__DOT__vx_e_m_reg__DOT__wb = VL_RAND_RESET_I(2); + Vortex__DOT__vx_e_m_reg__DOT__PC_next = VL_RAND_RESET_I(32); + Vortex__DOT__vx_e_m_reg__DOT__mem_read = VL_RAND_RESET_I(3); + Vortex__DOT__vx_e_m_reg__DOT__mem_write = VL_RAND_RESET_I(3); + Vortex__DOT__vx_e_m_reg__DOT__csr_address = VL_RAND_RESET_I(12); + Vortex__DOT__vx_e_m_reg__DOT__is_csr = VL_RAND_RESET_I(1); + Vortex__DOT__vx_e_m_reg__DOT__csr_result = VL_RAND_RESET_I(32); + Vortex__DOT__vx_e_m_reg__DOT__curr_PC = VL_RAND_RESET_I(32); + Vortex__DOT__vx_e_m_reg__DOT__branch_offset = VL_RAND_RESET_I(32); + Vortex__DOT__vx_e_m_reg__DOT__branch_type = VL_RAND_RESET_I(3); + Vortex__DOT__vx_e_m_reg__DOT__jal = VL_RAND_RESET_I(1); + Vortex__DOT__vx_e_m_reg__DOT__jal_dest = VL_RAND_RESET_I(32); + Vortex__DOT__vx_e_m_reg__DOT__valid = VL_RAND_RESET_I(1); + Vortex__DOT__vx_m_w_reg__DOT__alu_result = VL_RAND_RESET_I(32); + Vortex__DOT__vx_m_w_reg__DOT__mem_result = VL_RAND_RESET_I(32); + Vortex__DOT__vx_m_w_reg__DOT__rd = VL_RAND_RESET_I(5); + Vortex__DOT__vx_m_w_reg__DOT__wb = VL_RAND_RESET_I(2); + Vortex__DOT__vx_m_w_reg__DOT__PC_next = VL_RAND_RESET_I(32); + Vortex__DOT__vx_m_w_reg__DOT__valid = VL_RAND_RESET_I(1); + Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd = VL_RAND_RESET_I(1); + Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd = VL_RAND_RESET_I(1); + Vortex__DOT__vx_forwarding__DOT__src1_wb_fwd = VL_RAND_RESET_I(1); + Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd = VL_RAND_RESET_I(1); + Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd = VL_RAND_RESET_I(1); + Vortex__DOT__vx_forwarding__DOT__src2_wb_fwd = VL_RAND_RESET_I(1); + { int __Vi0=0; for (; __Vi0<4096; ++__Vi0) { + Vortex__DOT__vx_csr_handler__DOT__csr[__Vi0] = VL_RAND_RESET_I(12); + }} + Vortex__DOT__vx_csr_handler__DOT__cycle = VL_RAND_RESET_Q(64); + Vortex__DOT__vx_csr_handler__DOT__instret = VL_RAND_RESET_Q(64); + Vortex__DOT__vx_csr_handler__DOT__decode_csr_address = VL_RAND_RESET_I(12); } diff --git a/rtl/obj_dir/Vvortex.h b/rtl/obj_dir/Vvortex.h index 543ae44c..a839f777 100644 --- a/rtl/obj_dir/Vvortex.h +++ b/rtl/obj_dir/Vvortex.h @@ -5,16 +5,16 @@ // The class here is then constructed to instantiate the design. // See the Verilator manual for examples. -#ifndef _Vvortex_H_ -#define _Vvortex_H_ +#ifndef _VVortex_H_ +#define _VVortex_H_ -#include "verilated_heavy.h" +#include "verilated.h" -class Vvortex__Syms; +class VVortex__Syms; //---------- -VL_MODULE(Vvortex) { +VL_MODULE(VVortex) { public: // PORTS @@ -23,24 +23,103 @@ VL_MODULE(Vvortex) { // Begin mtask footprint all: VL_IN8(clk,0,0); VL_IN8(reset,0,0); - VL_OUT8(fe_delay,0,0); + VL_OUT8(out_cache_driver_in_mem_read,2,0); + VL_OUT8(out_cache_driver_in_mem_write,2,0); VL_IN(fe_instruction,31,0); + VL_IN(in_cache_driver_out_data,31,0); VL_OUT(curr_PC,31,0); - VL_OUT(de_instruction,31,0); + VL_OUT(out_cache_driver_in_address,31,0); + VL_OUT(out_cache_driver_in_data,31,0); // LOCAL SIGNALS // Internals; generally not touched by application code - // Begin mtask footprint all: - VL_SIG8(vortex__DOT__vx_fetch__DOT__stall_reg,0,0); - VL_SIG8(vortex__DOT__vx_fetch__DOT__delay_reg,0,0); - VL_SIG8(vortex__DOT__vx_fetch__DOT__state,4,0); - VL_SIG8(vortex__DOT__vx_fetch__DOT__prev_debug,0,0); - VL_SIG(vortex__DOT__vx_fetch__DOT__old,31,0); - VL_SIG(vortex__DOT__vx_fetch__DOT__real_PC,31,0); - VL_SIG(vortex__DOT__vx_fetch__DOT__JAL_reg,31,0); - VL_SIG(vortex__DOT__vx_fetch__DOT__BR_reg,31,0); - VL_SIG(vortex__DOT__vx_fetch__DOT__PC_to_use,31,0); - VL_SIG(vortex__DOT__vx_f_d_reg__DOT__instruction,31,0); + // Anonymous structures to workaround compiler member-count bugs + struct { + // Begin mtask footprint all: + VL_SIG8(Vortex__DOT__decode_branch_type,2,0); + VL_SIG8(Vortex__DOT__execute_branch_stall,0,0); + VL_SIG8(Vortex__DOT__memory_branch_dir,0,0); + VL_SIG8(Vortex__DOT__forwarding_fwd_stall,0,0); + VL_SIG8(Vortex__DOT__vx_fetch__DOT__stall_reg,0,0); + VL_SIG8(Vortex__DOT__vx_fetch__DOT__delay_reg,0,0); + VL_SIG8(Vortex__DOT__vx_fetch__DOT__state,4,0); + VL_SIG8(Vortex__DOT__vx_fetch__DOT__prev_debug,0,0); + VL_SIG8(Vortex__DOT__vx_fetch__DOT__stall,0,0); + VL_SIG8(Vortex__DOT__vx_f_d_reg__DOT__valid,0,0); + VL_SIG8(Vortex__DOT__vx_decode__DOT__is_itype,0,0); + VL_SIG8(Vortex__DOT__vx_decode__DOT__is_csr,0,0); + VL_SIG8(Vortex__DOT__vx_d_e_reg__DOT__rd,4,0); + VL_SIG8(Vortex__DOT__vx_d_e_reg__DOT__alu_op,3,0); + VL_SIG8(Vortex__DOT__vx_d_e_reg__DOT__wb,1,0); + VL_SIG8(Vortex__DOT__vx_d_e_reg__DOT__rs2_src,0,0); + VL_SIG8(Vortex__DOT__vx_d_e_reg__DOT__mem_read,2,0); + VL_SIG8(Vortex__DOT__vx_d_e_reg__DOT__mem_write,2,0); + VL_SIG8(Vortex__DOT__vx_d_e_reg__DOT__branch_type,2,0); + VL_SIG8(Vortex__DOT__vx_d_e_reg__DOT__is_csr,0,0); + VL_SIG8(Vortex__DOT__vx_d_e_reg__DOT__jal,0,0); + VL_SIG8(Vortex__DOT__vx_d_e_reg__DOT__valid,0,0); + VL_SIG8(Vortex__DOT__vx_d_e_reg__DOT__stalling,0,0); + VL_SIG8(Vortex__DOT__vx_e_m_reg__DOT__rd,4,0); + VL_SIG8(Vortex__DOT__vx_e_m_reg__DOT__wb,1,0); + VL_SIG8(Vortex__DOT__vx_e_m_reg__DOT__mem_read,2,0); + VL_SIG8(Vortex__DOT__vx_e_m_reg__DOT__mem_write,2,0); + VL_SIG8(Vortex__DOT__vx_e_m_reg__DOT__is_csr,0,0); + VL_SIG8(Vortex__DOT__vx_e_m_reg__DOT__branch_type,2,0); + VL_SIG8(Vortex__DOT__vx_e_m_reg__DOT__jal,0,0); + VL_SIG8(Vortex__DOT__vx_e_m_reg__DOT__valid,0,0); + VL_SIG8(Vortex__DOT__vx_m_w_reg__DOT__rd,4,0); + VL_SIG8(Vortex__DOT__vx_m_w_reg__DOT__wb,1,0); + VL_SIG8(Vortex__DOT__vx_m_w_reg__DOT__valid,0,0); + VL_SIG8(Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd,0,0); + VL_SIG8(Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd,0,0); + VL_SIG8(Vortex__DOT__vx_forwarding__DOT__src1_wb_fwd,0,0); + VL_SIG8(Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd,0,0); + VL_SIG8(Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd,0,0); + VL_SIG8(Vortex__DOT__vx_forwarding__DOT__src2_wb_fwd,0,0); + VL_SIG16(Vortex__DOT__decode_csr_address,11,0); + VL_SIG16(Vortex__DOT__vx_decode__DOT__alu_tempp,11,0); + VL_SIG16(Vortex__DOT__vx_d_e_reg__DOT__csr_address,11,0); + VL_SIG16(Vortex__DOT__vx_e_m_reg__DOT__csr_address,11,0); + VL_SIG16(Vortex__DOT__vx_csr_handler__DOT__decode_csr_address,11,0); + VL_SIG(Vortex__DOT__decode_rd1,31,0); + VL_SIG(Vortex__DOT__decode_itype_immed,31,0); + VL_SIG(Vortex__DOT__execute_alu_result,31,0); + VL_SIG(Vortex__DOT__memory_branch_dest,31,0); + VL_SIG(Vortex__DOT__csr_decode_csr_data,31,0); + VL_SIG(Vortex__DOT__vx_fetch__DOT__old,31,0); + VL_SIG(Vortex__DOT__vx_fetch__DOT__real_PC,31,0); + VL_SIG(Vortex__DOT__vx_fetch__DOT__JAL_reg,31,0); + VL_SIG(Vortex__DOT__vx_fetch__DOT__BR_reg,31,0); + VL_SIG(Vortex__DOT__vx_fetch__DOT__PC_to_use,31,0); + VL_SIG(Vortex__DOT__vx_fetch__DOT__temp_PC,31,0); + VL_SIG(Vortex__DOT__vx_f_d_reg__DOT__instruction,31,0); + VL_SIG(Vortex__DOT__vx_f_d_reg__DOT__curr_PC,31,0); + VL_SIG(Vortex__DOT__vx_d_e_reg__DOT__rd1,31,0); + VL_SIG(Vortex__DOT__vx_d_e_reg__DOT__rd2,31,0); + VL_SIG(Vortex__DOT__vx_d_e_reg__DOT__PC_next_out,31,0); + VL_SIG(Vortex__DOT__vx_d_e_reg__DOT__itype_immed,31,0); + VL_SIG(Vortex__DOT__vx_d_e_reg__DOT__upper_immed,19,0); + VL_SIG(Vortex__DOT__vx_d_e_reg__DOT__csr_mask,31,0); + }; + struct { + VL_SIG(Vortex__DOT__vx_d_e_reg__DOT__curr_PC,31,0); + VL_SIG(Vortex__DOT__vx_d_e_reg__DOT__jal_offset,31,0); + VL_SIG(Vortex__DOT__vx_execute__DOT__ALU_in2,31,0); + VL_SIG(Vortex__DOT__vx_e_m_reg__DOT__alu_result,31,0); + VL_SIG(Vortex__DOT__vx_e_m_reg__DOT__rd2,31,0); + VL_SIG(Vortex__DOT__vx_e_m_reg__DOT__PC_next,31,0); + VL_SIG(Vortex__DOT__vx_e_m_reg__DOT__csr_result,31,0); + VL_SIG(Vortex__DOT__vx_e_m_reg__DOT__curr_PC,31,0); + VL_SIG(Vortex__DOT__vx_e_m_reg__DOT__branch_offset,31,0); + VL_SIG(Vortex__DOT__vx_e_m_reg__DOT__jal_dest,31,0); + VL_SIG(Vortex__DOT__vx_m_w_reg__DOT__alu_result,31,0); + VL_SIG(Vortex__DOT__vx_m_w_reg__DOT__mem_result,31,0); + VL_SIG(Vortex__DOT__vx_m_w_reg__DOT__PC_next,31,0); + VL_SIG64(Vortex__DOT__vx_csr_handler__DOT__cycle,63,0); + VL_SIG64(Vortex__DOT__vx_csr_handler__DOT__instret,63,0); + VL_SIG(Vortex__DOT__vx_decode__DOT__vx_register_file__DOT__registers[32],31,0); + VL_SIG16(Vortex__DOT__vx_csr_handler__DOT__csr[4096],11,0); + }; // LOCAL VARIABLES // Internals; generally not touched by application code @@ -50,21 +129,21 @@ VL_MODULE(Vvortex) { // INTERNAL VARIABLES // Internals; generally not touched by application code - Vvortex__Syms* __VlSymsp; // Symbol table + VVortex__Syms* __VlSymsp; // Symbol table // PARAMETERS // Parameters marked /*verilator public*/ for use by application code // CONSTRUCTORS private: - VL_UNCOPYABLE(Vvortex); ///< Copying not allowed + VL_UNCOPYABLE(VVortex); ///< Copying not allowed public: /// Construct the model; called by application code /// The special name may be used to make a wrapper with a /// single model invisible with respect to DPI scope names. - Vvortex(const char* name="TOP"); + VVortex(const char* name="TOP"); /// Destroy the model; called (often implicitly) by application code - ~Vvortex(); + ~VVortex(); // API METHODS /// Evaluate the model. Application must call when inputs change. @@ -74,27 +153,29 @@ VL_MODULE(Vvortex) { // INTERNAL METHODS private: - static void _eval_initial_loop(Vvortex__Syms* __restrict vlSymsp); + static void _eval_initial_loop(VVortex__Syms* __restrict vlSymsp); public: - void __Vconfigure(Vvortex__Syms* symsp, bool first); + void __Vconfigure(VVortex__Syms* symsp, bool first); + private: + static QData _change_request(VVortex__Syms* __restrict vlSymsp); + public: + static void _combo__TOP__6(VVortex__Syms* __restrict vlSymsp); private: - static QData _change_request(Vvortex__Syms* __restrict vlSymsp); void _ctor_var_reset(); public: - static void _eval(Vvortex__Syms* __restrict vlSymsp); + static void _eval(VVortex__Syms* __restrict vlSymsp); private: #ifdef VL_DEBUG void _eval_debug_assertions(); #endif // VL_DEBUG public: - static void _eval_initial(Vvortex__Syms* __restrict vlSymsp); - static void _eval_settle(Vvortex__Syms* __restrict vlSymsp); - static void _initial__TOP__4(Vvortex__Syms* __restrict vlSymsp); - static void _sequent__TOP__2(Vvortex__Syms* __restrict vlSymsp); - static void _sequent__TOP__3(Vvortex__Syms* __restrict vlSymsp); - static void _sequent__TOP__5(Vvortex__Syms* __restrict vlSymsp); - static void _settle__TOP__1(Vvortex__Syms* __restrict vlSymsp); - static void _settle__TOP__6(Vvortex__Syms* __restrict vlSymsp); + static void _eval_initial(VVortex__Syms* __restrict vlSymsp); + static void _eval_settle(VVortex__Syms* __restrict vlSymsp); + static void _initial__TOP__3(VVortex__Syms* __restrict vlSymsp); + static void _sequent__TOP__1(VVortex__Syms* __restrict vlSymsp); + static void _sequent__TOP__2(VVortex__Syms* __restrict vlSymsp); + static void _sequent__TOP__5(VVortex__Syms* __restrict vlSymsp); + static void _settle__TOP__4(VVortex__Syms* __restrict vlSymsp); } VL_ATTR_ALIGNED(128); #endif // guard diff --git a/rtl/obj_dir/Vvortex.mk b/rtl/obj_dir/Vvortex.mk index 16ce24fa..edc5fcca 100644 --- a/rtl/obj_dir/Vvortex.mk +++ b/rtl/obj_dir/Vvortex.mk @@ -2,9 +2,9 @@ # DESCRIPTION: Verilator output: Makefile for building Verilated archive or executable # # Execute this makefile from the object directory: -# make -f Vvortex.mk +# make -f VVortex.mk -default: Vvortex +default: VVortex ### Constants... # Perl executable (from $PERL) @@ -28,9 +28,9 @@ VM_SC_TARGET_ARCH = linux ### Vars... # Design prefix (from --prefix) -VM_PREFIX = Vvortex +VM_PREFIX = VVortex # Module prefix (from --prefix) -VM_MODPREFIX = Vvortex +VM_MODPREFIX = VVortex # User CFLAGS (from -CFLAGS on Verilator command line) VM_USER_CFLAGS = \ @@ -48,7 +48,7 @@ VM_USER_DIR = \ ### Default rules... # Include list of all generated classes -include Vvortex_classes.mk +include VVortex_classes.mk # Include global rules include $(VERILATOR_ROOT)/include/verilated.mk @@ -59,7 +59,7 @@ test_bench.o: test_bench.cpp $(OBJCACHE) $(CXX) $(CXXFLAGS) $(CPPFLAGS) $(OPT_FAST) -c -o $@ $< ### Link rules... (from --exe) -Vvortex: $(VK_USER_OBJS) $(VK_GLOBAL_OBJS) $(VM_PREFIX)__ALL.a +VVortex: $(VK_USER_OBJS) $(VK_GLOBAL_OBJS) $(VM_PREFIX)__ALL.a $(LINK) $(LDFLAGS) $^ $(LOADLIBES) $(LDLIBS) -o $@ $(LIBS) $(SC_LIBS) diff --git a/rtl/obj_dir/Vvortex__ALL.a b/rtl/obj_dir/Vvortex__ALL.a index b01d2b923b7a215055c40403b02c29d8e8963870..ae89e441c6cb43177511a71251492c8eca88d888 100644 GIT binary patch literal 31104 zcmd6Q513Tdm1ngQp@mqz2_`!0hH4Q-p^@gFbVTifF1jQ%b}J~E=vE^%!YuN)F(e~e zO;fQRkKXBIV8bL%hRo+?*({U6EQ5_7pLQc((>km+kx!W{leC7_ECRm!?t^?)qw7O=5P$zmDTEcTptLJ0ueM(!~Zc zmffGLPy~~g(nq$zQpiNR(QX{?pNw;SUw=Rd`t8afK1p z_hG<+wUNkI6;4yQ12C2P(|MJX@4kE0+UBMWsnlKHcyL`!W#XZt_(_VtNy#fGrBZh< zUbS-R@(0$hZA#RKn)ZEn1OU*VNp+qL4VBc5+H+m#0!{|+W~HyZK>A4+NI&%)^waYyCbeSKs?}%bn8Jz-71~r0a(2F{ zOP8-KV4Q{Qe`RrA?ax9ELnyEP+NM`y8*bIzO>390Sk&CKWa^Tp``169dVQsGsuxkW zYRUQ)O;c7bday}iQ;S!iwWJm=TCpP4+_d&VXw}>#8iZOqb+ZXtjlv|*HJ_xobPN{} zj$_l!z$ABX9K+yNY#f_3y>c=~H;!XoZ;sEMyLiRA39Bejua`dl&8I^nkrH(M2!@#m zhOx*(j2Dp@{%~E1zvGM;_qM)>y`B5|cqS{s_pvkA{nES&F$?bF+e zqde*|y)hE`9wUcD(ggNOr5;$kIMuXaantJNRP&YdntB}`i7YcQ<~|94 z^OaQXWtVzUEFrW@$jROexB%KeFZUSI^XVU5Jr|A9FxH&)_wwR=o=*Te&q#fV{X=0Di;$fG@ zY}^C6ok@4WE{U=9z|`$YI@#6bV0Y^JL4dzI%aYE5UL+BqZ9UX@-*e7Ui0pIfPUP4d zj4CgBNTl6i(uEQ}tJR=SP|@L{`huM%G%6zbXWm`@4ZZKVrE*P(j@ryjnfTUIu?|*{ z6cP!Yjs2?Lv&3h+sCjnIFp>IfEPyKYQKWHZjtC>l!ibRu!B%KkuJ92yrAvJ#iyCfF zBRsaNe43?BH$^RV)+T+V5kB7_{L~g2L@-}5pUI|H?o$~#_ZHGz?V}7$W0+})kFbJA z7ox85x?>0Muly1}4WvzBU{p!{l`b2#xnq9d&v-;YJxuEUeGLZM17u6tk9+PsBf zH}QUJXNi+|Kljp^GiRP<5gPe1JX!hUeUz|n%6eoR*bHu~hvR5vSu1>2i<)3iUO8`S z_c&t#&KnJx*AzEx^T>#^(kA+37FB6bBLh^E49e>cn|64@sE1#4a}8lEz&qJTnVfR= zGB`gEJ3U+sPgavDVX`MYGO}8-seTF;HO)tvM0a_dUNhgc+rz~I(rz-WtOdimrzqKU zL*|$7UXLtTzEy@S*xbHsQ27Nn&mdzEV)Jmbk1~pMcqx#~;0|~=Uz1J`7c8Y2zBrr0 zExsm3+98iKh9^sQtIui3dOR|}Fpqe+VEetzXSLF*!-@8KoI!QtKAGj5S%{idh^i?> zB??iq1!X1I9!?BEi%84Hfk;^-5^WoYz_YA0AzSKnB^NK?bdFJf>)p$sr<)j%jz5s= zVaKnwr1FHBxIgK%9QTlvq{u#tT4|`>zHx;{&iS^KWnzM5s420v+ z&ESIW8;?t(VgPhh1I0O6-6^#)JZX67^Tk@@ z!eq}H7rjETG&-urvmZ=(z;rN4OF3Lfd?3Hi8fytA8qGBKQHqAuv~gfd?XW3l_-|K9 zG{aV&D`mbABZ(ePoRoYXPRKgK!@G%-(kxE4o?a6Do38Y`XYl`nE-PaWn1o*}9Vc+{ezdd)Js`SSYupw?0=!AcAZ!;Iq;37^d?^iQJyN5DJ(Ai7XUg9zEh@t=eYQnv zn0<_i@@Y%0sGNO_GEl!52fX^N>||gwN>=-eXOBzc9$@`44qEh^;bUodJSbXz=TO2n z601#`Y2=Mxpa|557OEM;&Z@7}S#4?Sz!|NsvE@Bk44o*Dd#*7k#InA);H&I(5~p%} zVllhPhcWE9iBlM>2AudZg6O_@K6$@(CXzR{b`8PW31wqAnhCn&V<4>v=g9!)2H`x3 z0l;vsD9X{7YgE&)mZnLv^)N>Nx`Cv# zUxIkt(lCjbY{Lu!_sN}-A#|N5X=fT7*AaYjp6t}8=)N`6*bco8*q3WYRL4yk?|wUt zr`FdWt?G?tE*B*FT9(MJ+z4(#+=j=FFG>uOJqP)5DMWU3GwFp|{+KgoqDH}%9V!uB zep=oLaV%GjD0C&1T;%D|Lbe{=R>#&tt*~>tt1}ZceM1? z)-&vHt$kSYvA^KK_Ou(>)6(CJqa6N31SU|>={`QfBw&fbB$OZqrY*@z_ML3<%LH4J z6HTbfgr=C#Ed*|RR;69s{)9d`?d-ISO>ejv>2ZlFwAl_kwY-J`z?$rZrOtwWv;(A_ zKpUu^hwxjKozx_{uc5lCw>rALyE^?wNp*DJD+c?G+p10nu-)YcTR(>U^^n?O))$sH zn)#fUC=Gay2wx@{OVm#yNY*1{NBl7}%Qb^j=eKhwaT0A-%4$o)ZP^8|UfEE#ipa!( zlih=-^v2&nr7z%VsSeZ8rxv{Byt35Uyk?m{s!Yop0(x@8RS1TZm{Zq-9%d^JO33nZNr5#+|?r zu+XXFFl2<LPcZR4V%Evv#{pEPwaTA8 zvktj=_5s}D9jkDMPVsElT&R)A&Y4JvjyQ7~%mKl<-%FFU^;eH3s*c;PnuzW*9DZy~ z)h}%<_&*Bq)>Qo>5c_U0w(Hj;Abn^})z1SINAoF0##?^HK37xqPx0t??P&3Q`3vQ* zlztd5JzZ1Y>E~ezc}*UIMoVyNm~W;A*0|GRx__YV?IgM@*M{aUg+$7{vVRzbVmc3t zrzme{q^`rT+c1|Htn%j(R&QA| zSzva}&4lRC6|H^4WO8~Hy0XqNLRDC!=YQnkjCFEX9?n=NG2l9|AVT?}B{VD{7}xSR zu;mAx1v_#hmB&pYDlsrT%P6OAhnv{pB(~+MG}MEc{qp=}QqK)V(|JGkA%HYc$) z7`s(tw>pVz5T8|img+ezoUHh?rQs%mY{P8?ZVN|wp@?5a;0=1V;cw3Ui$BgMOp(>k zEA?7WuTz(H6KN;&FiJLeyDx9H$a@3~ z!D(@NzJ0To^4d0#brva&+0Ohl2&I>Dvdn2~CRrKCm0dGrT()%5mlHWLA^- zCrXSus}*%xm`EUdnBjxwR9KN|aIA6~#?yx>BZ2rjd*ok0jqx{bK!fy*0A+^-<2xoTKixY(Ju%?WA;t z-brkB6Px!(Mv!a4fV0UM2$;m5npt1f70q1X$x9z6ZW`6OAsN0yhKoWB0qK2+C-Hm|(^=WEDMTEQPGT#)o(z7R(Z)F%eQH~hHjJ~K z1a5|RCqwD3+?@>7a^>!1m?u~6rnf9fZ+si35&OC>L!CGSf+U4BfH# z3P>o?sz5n~ls^Ea6gx^r`n}A5Mgyy5*IOf6U%!~GTew*wPG%yxZ@{B;{r$}6)20sB z54g{y5$t+rMC+RuBLg+a0Lfipax&w|dL>ol__BXAZmc?E8??UhXw|#b(QSvT({FMu z@lt-&Kp^UHX_u&Mt9mTu{sVNE`pQxVSR&Q1`napcqh)y!F^w39h>l^n?JpG)s|idL zUpZZGU&*Q)h}QHtZ6tFuyc@}`$agYS$CbOuo-3JjGORgQ?xuCP(nd@Z zb)})2hV4r8b~5Y^uG~%Ea;1ma)kX!i+A?Q6L3R$T0hG)+eW>$HVRQaJ~AprC~Z5vkleW2*EK-hR5s6 zz2Q;DQqMrKWj>4=nOd>!per}jX(Qgv@ZQ=t%H~}%?asW{n>my2z8X7l4N+(09uH2o>C!d1%gmM_&j2?^ga3)ndt-4u}{Mrbo?KJtX1#Jg} zo~eAE*>-10k(#PjHzeyV2Ua%EoSm;yLiM7#Te>o6+T4cy$ql%tz& zR6<`Tx83N}Pi>C6+X-KO%h`UC>Dv}40kC42;-i!4V=RxgT|f#a$cYpPnZj|(uqjBu zq`*g$f-C7bnPa4ELabjFrjq>{V7W7PvKDbKSy{_VrXz|YFOY(8FxFz+gAC!%3|_}4%H7F4L0V?n+hmn(bi)HH$Zob`Th-Z4Vpmvg3zfS|vzm1n-OOVlfBpOE3dx7Yey#!tp2K0%Z{4>GZ% z8d?JFtUv86c;BfTsDaZHXHB`PdBL8gBn=J*^a=iy^FlwuL>x!w=}X?6z;5Z|cB`_> z91_Sszp4IWI*blKcAVU}SeFR)@fjC`OApu9o2TyDYXs9>ONZ&kfy1@SEKzsuwTfC{ zQHN_+`;X1`vAdRTNANz@LliC(I${D6>aM*_VYSBg=EcSp%U;Zj61r<|QtTdsRP1!c z(#YavXsd=A_+^2}Ax0>JxmoEu47r95F~_$5Vr3mH?~=8qzha?2UAd7slpvFT2iI>rumFHP zn^XH~7>_aTJLF_NHc{?|>vsKs@knCa<@VMuL1bpYG@b$rW;2T0B?ls6$UPUkV?k%O zE6h@tX0-4I7tD$N+-TCVcJ>d!&6wLo=-_vQt1gE&ldnfild~JOeMTUvKjIx)D3)*^ zMkENtrWMaXSnd;ADkt`H=`9vmbrz@2He&1O>oF<&$I^(w_C9v^s}2Td*kH|ID`aTZ z(Ln5rdcNlhF#F|*YT+JI-SNO$QpB^mc)UV397B~eM|ORlnl0OowwmGg<#36O!MbC) zC-GFU=Xj;2tdzPd2p8%`QinGj19JNiPq{~Ob)*dMHU{L9(#q|TGycq~7;V`23~V(n z=n0)RFrIBOBjVynfDKXP1jwOtoB-)O>j{tpXFUPZk^6w^Lt)I_=XC;P?^#cP>j+!}}C4WI0ueFhxE0 zV@DpejU? z$n0;Ub1Qh>lu|jUwtgUcH@4AgH>moWGpdr*ukmGx{0jW?{H)(Dns$6 zGz+PJBsP!C+F zUI|6dH=&oxd;ElE`U$o6Rm%c$7v>352Fz#cYcZL+)`YO;AQ_iK#?_SAoU0CznA2nd zl63BiAriAQQ|3uA9=?8rgBqBXV*WO?ZO@P9(S|(iMSa=UeeQ~fz3a`3;bg}&8?3a; zTizJJ^h=cQWFH3Sb=3E;iw`j9YukXmF*8-Fd$5^^K;9$_b+Ns`$2U%GUbA15}NqdOAd9 zYK!)Bunx`WW4Af2yXf2}5Be}{OVya#dS__so1^4}gE-uR#Y;DwmOmejk1j~C&?n%d zaeAsNQ{1E0Ny;L!-qrbJnxxx_Ms0hFa>%&~v7WqKJ_ie;pvlu?m$SPzHU(3N%R{`T z5GN@%`c!gGS8jOlNQvLzqfgD5gA*IZix;S}BvXR`G(tW);*$%OQjJf*N8@BP9z{nS zq1GK*O~Mi9Dg!zkLcW+H4QV>5c7<|l%HW|8)|A0*dD!#m_O#|%AXAuBpg<%HX($jr zs(&s(Fp&&~fRE?nPs#TcuK<^E&~pNG;tL62%;8)iVZ#`1!S#lGDu9)I-;PJN zAk4Cu9j$9C4+^B{vvMp@YaM@~|rMuk&AA!!&KjhK|Mk7co+e zvYKUg+NYrZf;5Br^Zph7iz}G+wMel84`=sZkktCwMw0F9JHEEbTK`2ESqgW2t^b12 z#k_l037&UHd}V)3|HUw-iXCx6dKZQOdOPA0K*6DN@X-Ii+Pj8gY-x6U-VPe3-n){1P{xSkp7E4%3z1* zi46&uvgD(aVG6F?oy-YRp1n2OIotX#j+3RZHCz7$qumVeM!G9$1br5!H5>o$e(s9k zTq*atpIwYwT=t^oVhoHs@p}cjEonp;)0zluHZ|N-Bm2~LkN7#kn{DVgjwfLkc~ni+ z&#)aN6ySKdro7iOPaixg5y!9#(sQ*pyHod-$IE6l|HH{$Nov<2ZVor^76xL;PWZPJE;Z z7Zz#!wzKMlB0ZZ<)r0GVA{Cvi`m+mktQDP5#8O}=#&~&6DGueDV#$7WT0m#+vKJ*_FP8C^PHAInPz{G`VQl19a76=ElH z&23fiDR{y})wuhlwA8m{)rDP6Q+=TRZMi4Dn%kXT#LK2tf}~-lO!%rr!z>B;iqr%Y z(Va$r(Y_g(ciN7zW0tB>iYXVXI57)md514+^zh~XRQrrXvW`nafalGDE^_$Nm)|b( zdnw;HBkpzDh_Sw2@$UvsVa^i4=XDCRhk|EO1twJ5v@j8@kZdBMvz5JwaoP@$bv7vj>Vznd2xSK;eT{lNWHATsUQ4W} zFeMBQ%%XgB#Jg;L%q&go?cGDhF(72VSvqE%>v}61K7~n2>t|(aFur$V*3E|(i+lZi z0Wr;F#h=u2Y9}7U?ADl%YkheyNwAd}H;VLJM@L|{=tztn9hVuwb54*c z5gfWW=-JqhOHaqM2Zbct0PiU#OGC<$fn%H{6dG?>5_bwm9~=E%IfgnbXIwyz-L((U zs;FQI5l#dD~rgp%o(`2`c#{lo`kmXM za^yT6Do4Cm2k|nYv?Z8nctXL#&D8V9b*LN)j9*@LaZ|hU`C{G_GIQNul11$VSGF*tTox$*ygl8H8bTZ%UKeN zo^L`u_LJcAK*$v~yv$IqwQ#3${5sb7Mjz1>2kla-X1nWz@*BbnJcyCsf@m z?Z~|xA~BmCKMrBdX2-*M*z?)!_yg^6Cia@%Y~HrntL=6#-?0s3Ch!7Tq1R-0kaD+5 zz}vRFa&s|m1`EklK)7@ZD&UFShk3=(`dUE+?99CwA~Bn80i7Su{nrqQset^VwwuiM zT+|<6+cL2uSRgyJK;-S8fO^{$zs*S)|4Yz8)t(z(bU(5$l%s-j*_!+N5J^F~WOLsN zk(hGfGBsFPreWTw*z?(mgo7ZE!Ofb%%}yd6#HSUHz3?o2FK`Ue-DBJW=iF=Dz^#j) zhcqqNZ*3-(-MGo$Z~a5>HLhk-v>MeAlrVxY1o@~N`2hlM6`B&z7ka3ybr&#u_SK_@ z<(YR!J!re&`ozHw?-*I(8hc^hv`_by*cIoy#^#ZWLDtxVMg9M@#_kHJA6jD%7B%P^ z`}bW_50((t)PqI+ao5y&$L&mW@z&cP2NuCEm%idHqZ?q#3n>~>d1+ujWzZFM!)^Xn z3JeKdQLDYlr4G+67F#%1=SBQud5@-h`%GD?*w8Eq1y-!`VIW_gT#QxDyz9CmA0P;?sC_b7QR9$}pSUci>-ZBJ=Fkg%bR#$^9MMVP2$YgvnJ`Ph9(kXJ>T~%w z*iu=~)tvHveP({~-|z66Lebx%B2V6VQ2bt(_xn8k$anbne;99$hT?}m2joY0><@+w zhr+Gq$AZ|Z%=#P)gD&~e2InBy^jAv<+{7oX{UuIk-09?RiO$6kk&3fRWD@=)Ee6u~W6TfmSK{Cn;-7G%{zCAC#j96Gyq`Xf zJ-BK~(~8)VF*ZlBoB=YY}gvp2{ z0*oo1aE&kxIliR#y1+Wg7{92pUE+-i2Sk&!}!q`2Z>LZ_)ASb z3gpM`H1Q>a$e%dh#E(%j1N?iV#t+(lG=A(L{ChP1)q2C_@ zR9V@Gp~KpdoAC&+?eF*z>`z?U4Ha)r`mKDp>9oHVmB*g}+x7QGE$#P3>9#UIdko##2y3ON;d>;eXP>yxKNaCJm~6`PREC$bo@@mLZ#DjqA1REMpo{%qL#N|QQMzrQ8}^~0({ZLK-2u>*Dc#xH^T~ib9e0Y#8!^O}r{hln z-S;p)eI^pASOYj3a4D<}6lcXFbp|e*Yv7x64BQ4mNWS9ZDieNxx`9u^1Sa3b(+vCp z#&slLkyUsM87JRO7{^KX!!Hd0{HemfQMgs%28Bx$)+@Y4 z;aG*2E4)bI+h~kT=YK0atZ=WwoeH-q{D#7%3hz{So5FDlzo>AC!gtU(B^`x53jaaj z-zxmi3jbW;0}AIWj4P~Ac%{Ni6#f#8i0SNC_#=gXsW7cj#uCsi)NrlBDGEm`EK_&} zorrSZR`|~fUrW0@DoiVER9LMr zrZA$g5BlNpl1_ykfDnDj9zf`R*-pi$6*elYRv1%=u|W7}mXi-axdE1m-KdBb3)_o zI;PI@Cycz+nx0+9aluV~yYBm2jZY6Z^s_bIt{awUe(gGTs)h}9B=T#ePh))N)s8>P zx9irgNjM!zYk92IFe{bUTgcC-l60gR<2-{6r}HW6%fVX?q02p9|6d5K@Bi z$x!^!P<&@d9(jZOw6%lbaiQ?5A^xMG^!N#;yPB)KPcoS=mf5c>RpKjOXZvhd(XUbk zzc}@Kd@1Tr=h@V~?@i(RPxgaT@?kam9jefGp?v!Acc{D=PxN5lW>fr<74;9@)m&M* zXvOjeR^qE=_-GYNYUS4-EQ0kEW^rA}N6{|$D`4mI#jnZ>`smvv^C7bH`kLH@eIRZc zzUUVGh{}jU%q_#pZ%Gkt^{^oqBcH1k-A+_!hdIcUQO!G#9fK`;3r`id%Ixg z6?8J9Q;Rn&O5NY|!19&&=vwpQWr8aH4Ymd5OIvp~ty_=JWFejKmkf)2lg;*|z=z`s zKK~Yo^T-Q7J$F8zKdfX4&5qBH&rQ|M$7kV|-!(CX|B>2RvjQJ8ThTO)*?eHbhSch& zwd+=`ME7m}M(Ux71#}ZRm|u!(^aXw&u5z0FEN1@q;nuBRea`R04Z~a*i7{pKeYk9J z;5KOQ-luV6$%D&=u{_}VhHE{!&iDIp|ETnoN8Vw$$rLvvlGZ2z=lVX}5hbox$h`nn zQ8D@8T;Fq}2Z&d-+_4XU`3nCdoENDlt~~MQ`kq_8%HzDxYlF&L24ReXS+Pta^hW!G zHlDB*`JUTq@X-{BVI6Y?i1=KOKVIbFAN8fKtd|SD^!o+Xa(I#7bHfj6!vlg(mc7ca zs`XQzctqUwy-DW_-Lr==2(r7&lI|mA^2)jp<%F{JP<7zDYdF(rBuJ#8u-`+mA3y04 zZtwdR^(Mve_hDlB`k8OUP%lF+AD2;o3iaSCOmgu7EB1(3tM}o7X4#+PuVg81<@l3} zrI>#`W`c2xwe4=FBE}h5z<9pprREJ?WSTqAlgpF{eW1KSI|sGJF18QqR9zFCNBxDLr|c3>kx$N zE&&nOA;EGIyBczMZNwkL_M*FncCPIw48;sUy zri*Q!D^qN1$Eoc!<2X|~{fD*|v1MuyCP}A^hAFMFL#OE!XOa$TL~Bu}roVIVxx4SZ zeVa{eZ}Q&n-FtrL+^=&#_PtwpcSA?yz?T=U4sP5O@TEhrxOj6gxT&bL$mc5#Y=S_F zgMmOv5z>Oe65J`&FEoq|HTPFl>RYsQ7{%j1uhF!Txtg|Wjzp4Dd?{mqaUY|}c!KdQ z#(8;CuZS_i_&vrmjPEn9=6rWEwlE%He4g>wjKhp?GUjo4dw|2YYT5&gw=+HqG>iv! z1UK(F)YcJ?b{j^`!v{MngZd%Y^i7<8JJW-k3}a8Et#yA(b5}=HuXfmJ6hmR@U=>koosX@au zqhT7;_F}%!e7F#n;Tk1Dmf*cX3c5)LLB(NHqiY@|A{c0_?znuG@mhUvZ91-=?z&Ds zkv%F)-%XlUK}mD9UIG;iqd5{WqTP{bd)$aOG-5c|?A^_Fe#8nddNhrTs7%<$tj-x>2f?2VaK7bj>a$a1`vN<_vdWu_=WT2*B~ zCXzhYigNGn7qR`GRqzB+f2w=$8!XVqb{-(Nd@U7;+Xd?awd3Xg0L?bOVSC-@WRZbrD;2gwM-__P?veF%;YRj zCrOUanXpDCq|37|%}_b5NGC}v>qUZm4ulhDy=X|$zSUA-&Xs15vcI91mA_HDcTGx~ zR74Nh+P@F}AlYm3`t*0xF8Ww$w*CsFx+)ne4JWQr*Nwq}Mm>iMMf3EGiX4T5oGe3< zIS6MQ4V$lXP4uzwP+2JiP?gSzY6aL2C(WwM?1FF{X$lY0&4f+md9q^4^G1YmXZ!O$|HHW*qe&~u`$An~zg zzUtA>3p;gd2sqiJW8op=>ttf6Ky)?jB7y^^ewjy=KA8-!Pn@2MNh_&e#xyr+miq`i zC(7*_;}fJyT?GxS$w_@&(pS3DFHO)EB{=XhRfr~k&xwu|iBC0@3sVN>4z*q^C*k0| zE0}ceGEq)!1v#&kX4Tk46UL}?s_;_bO*Z+(i7%(+%M*Y13W}=g=)`iHG~Xt@F!3R0 z1*eDZTp_KqrCnpw7@62$ljhl^=Pb>HqMu9Z=S+PhsgIcY@Wc}~MQN7S5w04tm&Vey z^O;p=Ef&`yn$*vl`oP5IY4z5aRi`X^Fmo!YpMqXeNAC|~>xLOQsb8R3SRXa@i%I<= z_E1SIZNdlE6C}$8nB`cqc{~dLKQeD2di7-=mB2Y3;d9BlMdWjpT>nz@@yHEA6g++0t^0tRn;C zm0CrBS&m^#8$$bh<8I%@sW0bn>hWov`qH#cJvM8nzBsK@k6Ic8PHlCW3!lxYM=TcM z)N+8F%k9*|7Ckt%bYwZmq&t%f%L#^7V0|1@U20;>aBAwlto@g}UZThkaA8{@B_nvCCHWm(d2ixYh)V>_V+d2vozmtM z;pL!UHBb^+-bN1;9>GQW&*I8U;O5ZZu#w+3Y>2eCYpJ&=zJqN|(U`BPrKxpo+=q9B zhoT+L(QNX{iZo?QG#)wN+uGV0zteY1FtECyG8%y`OA5`!sqnFUDpv{WJ%Ie7t7-f* zSyon&fId#SQ(}g^oqvt5mO2^oewG(zk&m$a1t~9=fOh2f3cdWheMJ`i{v7fFmS4@H zKY&Sdx@S!znz)uugM}0&_@}FEJ<=NWD$9|Bl|HUc=6M2tR zZ{MZmb$b^)M?LEGE?SU(6uD8mtig5c9qi>1cpPZ?fBZxylrQ#v>zaz|xEr)3;8MtY zL|DsHcE|?hRsXJ3dx3fRA@_PxIWOb#z9;kN_H`}i64=e30q<_`H0JSmbG1hs%Tea>xO3$_MfJHN z%g5u-mG>fe;rAtv$Du3lB6tDjvA?B_4G?*Q|tpG0u! z=SRV7XC9ANS9>pjH~ueKUmmxvymR1rKa{-2Y4ZI5yuHlhaqMbuCFatj%;WLw%Buu# z-Bp?I&C}!?124e5Z2lL-`2V7&`L|)7!7Eq)3Lw;OD8amjN53D4b=Ut91~8@?e;sf! za2XJ){wtWj7XjOWp!yqu$je^`Bs<#}D}gAhzZ6KkjU2xjcoX6u&lPK=|2-g*{BHu0 zh5ur z#QPiLYmC2TJjVD8<6*{5#zw}Sj5IfpJ^JBC^%)0Jef|V21fBy@eSQeU81_F1Tm`HH zE(P8Lyajk0&<7kqIbm`>?Jo#>8S5F#7=4Ty;~2=qA7Jcf>}9NHEMxRBYK&vZACL0~ z7*7IWdj4_XTDV?6r}r|}GnO&>7*Qvo=LM1;K-k6S35r)e1%Fr!!)l+_#BsGRT8u(? z@&>eC^gD$=;G(!%FIR%^0jD1}D9i&=TVDfo~N@yiy- zc#!R>_5CQv)qY`;<7)pgpz`PaLOsXT{^6UPzuJ#gA{$XYt{=_u6z|92qp%kj#nt|y zfa|OFqkrM@3Nmj0VSYc`d!FNJ|9Mcvd$nE+Y6^#OdGdNir%?Pm&|8H#m7Bs(5l8l^ zuod}R<1|jKaeB7Kf8~h3V!H&*+%B4Ul-{OC6g~4;$xO~R1%s&hmh#&2?M78CrjnMLfPsH4R8e6$sSt~n zP&J#oyN&i}M`s&OwY0<^HVy?cc(m7^?YWO&i8}6PKljnu)t>X*M?TH@K3oX&vAfSY zv5M66ZH#5>c%4vjS~lszG%LbP&wbFkPJ!%^Za!|}H_j~2ebD}jLYcU08twVHh@4`F zT<0{rTu)`M6zd88wJ^%Zb+nn!bxxz2?H%P}bhEt!Fh-(lXL(Me9eU8weAq86g#mi5 zX4_9oXd97TA84ouMY7H`Tat!pG~-Z;1=pQ51c z@rIL+d4EIs3(|yOCeD^wj#S{SyR;yLlA*q4t54U%LK`3T50e3{TIT5duJ5y#Pk!5{ za!GpPEWT~>yG^q46}nNN2imFCQe+=4{KnG0fh%u6ZiTo+pjz0&w`H_kr7FMc=Y-oN zW+>9T6$-iD1=X#Gb#&)|8u~6;CF#&1AhVt zzwy&~C-{!P5lFuSbs+r6?*qc+1fr7jt^0g5sBNE*c-4H6XrFIwC$Z0k9SS|TD6Yb8 zJkUN=jT73pTEyCy9C3Q}ZIz#K#7SnA-|L7^I^wj#WbOi|*>+jCV^~sX*Z6;3-7<~} O&T0Xi!SXe;73sf2kS*~5 diff --git a/rtl/obj_dir/Vvortex__ALLcls.cpp b/rtl/obj_dir/Vvortex__ALLcls.cpp index e5902852..8b97f5e6 100644 --- a/rtl/obj_dir/Vvortex__ALLcls.cpp +++ b/rtl/obj_dir/Vvortex__ALLcls.cpp @@ -1,3 +1,3 @@ // DESCRIPTION: Generated by verilator_includer via makefile #define VL_INCLUDE_OPT include -#include "Vvortex.cpp" +#include "VVortex.cpp" diff --git a/rtl/obj_dir/Vvortex__ALLcls.d b/rtl/obj_dir/Vvortex__ALLcls.d index 31e5a639..1e080335 100644 --- a/rtl/obj_dir/Vvortex__ALLcls.d +++ b/rtl/obj_dir/Vvortex__ALLcls.d @@ -1,5 +1,4 @@ -Vvortex__ALLcls.o: Vvortex__ALLcls.cpp Vvortex.cpp Vvortex.h \ - /usr/local/Cellar/verilator/4.010/share/verilator/include/verilated_heavy.h \ +VVortex__ALLcls.o: VVortex__ALLcls.cpp VVortex.cpp VVortex.h \ /usr/local/Cellar/verilator/4.010/share/verilator/include/verilated.h \ /usr/local/Cellar/verilator/4.010/share/verilator/include/verilatedos.h \ - Vvortex__Syms.h + VVortex__Syms.h diff --git a/rtl/obj_dir/Vvortex__ALLsup.cpp b/rtl/obj_dir/Vvortex__ALLsup.cpp index 0ec3080d..989c6da6 100644 --- a/rtl/obj_dir/Vvortex__ALLsup.cpp +++ b/rtl/obj_dir/Vvortex__ALLsup.cpp @@ -1,3 +1,3 @@ // DESCRIPTION: Generated by verilator_includer via makefile #define VL_INCLUDE_OPT include -#include "Vvortex__Syms.cpp" +#include "VVortex__Syms.cpp" diff --git a/rtl/obj_dir/Vvortex__ALLsup.d b/rtl/obj_dir/Vvortex__ALLsup.d index 4864e08b..41db4492 100644 --- a/rtl/obj_dir/Vvortex__ALLsup.d +++ b/rtl/obj_dir/Vvortex__ALLsup.d @@ -1,5 +1,4 @@ -Vvortex__ALLsup.o: Vvortex__ALLsup.cpp Vvortex__Syms.cpp Vvortex__Syms.h \ - /usr/local/Cellar/verilator/4.010/share/verilator/include/verilated_heavy.h \ +VVortex__ALLsup.o: VVortex__ALLsup.cpp VVortex__Syms.cpp VVortex__Syms.h \ /usr/local/Cellar/verilator/4.010/share/verilator/include/verilated.h \ /usr/local/Cellar/verilator/4.010/share/verilator/include/verilatedos.h \ - Vvortex.h + VVortex.h diff --git a/rtl/obj_dir/Vvortex__Syms.cpp b/rtl/obj_dir/Vvortex__Syms.cpp index 3d28ef93..d5a17e1a 100644 --- a/rtl/obj_dir/Vvortex__Syms.cpp +++ b/rtl/obj_dir/Vvortex__Syms.cpp @@ -1,11 +1,11 @@ // Verilated -*- C++ -*- // DESCRIPTION: Verilator output: Symbol table implementation internals -#include "Vvortex__Syms.h" -#include "Vvortex.h" +#include "VVortex__Syms.h" +#include "VVortex.h" // FUNCTIONS -Vvortex__Syms::Vvortex__Syms(Vvortex* topp, const char* namep) +VVortex__Syms::VVortex__Syms(VVortex* topp, const char* namep) // Setup locals : __Vm_namep(namep) , __Vm_didInit(false) diff --git a/rtl/obj_dir/Vvortex__Syms.h b/rtl/obj_dir/Vvortex__Syms.h index c1a5b28d..bf4ad048 100644 --- a/rtl/obj_dir/Vvortex__Syms.h +++ b/rtl/obj_dir/Vvortex__Syms.h @@ -3,16 +3,16 @@ // // Internal details; most calling programs do not need this header -#ifndef _Vvortex__Syms_H_ -#define _Vvortex__Syms_H_ +#ifndef _VVortex__Syms_H_ +#define _VVortex__Syms_H_ -#include "verilated_heavy.h" +#include "verilated.h" // INCLUDE MODULE CLASSES -#include "Vvortex.h" +#include "VVortex.h" // SYMS CLASS -class Vvortex__Syms : public VerilatedSyms { +class VVortex__Syms : public VerilatedSyms { public: // LOCAL STATE @@ -20,11 +20,11 @@ class Vvortex__Syms : public VerilatedSyms { bool __Vm_didInit; // SUBCELL STATE - Vvortex* TOPp; + VVortex* TOPp; // CREATORS - Vvortex__Syms(Vvortex* topp, const char* namep); - ~Vvortex__Syms() {} + VVortex__Syms(VVortex* topp, const char* namep); + ~VVortex__Syms() {} // METHODS inline const char* name() { return __Vm_namep; } diff --git a/rtl/obj_dir/Vvortex__ver.d b/rtl/obj_dir/Vvortex__ver.d index ac6d3fa0..79eb5494 100644 --- a/rtl/obj_dir/Vvortex__ver.d +++ b/rtl/obj_dir/Vvortex__ver.d @@ -1 +1 @@ -obj_dir/Vvortex.cpp obj_dir/Vvortex.h obj_dir/Vvortex.mk obj_dir/Vvortex__Syms.cpp obj_dir/Vvortex__Syms.h obj_dir/Vvortex__ver.d obj_dir/Vvortex_classes.mk : /usr/local/Cellar/verilator/4.010/bin/verilator_bin /usr/local/Cellar/verilator/4.010/bin/verilator_bin VX_f_d_reg.v VX_fetch.v vortex.v +obj_dir/VVortex.cpp obj_dir/VVortex.h obj_dir/VVortex.mk obj_dir/VVortex__Syms.cpp obj_dir/VVortex__Syms.h obj_dir/VVortex__ver.d obj_dir/VVortex_classes.mk : /usr/local/Cellar/verilator/4.010/bin/verilator_bin /usr/local/Cellar/verilator/4.010/bin/verilator_bin VX_csr_handler.v VX_d_e_reg.v VX_decode.v VX_define.v VX_e_m_reg.v VX_execute.v VX_f_d_reg.v VX_fetch.v VX_forwarding.v VX_m_w_reg.v VX_memory.v VX_register_file.v VX_writeback.v Vortex.v diff --git a/rtl/obj_dir/Vvortex__verFiles.dat b/rtl/obj_dir/Vvortex__verFiles.dat index e19d07f5..c23748c8 100644 --- a/rtl/obj_dir/Vvortex__verFiles.dat +++ b/rtl/obj_dir/Vvortex__verFiles.dat @@ -1,14 +1,25 @@ # DESCRIPTION: Verilator output: Timestamp data for --skip-identical. Delete at will. -C "-Wall -cc vortex.v VX_f_d_reg.v VX_fetch.v --exe test_bench.cpp" +C "-Wall -cc Vortex.v VX_fetch.v VX_f_d_reg.v VX_decode.v VX_register_file.v VX_d_e_reg.v VX_execute.v VX_e_m_reg.v VX_memory.v VX_m_w_reg.v VX_writeback.v VX_csr_handler.v VX_forwarding.v --exe test_bench.cpp" S 4608404 12889046060 1553037052 0 1548678579 0 "/usr/local/Cellar/verilator/4.010/bin/verilator_bin" -S 960 12889050060 1553112201 0 1553112201 0 "VX_f_d_reg.v" +S 1495 12889087229 1553211178 0 1553211178 0 "VX_csr_handler.v" +S 4626 12889079539 1553190875 0 1553190875 0 "VX_d_e_reg.v" +S 8412 12889063385 1553211412 0 1553211412 0 "VX_decode.v" +S 1351 12889079483 1553200040 0 1553200040 0 "VX_define.v" +S 3644 12889083963 1553196174 0 1553196174 0 "VX_e_m_reg.v" +S 4603 12889081819 1553208546 0 1553208546 0 "VX_execute.v" +S 969 12889050060 1553223828 0 1553223828 0 "VX_f_d_reg.v" S 3337 12889047675 1553112414 0 1553112414 0 "VX_fetch.v" -T 11853 12889064939 1553112478 0 1553112478 0 "obj_dir/Vvortex.cpp" -T 3513 12889064938 1553112478 0 1553112478 0 "obj_dir/Vvortex.h" -T 1800 12889064941 1553112478 0 1553112478 0 "obj_dir/Vvortex.mk" -T 530 12889064937 1553112478 0 1553112478 0 "obj_dir/Vvortex__Syms.cpp" -T 717 12889064936 1553112478 0 1553112478 0 "obj_dir/Vvortex__Syms.h" -T 300 12889064942 1553112478 0 1553112478 0 "obj_dir/Vvortex__ver.d" -T 0 0 1553112478 0 1553112478 0 "obj_dir/Vvortex__verFiles.dat" -T 1159 12889064940 1553112478 0 1553112478 0 "obj_dir/Vvortex_classes.mk" -S 1826 12889050092 1553109861 0 1553109861 0 "vortex.v" +S 4771 12889086478 1553200651 0 1553200651 0 "VX_forwarding.v" +S 1578 12889085814 1553211072 0 1553211072 0 "VX_m_w_reg.v" +S 2315 12889084513 1553197906 0 1553197906 0 "VX_memory.v" +S 726 12889070228 1553188094 0 1553188094 0 "VX_register_file.v" +S 597 12889086287 1553199222 0 1553199222 0 "VX_writeback.v" +S 12863 12889050092 1553211358 0 1553211358 0 "Vortex.v" +T 77457 12889096617 1553223839 0 1553223839 0 "obj_dir/VVortex.cpp" +T 7575 12889096616 1553223839 0 1553223839 0 "obj_dir/VVortex.h" +T 1800 12889096619 1553223839 0 1553223839 0 "obj_dir/VVortex.mk" +T 530 12889096615 1553223839 0 1553223839 0 "obj_dir/VVortex__Syms.cpp" +T 711 12889096614 1553223839 0 1553223839 0 "obj_dir/VVortex__Syms.h" +T 455 12889096620 1553223839 0 1553223839 0 "obj_dir/VVortex__ver.d" +T 0 0 1553223839 0 1553223839 0 "obj_dir/VVortex__verFiles.dat" +T 1159 12889096618 1553223839 0 1553223839 0 "obj_dir/VVortex_classes.mk" diff --git a/rtl/obj_dir/Vvortex_classes.mk b/rtl/obj_dir/Vvortex_classes.mk index a7635d5c..ebd3a07e 100644 --- a/rtl/obj_dir/Vvortex_classes.mk +++ b/rtl/obj_dir/Vvortex_classes.mk @@ -2,7 +2,7 @@ # DESCRIPTION: Verilator output: Make include file with class lists # # This file lists generated Verilated files, for including in higher level makefiles. -# See Vvortex.mk for the caller. +# See VVortex.mk for the caller. ### Switches... # Coverage output mode? 0/1 (from --coverage) @@ -15,7 +15,7 @@ VM_TRACE = 0 ### Object file lists... # Generated module classes, fast-path, compile with highest optimization VM_CLASSES_FAST += \ - Vvortex \ + VVortex \ # Generated module classes, non-fast-path, compile with low/medium optimization VM_CLASSES_SLOW += \ @@ -25,7 +25,7 @@ VM_SUPPORT_FAST += \ # Generated support classes, non-fast-path, compile with low/medium optimization VM_SUPPORT_SLOW += \ - Vvortex__Syms \ + VVortex__Syms \ # Global classes, need linked once per executable, fast-path, compile with highest optimization VM_GLOBAL_FAST += \ diff --git a/rtl/obj_dir/test_bench.d b/rtl/obj_dir/test_bench.d index 047c73b6..b918f78f 100644 --- a/rtl/obj_dir/test_bench.d +++ b/rtl/obj_dir/test_bench.d @@ -1,4 +1,4 @@ -test_bench.o: ../test_bench.cpp Vvortex.h \ - /usr/local/Cellar/verilator/4.010/share/verilator/include/verilated_heavy.h \ +test_bench.o: ../test_bench.cpp ../test_bench.h ../VX_define.h ../ram.h \ + VVortex.h \ /usr/local/Cellar/verilator/4.010/share/verilator/include/verilated.h \ /usr/local/Cellar/verilator/4.010/share/verilator/include/verilatedos.h diff --git a/rtl/ram.h b/rtl/ram.h new file mode 100644 index 00000000..d3a0bb30 --- /dev/null +++ b/rtl/ram.h @@ -0,0 +1,235 @@ + +#ifndef __RAM__ + +#define __RAM__ + +#include "string.h" + +class RAM{ +public: + uint8_t* mem[1 << 12]; + + RAM(){ + for(uint32_t i = 0;i < (1 << 12);i++) mem[i] = NULL; + } + ~RAM(){ + for(uint32_t i = 0;i < (1 << 12);i++) if(mem[i]) delete [] mem[i]; + } + + void clear(){ + for(uint32_t i = 0;i < (1 << 12);i++) + { + if(mem[i]) + { + delete mem[i]; + mem[i] = NULL; + } + } + } + + uint8_t* get(uint32_t address){ + + if(mem[address >> 20] == NULL) { + uint8_t* ptr = new uint8_t[1024*1024]; + for(uint32_t i = 0;i < 1024*1024;i+=4) { + ptr[i + 0] = 0xFF; + ptr[i + 1] = 0xFF; + ptr[i + 2] = 0xFF; + ptr[i + 3] = 0xFF; + } + mem[address >> 20] = ptr; + } + return &mem[address >> 20][address & 0xFFFFF]; + } + + void read(uint32_t address,uint32_t length, uint8_t *data){ + for(unsigned i = 0;i < length;i++){ + data[i] = (*this)[address + i]; + } + } + + void write(uint32_t address,uint32_t length, uint8_t *data){ + for(unsigned i = 0;i < length;i++){ + (*this)[address + i] = data[i]; + } + } + + void getBlock(uint32_t address, uint8_t *data) + { + uint32_t block_number = address & 0xffffff00; // To zero out block offset + uint32_t bytes_num = 256; + + this->read(block_number, bytes_num, data); + } + + void getWord(uint32_t address, uint32_t * data) + { + data[0] = 0; + + uint8_t first = *get(address + 0); + uint8_t second = *get(address + 1); + uint8_t third = *get(address + 2); + uint8_t fourth = *get(address + 3); + + // uint8_t hi = (uint8_t) *get(address + 0); + // std::cout << "RAM: READING ADDRESS " << address + 0 << " DATA: " << hi << "\n"; + // hi = (uint8_t) *get(address + 1); + // std::cout << "RAM: READING ADDRESS " << address + 1 << " DATA: " << hi << "\n"; + // hi = (uint8_t) *get(address + 2); + // std::cout << "RAM: READING ADDRESS " << address + 2 << " DATA: " << hi << "\n"; + // hi = (uint8_t) *get(address + 3); + // std::cout << "RAM: READING ADDRESS " << address + 3 << " DATA: " << hi << "\n"; + + data[0] = (data[0] << 0) | fourth; + data[0] = (data[0] << 8) | third; + data[0] = (data[0] << 8) | second; + data[0] = (data[0] << 8) | first; + + } + + void writeWord(uint32_t address, uint32_t * data) + { + uint32_t data_to_write = *data; + + uint32_t byte_mask = 0xFF; + + for (int i = 0; i < 4; i++) + { + // std::cout << "RAM: DATA TO WRITE " << data_to_write << "\n"; + // std::cout << "RAM: DATA TO MASK " << byte_mask << "\n"; + // std::cout << "RAM: WRITING ADDRESS " << address + i << " DATA: " << (data_to_write & byte_mask) << "\n"; + (*this)[address + i] = data_to_write & byte_mask; + data_to_write = data_to_write >> 8; + } + } + + void writeHalf(uint32_t address, uint32_t * data) + { + uint32_t data_to_write = *data; + + uint32_t byte_mask = 0xFF; + + for (int i = 0; i < 2; i++) + { + // std::cout << "RAM: DATA TO WRITE " << data_to_write << "\n"; + // std::cout << "RAM: DATA TO MASK " << byte_mask << "\n"; + // std::cout << "RAM: WRITING ADDRESS " << address + i << " DATA: " << (data_to_write & byte_mask) << "\n"; + (*this)[address + i] = data_to_write & byte_mask; + data_to_write = data_to_write >> 8; + } + } + + void writeByte(uint32_t address, uint32_t * data) + { + uint32_t data_to_write = *data; + + uint32_t byte_mask = 0xFF; + + (*this)[address] = data_to_write & byte_mask; + data_to_write = data_to_write >> 8; + + } + + uint8_t& operator [](uint32_t address) { + return *get(address); + } + +}; + + +// MEMORY UTILS + +uint32_t hti(char c) { + if (c >= 'A' && c <= 'F') + return c - 'A' + 10; + if (c >= 'a' && c <= 'f') + return c - 'a' + 10; + return c - '0'; +} + +uint32_t hToI(char *c, uint32_t size) { + uint32_t value = 0; + for (uint32_t i = 0; i < size; i++) { + value += hti(c[i]) << ((size - i - 1) * 4); + } + return value; +} + + + +void loadHexImpl(std::string path,RAM* mem) { + mem->clear(); + FILE *fp = fopen(&path[0], "r"); + if(fp == 0){ + std::cout << path << " not found" << std::endl; + } + //Preload 0x0 <-> 0x80000000 jumps + ((uint32_t*)mem->get(0))[1] = 0xf1401073; + + // ((uint32_t*)mem->get(0))[1] = 0xf1401073; + ((uint32_t*)mem->get(0))[2] = 0x30101073; + + ((uint32_t*)mem->get(0))[3] = 0x800000b7; + ((uint32_t*)mem->get(0))[4] = 0x000080e7; + + ((uint32_t*)mem->get(0x80000000))[0] = 0x00000097; + + ((uint32_t*)mem->get(0xb0000000))[0] = 0x01C02023; + // F00FFF10 + ((uint32_t*)mem->get(0xf00fff10))[0] = 0x12345678; + + + + + fseek(fp, 0, SEEK_END); + uint32_t size = ftell(fp); + fseek(fp, 0, SEEK_SET); + char* content = new char[size]; + fread(content, 1, size, fp); + + int offset = 0; + char* line = content; + // std::cout << "WHTA\n"; + while (1) { + if (line[0] == ':') { + uint32_t byteCount = hToI(line + 1, 2); + uint32_t nextAddr = hToI(line + 3, 4) + offset; + uint32_t key = hToI(line + 7, 2); + switch (key) { + case 0: + for (uint32_t i = 0; i < byteCount; i++) { + + unsigned add = nextAddr + i; + + *(mem->get(add)) = hToI(line + 9 + i * 2, 2); + // std::cout << "Address: " << std::hex <<(add) << "\tValue: " << std::hex << hToI(line + 9 + i * 2, 2) << std::endl; + } + break; + case 2: +// cout << offset << endl; + offset = hToI(line + 9, 4) << 4; + break; + case 4: +// cout << offset << endl; + offset = hToI(line + 9, 4) << 16; + break; + default: +// cout << "??? " << key << endl; + break; + } + } + + while (*line != '\n' && size != 0) { + line++; + size--; + } + if (size <= 1) + break; + line++; + size--; + } + + if (content) delete[] content; +} + +#endif \ No newline at end of file diff --git a/rtl/results.txt b/rtl/results.txt new file mode 100644 index 00000000..64c0be96 --- /dev/null +++ b/rtl/results.txt @@ -0,0 +1,351 @@ + +**************** ../../src/riscv_tests/rv32ui-p-add.hex **************** +# Dynamic Instructions: 597 +# of total cycles: 608 +# of forwarding stalls: 0 +# of branch stalls: 0 +# CPI: 1.01843 +# time to simulate: 6.95312e-310 milliseconds +# GRADE: PASSING + +**************** ../../src/riscv_tests/rv32ui-p-addi.hex **************** +# Dynamic Instructions: 312 +# of total cycles: 323 +# of forwarding stalls: 0 +# of branch stalls: 0 +# CPI: 1.03526 +# time to simulate: 6.95312e-310 milliseconds +# GRADE: PASSING + +**************** ../../src/riscv_tests/rv32ui-p-and.hex **************** +# Dynamic Instructions: 595 +# of total cycles: 606 +# of forwarding stalls: 0 +# of branch stalls: 0 +# CPI: 1.01849 +# time to simulate: 6.95312e-310 milliseconds +# GRADE: PASSING + +**************** ../../src/riscv_tests/rv32ui-p-andi.hex **************** +# Dynamic Instructions: 246 +# of total cycles: 257 +# of forwarding stalls: 0 +# of branch stalls: 0 +# CPI: 1.04472 +# time to simulate: 6.95312e-310 milliseconds +# GRADE: PASSING + +**************** ../../src/riscv_tests/rv32ui-p-auipc.hex **************** +# Dynamic Instructions: 65 +# of total cycles: 76 +# of forwarding stalls: 0 +# of branch stalls: 0 +# CPI: 1.16923 +# time to simulate: 6.95312e-310 milliseconds +# GRADE: PASSING + +**************** ../../src/riscv_tests/rv32ui-p-beq.hex **************** +# Dynamic Instructions: 431 +# of total cycles: 442 +# of forwarding stalls: 0 +# of branch stalls: 0 +# CPI: 1.02552 +# time to simulate: 6.95312e-310 milliseconds +# GRADE: PASSING + +**************** ../../src/riscv_tests/rv32ui-p-bge.hex **************** +# Dynamic Instructions: 467 +# of total cycles: 478 +# of forwarding stalls: 0 +# of branch stalls: 0 +# CPI: 1.02355 +# time to simulate: 6.95312e-310 milliseconds +# GRADE: PASSING + +**************** ../../src/riscv_tests/rv32ui-p-bgeu.hex **************** +# Dynamic Instructions: 492 +# of total cycles: 503 +# of forwarding stalls: 0 +# of branch stalls: 0 +# CPI: 1.02236 +# time to simulate: 6.95312e-310 milliseconds +# GRADE: PASSING + +**************** ../../src/riscv_tests/rv32ui-p-blt.hex **************** +# Dynamic Instructions: 431 +# of total cycles: 442 +# of forwarding stalls: 0 +# of branch stalls: 0 +# CPI: 1.02552 +# time to simulate: 6.95312e-310 milliseconds +# GRADE: PASSING + +**************** ../../src/riscv_tests/rv32ui-p-bltu.hex **************** +# Dynamic Instructions: 456 +# of total cycles: 467 +# of forwarding stalls: 0 +# of branch stalls: 0 +# CPI: 1.02412 +# time to simulate: 6.95312e-310 milliseconds +# GRADE: PASSING + +**************** ../../src/riscv_tests/rv32ui-p-bne.hex **************** +# Dynamic Instructions: 431 +# of total cycles: 442 +# of forwarding stalls: 0 +# of branch stalls: 0 +# CPI: 1.02552 +# time to simulate: 6.95312e-310 milliseconds +# GRADE: PASSING + +**************** ../../src/riscv_tests/rv32ui-p-jal.hex **************** +# Dynamic Instructions: 61 +# of total cycles: 72 +# of forwarding stalls: 0 +# of branch stalls: 0 +# CPI: 1.18033 +# time to simulate: 6.95312e-310 milliseconds +# GRADE: PASSING + +**************** ../../src/riscv_tests/rv32ui-p-jalr.hex **************** +# Dynamic Instructions: 138 +# of total cycles: 149 +# of forwarding stalls: 0 +# of branch stalls: 0 +# CPI: 1.07971 +# time to simulate: 6.95312e-310 milliseconds +# GRADE: PASSING + +**************** ../../src/riscv_tests/rv32ui-p-lb.hex **************** +# Dynamic Instructions: 135 +# of total cycles: 145 +# of forwarding stalls: 0 +# of branch stalls: 0 +# CPI: 1.07407 +# time to simulate: 6.95312e-310 milliseconds +# GRADE: Failed on test: 25 + +**************** ../../src/riscv_tests/rv32ui-p-lbu.hex **************** +# Dynamic Instructions: 135 +# of total cycles: 145 +# of forwarding stalls: 0 +# of branch stalls: 0 +# CPI: 1.07407 +# time to simulate: 6.95312e-310 milliseconds +# GRADE: Failed on test: 25 + +**************** ../../src/riscv_tests/rv32ui-p-lh.hex **************** +# Dynamic Instructions: 140 +# of total cycles: 150 +# of forwarding stalls: 0 +# of branch stalls: 0 +# CPI: 1.07143 +# time to simulate: 6.95312e-310 milliseconds +# GRADE: Failed on test: 25 + +**************** ../../src/riscv_tests/rv32ui-p-lhu.hex **************** +# Dynamic Instructions: 143 +# of total cycles: 153 +# of forwarding stalls: 0 +# of branch stalls: 0 +# CPI: 1.06993 +# time to simulate: 6.95312e-310 milliseconds +# GRADE: Failed on test: 25 + +**************** ../../src/riscv_tests/rv32ui-p-lui.hex **************** +# Dynamic Instructions: 55 +# of total cycles: 65 +# of forwarding stalls: 0 +# of branch stalls: 0 +# CPI: 1.18182 +# time to simulate: 6.95312e-310 milliseconds +# GRADE: Failed on test: 7 + +**************** ../../src/riscv_tests/rv32ui-p-lui.hex.hex **************** +# Dynamic Instructions: 55 +# of total cycles: 65 +# of forwarding stalls: 0 +# of branch stalls: 0 +# CPI: 1.18182 +# time to simulate: 6.95312e-310 milliseconds +# GRADE: Failed on test: 7 + +**************** ../../src/riscv_tests/rv32ui-p-lw.hex **************** +# Dynamic Instructions: 146 +# of total cycles: 156 +# of forwarding stalls: 0 +# of branch stalls: 0 +# CPI: 1.06849 +# time to simulate: 6.95312e-310 milliseconds +# GRADE: Failed on test: 25 + +**************** ../../src/riscv_tests/rv32ui-p-or.hex **************** +# Dynamic Instructions: 598 +# of total cycles: 609 +# of forwarding stalls: 0 +# of branch stalls: 0 +# CPI: 1.01839 +# time to simulate: 6.95312e-310 milliseconds +# GRADE: PASSING + +**************** ../../src/riscv_tests/rv32ui-p-ori.hex **************** +# Dynamic Instructions: 253 +# of total cycles: 264 +# of forwarding stalls: 0 +# of branch stalls: 0 +# CPI: 1.04348 +# time to simulate: 6.95312e-310 milliseconds +# GRADE: PASSING + +**************** ../../src/riscv_tests/rv32ui-p-sb.hex **************** +# Dynamic Instructions: 161 +# of total cycles: 171 +# of forwarding stalls: 0 +# of branch stalls: 0 +# CPI: 1.06211 +# time to simulate: 6.95312e-310 milliseconds +# GRADE: Failed on test: 25 + +**************** ../../src/riscv_tests/rv32ui-p-sh.hex **************** +# Dynamic Instructions: 502 +# of total cycles: 512 +# of forwarding stalls: 0 +# of branch stalls: 0 +# CPI: 1.01992 +# time to simulate: 6.95312e-310 milliseconds +# GRADE: Failed on test: 43 + +**************** ../../src/riscv_tests/rv32ui-p-simple.hex **************** +# Dynamic Instructions: 37 +# of total cycles: 48 +# of forwarding stalls: 0 +# of branch stalls: 0 +# CPI: 1.2973 +# time to simulate: 6.95312e-310 milliseconds +# GRADE: PASSING + +**************** ../../src/riscv_tests/rv32ui-p-sll.hex **************** +# Dynamic Instructions: 180 +# of total cycles: 190 +# of forwarding stalls: 0 +# of branch stalls: 0 +# CPI: 1.05556 +# time to simulate: 6.95312e-310 milliseconds +# GRADE: Failed on test: 35 + +**************** ../../src/riscv_tests/rv32ui-p-slli.hex **************** +# Dynamic Instructions: 311 +# of total cycles: 322 +# of forwarding stalls: 0 +# of branch stalls: 0 +# CPI: 1.03537 +# time to simulate: 6.95312e-310 milliseconds +# GRADE: PASSING + +**************** ../../src/riscv_tests/rv32ui-p-slt.hex **************** +# Dynamic Instructions: 591 +# of total cycles: 602 +# of forwarding stalls: 0 +# of branch stalls: 0 +# CPI: 1.01861 +# time to simulate: 6.95312e-310 milliseconds +# GRADE: PASSING + +**************** ../../src/riscv_tests/rv32ui-p-slti.hex **************** +# Dynamic Instructions: 307 +# of total cycles: 318 +# of forwarding stalls: 0 +# of branch stalls: 0 +# CPI: 1.03583 +# time to simulate: 6.95312e-310 milliseconds +# GRADE: PASSING + +**************** ../../src/riscv_tests/rv32ui-p-sltiu.hex **************** +# Dynamic Instructions: 307 +# of total cycles: 318 +# of forwarding stalls: 0 +# of branch stalls: 0 +# CPI: 1.03583 +# time to simulate: 6.95312e-310 milliseconds +# GRADE: PASSING + +**************** ../../src/riscv_tests/rv32ui-p-sltu.hex **************** +# Dynamic Instructions: 591 +# of total cycles: 602 +# of forwarding stalls: 0 +# of branch stalls: 0 +# CPI: 1.01861 +# time to simulate: 6.95312e-310 milliseconds +# GRADE: PASSING + +**************** ../../src/riscv_tests/rv32ui-p-sra.hex **************** +# Dynamic Instructions: 58 +# of total cycles: 68 +# of forwarding stalls: 0 +# of branch stalls: 0 +# CPI: 1.17241 +# time to simulate: 6.95312e-310 milliseconds +# GRADE: Failed on test: 7 + +**************** ../../src/riscv_tests/rv32ui-p-srai.hex **************** +# Dynamic Instructions: 56 +# of total cycles: 66 +# of forwarding stalls: 0 +# of branch stalls: 0 +# CPI: 1.17857 +# time to simulate: 6.95312e-310 milliseconds +# GRADE: Failed on test: 7 + +**************** ../../src/riscv_tests/rv32ui-p-srl.hex **************** +# Dynamic Instructions: 185 +# of total cycles: 195 +# of forwarding stalls: 0 +# of branch stalls: 0 +# CPI: 1.05405 +# time to simulate: 6.95312e-310 milliseconds +# GRADE: Failed on test: 35 + +**************** ../../src/riscv_tests/rv32ui-p-srli.hex **************** +# Dynamic Instructions: 320 +# of total cycles: 331 +# of forwarding stalls: 0 +# of branch stalls: 0 +# CPI: 1.03438 +# time to simulate: 6.95312e-310 milliseconds +# GRADE: PASSING + +**************** ../../src/riscv_tests/rv32ui-p-sub.hex **************** +# Dynamic Instructions: 587 +# of total cycles: 598 +# of forwarding stalls: 0 +# of branch stalls: 0 +# CPI: 1.01874 +# time to simulate: 6.95312e-310 milliseconds +# GRADE: PASSING + +**************** ../../src/riscv_tests/rv32ui-p-sw.hex **************** +# Dynamic Instructions: 152 +# of total cycles: 162 +# of forwarding stalls: 0 +# of branch stalls: 0 +# CPI: 1.06579 +# time to simulate: 6.95312e-310 milliseconds +# GRADE: Failed on test: 21 + +**************** ../../src/riscv_tests/rv32ui-p-xor.hex **************** +# Dynamic Instructions: 597 +# of total cycles: 608 +# of forwarding stalls: 0 +# of branch stalls: 0 +# CPI: 1.01843 +# time to simulate: 6.95312e-310 milliseconds +# GRADE: PASSING + +**************** ../../src/riscv_tests/rv32ui-p-xori.hex **************** +# Dynamic Instructions: 255 +# of total cycles: 266 +# of forwarding stalls: 0 +# of branch stalls: 0 +# CPI: 1.04314 +# time to simulate: 6.95312e-310 milliseconds +# GRADE: PASSING diff --git a/rtl/test_bench.cpp b/rtl/test_bench.cpp index 2875cf99..f47d01ff 100644 --- a/rtl/test_bench.cpp +++ b/rtl/test_bench.cpp @@ -1,38 +1,77 @@ -#include "Vvortex.h" -#include "verilated.h" -#include -unsigned inst_array[10] = {10, 11, 12, 13, 14, 15, 16, 17, 18, 19}; +#include "test_bench.h" + +#define NUM_TESTS 39 int main(int argc, char **argv) { + Verilated::commandArgs(argc, argv); - Vvortex * vortex = new Vvortex; - vortex->clk = 0; - vortex->reset = 1; - vortex->eval(); + Vortex v; - vortex->reset = 0; + bool passed = true; + std::string tests[NUM_TESTS] = { + "../../src/riscv_tests/rv32ui-p-add.hex", + "../../src/riscv_tests/rv32ui-p-addi.hex", + "../../src/riscv_tests/rv32ui-p-and.hex", + "../../src/riscv_tests/rv32ui-p-andi.hex", + "../../src/riscv_tests/rv32ui-p-auipc.hex", + "../../src/riscv_tests/rv32ui-p-beq.hex", + "../../src/riscv_tests/rv32ui-p-bge.hex", + "../../src/riscv_tests/rv32ui-p-bgeu.hex", + "../../src/riscv_tests/rv32ui-p-blt.hex", + "../../src/riscv_tests/rv32ui-p-bltu.hex", + "../../src/riscv_tests/rv32ui-p-bne.hex", + "../../src/riscv_tests/rv32ui-p-jal.hex", + "../../src/riscv_tests/rv32ui-p-jalr.hex", + "../../src/riscv_tests/rv32ui-p-lb.hex", + "../../src/riscv_tests/rv32ui-p-lbu.hex", + "../../src/riscv_tests/rv32ui-p-lh.hex", + "../../src/riscv_tests/rv32ui-p-lhu.hex", + "../../src/riscv_tests/rv32ui-p-lui.hex", + "../../src/riscv_tests/rv32ui-p-lui.hex.hex", + "../../src/riscv_tests/rv32ui-p-lw.hex", + "../../src/riscv_tests/rv32ui-p-or.hex", + "../../src/riscv_tests/rv32ui-p-ori.hex", + "../../src/riscv_tests/rv32ui-p-sb.hex", + "../../src/riscv_tests/rv32ui-p-sh.hex", + "../../src/riscv_tests/rv32ui-p-simple.hex", + "../../src/riscv_tests/rv32ui-p-sll.hex", + "../../src/riscv_tests/rv32ui-p-slli.hex", + "../../src/riscv_tests/rv32ui-p-slt.hex", + "../../src/riscv_tests/rv32ui-p-slti.hex", + "../../src/riscv_tests/rv32ui-p-sltiu.hex", + "../../src/riscv_tests/rv32ui-p-sltu.hex", + "../../src/riscv_tests/rv32ui-p-sra.hex", + "../../src/riscv_tests/rv32ui-p-srai.hex", + "../../src/riscv_tests/rv32ui-p-srl.hex", + "../../src/riscv_tests/rv32ui-p-srli.hex", + "../../src/riscv_tests/rv32ui-p-sub.hex", + "../../src/riscv_tests/rv32ui-p-sw.hex", + "../../src/riscv_tests/rv32ui-p-xor.hex", + "../../src/riscv_tests/rv32ui-p-xori.hex", + }; - for (int i = 0; i < 10; i++) - { + for (int ii = 0; ii < NUM_TESTS; ii++) + // for (int ii = 0; ii < NUM_TESTS - 1; ii++) + { + bool curr = v.simulate(tests[ii]); - vortex->fe_instruction = inst_array[(vortex->curr_PC) / 4]; + if ( curr) std::cout << GREEN << "Test Passed: " << tests[ii] << std::endl; + if (!curr) std::cout << RED << "Test Failed: " << tests[ii] << std::endl; + passed = passed && curr; - vortex->clk = 1; - vortex->eval(); + std::cout << DEFAULT; + } - vortex->clk = 0; - vortex->eval(); + if( passed) std::cout << DEFAULT << "PASSED ALL TESTS\n"; + if(!passed) std::cout << DEFAULT << "Failed one or more tests\n"; - - } - - - delete vortex; + + // v.simulate("../../src/riscv_tests/rv32ui-p-add.hex"); return 0; diff --git a/rtl/test_bench.h b/rtl/test_bench.h new file mode 100644 index 00000000..c6595c2b --- /dev/null +++ b/rtl/test_bench.h @@ -0,0 +1,314 @@ + + +// C++ libraries +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "VX_define.h" +#include "ram.h" +#include "VVortex.h" +#include "verilated.h" + + + +class Vortex +{ + public: + Vortex(); + ~Vortex(); + bool simulate(std::string); + private: + void ProcessFile(void); + void print_stats(bool = true); + bool ibus_driver(); + bool dbus_driver(); + + RAM ram; + + VVortex * vortex; + + unsigned start_pc; + long int curr_cycle; + bool stop; + bool unit_test; + std::string instruction_file_name; + std::ofstream results; + int stats_static_inst; + int stats_dynamic_inst; + int stats_total_cycles; + int stats_fwd_stalls; + int stats_branch_stalls; + int debug_state; + int ibus_state; + int dbus_state; + int debug_return; + int debug_wait_num; + int debug_inst_num; + int debug_end_wait; + int debug_debugAddr; + double stats_sim_time; +}; + + + +Vortex::Vortex() : start_pc(0), curr_cycle(0), stop(true), unit_test(true), stats_static_inst(0), stats_dynamic_inst(-1), + stats_total_cycles(0), stats_fwd_stalls(0), stats_branch_stalls(0), + debug_state(0), ibus_state(0), dbus_state(0), debug_return(0), + debug_wait_num(0), debug_inst_num(0), debug_end_wait(0), debug_debugAddr(0) +{ + this->vortex = new VVortex; + this->results.open("../results.txt"); +} + +Vortex::~Vortex() +{ + this->results.close(); + delete this->vortex; +} + + +void Vortex::ProcessFile(void) +{ + loadHexImpl(this->instruction_file_name, &this->ram); +} + + +bool Vortex::ibus_driver() +{ + + ////////////////////// IBUS ////////////////////// + unsigned new_PC; + bool stop = false; + uint32_t curr_inst = 0; + + curr_inst = 0xdeadbeef; + + new_PC = vortex->curr_PC; + ram.getWord(new_PC, &curr_inst); + vortex->fe_instruction = curr_inst; + + ////////////////////// IBUS ////////////////////// + + + ////////////////////// STATS ////////////////////// + ++stats_total_cycles; + + + if (((((unsigned int)curr_inst) != 0) && (((unsigned int)curr_inst) != 0xffffffff)) || (this->ibus_state == 1) || (this->dbus_state == 1)) + { + ++stats_dynamic_inst; + stop = false; + } else + { + stop = true; + } + + return stop; + +} + + + +bool Vortex::dbus_driver() +{ + uint32_t data_read; + uint32_t data_write; + uint32_t addr; + // std::cout << "DBUS DRIVER\n" << std::endl; + ////////////////////// DBUS ////////////////////// + + + if (vortex->out_cache_driver_in_mem_write != NO_MEM_WRITE) + { + data_write = (uint32_t) vortex->out_cache_driver_in_data; + addr = (uint32_t) vortex->out_cache_driver_in_address; + + if (vortex->out_cache_driver_in_mem_write == SB_MEM_WRITE) + { + data_write = ( data_write) & 0xFF; + ram.writeByte( addr, &data_write); + + } else if (vortex->out_cache_driver_in_mem_write == SH_MEM_WRITE) + { + data_write = ( data_write) & 0xFFFF; + ram.writeHalf( addr, &data_write); + } else if (vortex->out_cache_driver_in_mem_write == SW_MEM_WRITE) + { + data_write = data_write; + ram.writeWord( addr, &data_write); + } + + } + + if (vortex->out_cache_driver_in_mem_read != NO_MEM_READ) + { + + addr = (uint32_t) vortex->out_cache_driver_in_address; + ram.getWord(addr, &data_read); + + if (vortex->out_cache_driver_in_mem_read == LB_MEM_READ) + { + + vortex->in_cache_driver_out_data = (data_read & 0x80) ? (data_read | 0xFFFFFF00) : (data_read & 0xFF); + + } else if (vortex->out_cache_driver_in_mem_read == LH_MEM_READ) + { + + vortex->in_cache_driver_out_data = (data_read & 0x8000) ? (data_read | 0xFFFF0000) : (data_read & 0xFFFF); + + } else if (vortex->out_cache_driver_in_mem_read == LW_MEM_READ) + { + + vortex->in_cache_driver_out_data = data_read; + + } else if (vortex->out_cache_driver_in_mem_read == LBU_MEM_READ) + { + + vortex->in_cache_driver_out_data = (data_read & 0xFF); + + } else if (vortex->out_cache_driver_in_mem_read == LHU_MEM_READ) + { + + vortex->in_cache_driver_out_data = (data_read & 0xFFFF); + + } + else + { + vortex->in_cache_driver_out_data = 0xbabebabe; + } + } + else + { + vortex->in_cache_driver_out_data = 0xbabebabe; + } + + return false; +} + + + +bool Vortex::simulate(std::string file_to_simulate) +{ + + this->instruction_file_name = file_to_simulate; + this->results << "\n****************\t" << file_to_simulate << "\t****************\n"; + + this->ProcessFile(); + + // auto start_time = std::chrono::high_resolution_clock::now(); + + + static bool stop = false; + static int counter = 0; + counter = 0; + stop = false; + + // auto start_time = clock(); + + + vortex->clk = 0; + vortex->reset = 1; + vortex->eval(); + + vortex->reset = 0; + + unsigned curr_inst; + unsigned new_PC; + while (this->stop && (!(stop && (counter > 5)))) + { + + bool istop = ibus_driver(); + bool dstop = !dbus_driver(); + stop = istop && dstop; + + vortex->clk = 1; + vortex->eval(); + + vortex->clk = 0; + vortex->eval(); + + if (stop) + { + counter++; + } else + { + counter = 0; + } + + } + + uint32_t status; + ram.getWord(0, &status); + + this->print_stats(); + + + + return (status == 1); +} + + +void Vortex::print_stats(bool cycle_test) +{ + + if (cycle_test) + { + this->results << std::left; + // this->results << "# Static Instructions:\t" << std::dec << this->stats_static_inst << std::endl; + this->results << std::setw(24) << "# Dynamic Instructions:" << std::dec << this->stats_dynamic_inst << std::endl; + this->results << std::setw(24) << "# of total cycles:" << std::dec << this->stats_total_cycles << std::endl; + this->results << std::setw(24) << "# of forwarding stalls:" << std::dec << this->stats_fwd_stalls << std::endl; + this->results << std::setw(24) << "# of branch stalls:" << std::dec << this->stats_branch_stalls << std::endl; + this->results << std::setw(24) << "# CPI:" << std::dec << (double) this->stats_total_cycles / (double) this->stats_dynamic_inst << std::endl; + this->results << std::setw(24) << "# time to simulate: " << std::dec << this->stats_sim_time << " milliseconds" << std::endl; + } + else + { + this->results << std::left; + this->results << std::setw(24) << "# of total cycles:" << std::dec << this->stats_total_cycles << std::endl; + this->results << std::setw(24) << "# time to simulate: " << std::dec << this->stats_sim_time << " milliseconds" << std::endl; + } + + + uint32_t status; + ram.getWord(0, &status); + + if (this->unit_test) + { + if (status == 1) + { + this->results << std::setw(24) << "# GRADE:" << "PASSING\n"; + } else + { + this->results << std::setw(24) << "# GRADE:" << "Failed on test: " << status << "\n"; + } + } + else + { + this->results << std::setw(24) << "# GRADE:" << "N/A [NOT A UNIT TEST]\n"; + } + + this->stats_static_inst = 0; + this->stats_dynamic_inst = -1; + this->stats_total_cycles = 0; + this->stats_fwd_stalls = 0; + this->stats_branch_stalls = 0; + +} + + + + + + + + + diff --git a/rtl/vortex.v b/rtl/vortex.v index 2d3fd6c3..75996f0b 100644 --- a/rtl/vortex.v +++ b/rtl/vortex.v @@ -1,89 +1,512 @@ -// `include "vx_fetch.v" -// `include "vx_f_d_reg.v" -module vortex( + +module Vortex( input wire clk, input wire reset, input wire[31:0] fe_instruction, + input wire[31:0] in_cache_driver_out_data, output wire[31:0] curr_PC, - output wire[31:0] de_instruction, - output wire fe_delay + output wire[31:0] out_cache_driver_in_address, + output wire[2:0] out_cache_driver_in_mem_read, + output wire[2:0] out_cache_driver_in_mem_write, + output wire[31:0] out_cache_driver_in_data ); -wire branch_dir; -assign branch_dir = 0; -wire freeze; -assign freeze = 0; +assign curr_PC = fetch_curr_PC; -wire[31:0] branch_dest; -wire branch_stall; -wire fwd_stall; -wire branch_stall_exe; -wire jal; -wire[31:0] jal_dest; -wire interrupt; -wire debug; +// From fetch +wire[31:0] fetch_instruction; +wire fetch_delay; +wire[31:0] fetch_curr_PC; +wire fetch_valid; -assign branch_dest = 32'h0; -assign branch_stall = 1'b0; -assign fwd_stall = 1'b0; -assign branch_stall_exe = 1'b0; -assign jal = 1'b0; -assign jal_dest = 32'h0; -assign interrupt = 1'b0; -assign debug = 1'b0; +// From f_d_register +wire[31:0] f_d_instruction; +wire[31:0] f_d_curr_PC; +wire f_d_valid; + +// From decode +wire decode_branch_stall; +wire[11:0] decode_csr_address; +wire decode_is_csr; +wire[31:0] decode_csr_mask; +wire[4:0] decode_rd; +wire[4:0] decode_rs1; +wire[31:0] decode_rd1; +wire[4:0] decode_rs2; +wire[31:0] decode_rd2; +wire[1:0] decode_wb; +wire[3:0] decode_alu_op; +wire decode_rs2_src; +reg[31:0] decode_itype_immed; +wire[2:0] decode_mem_read; +wire[2:0] decode_mem_write; +reg[2:0] decode_branch_type; +reg decode_jal; +reg[31:0] decode_jal_offset; +reg[19:0] decode_upper_immed; +wire[31:0] decode_PC_next; +wire decode_valid; + +// From d_e_register +wire[11:0] d_e_csr_address; +wire d_e_is_csr; +wire[31:0] d_e_csr_mask; +wire[4:0] d_e_rd; +wire[4:0] d_e_rs1; +wire[31:0] d_e_rd1; +wire[4:0] d_e_rs2; +wire[31:0] d_e_rd2; +wire[3:0] d_e_alu_op; +wire[1:0] d_e_wb; +wire d_e_rs2_src; +wire[31:0] d_e_itype_immed; +wire[2:0] d_e_mem_read; +wire[2:0] d_e_mem_write; +wire[2:0] d_e_branch_type; +wire[19:0] d_e_upper_immed; +wire[31:0] d_e_curr_PC; +wire d_e_jal; +wire[31:0] d_e_jal_offset; +wire[31:0] d_e_PC_next; +wire d_e_valid; -wire[31:0] f_instruction; -wire f_delay; /* verilator lint_off UNUSED */ -wire[31:0] f_curr_pc; -wire f_valid; - -assign curr_PC = f_curr_pc; -assign fe_delay = f_delay; - -VX_fetch vx_fetch ( - .clk(clk), - .reset(reset), - .in_branch_dir(branch_dir), - .in_freeze(freeze), - .in_branch_dest(branch_dest), - .in_branch_stall(branch_stall), - .in_fwd_stall(fwd_stall), - .in_branch_stall_exe(branch_stall_exe), - .in_jal(jal), - .in_jal_dest(jal_dest), - .in_interrupt(interrupt), - .in_debug(debug), - .in_instruction(fe_instruction), - - .out_instruction(f_instruction), - .out_delay(f_delay), - .out_curr_PC(f_curr_pc), - .out_valid(f_valid) -); +// From execute +wire execute_branch_stall; +wire[11:0] execute_csr_address; +wire execute_is_csr; +reg[31:0] execute_csr_result; +reg[31:0] execute_alu_result; +wire[4:0] execute_rd; +wire[1:0] execute_wb; +wire[4:0] execute_rs1; +wire[31:0] execute_rd1; +wire[4:0] execute_rs2; +wire[31:0] execute_rd2; +wire[2:0] execute_mem_read; +wire[2:0] execute_mem_write; +wire execute_jal; +wire[31:0] execute_jal_dest; +wire[31:0] execute_branch_offset; +wire[31:0] execute_PC_next; +wire execute_valid; -wire[31:0] d_curr_pc; -wire[31:0] d_instruction; -wire d_valid; +// From e_m_register +wire e_m_jal; +wire[31:0] e_m_jal_dest; +wire[11:0] e_m_csr_address; +wire e_m_is_csr; +wire[31:0] e_m_csr_result; +wire[31:0] e_m_alu_result; +wire[4:0] e_m_rd; +wire[1:0] e_m_wb; +wire[4:0] e_m_rs1; +/* verilator lint_off UNUSED */ +wire[31:0] e_m_rd1; +/* verilator lint_on UNUSED */ +wire[31:0] e_m_rd2; +wire[4:0] e_m_rs2; +wire[2:0] e_m_mem_read; +wire[2:0] e_m_mem_write; +wire[31:0] e_m_curr_PC; +wire[31:0] e_m_branch_offset; +wire[2:0] e_m_branch_type; +wire[31:0] e_m_PC_next; +wire e_m_valid; -VX_f_d_reg vx_f_d_reg ( - .clk(clk), - .reset(reset), - .in_instruction(f_instruction), - .in_valid(f_valid), - .in_curr_PC(f_curr_pc), - .in_fwd_stall(fwd_stall), - .in_freeze(freeze), - .out_instruction(d_instruction), - .out_curr_PC(d_curr_pc), - .out_valid(d_valid) + +// From memory +wire memory_delay; +wire memory_branch_dir; +wire[31:0] memory_branch_dest; +wire[31:0] memory_alu_result; +wire[31:0] memory_mem_result; +wire[4:0] memory_rd; +wire[1:0] memory_wb; +wire[4:0] memory_rs1; +wire[4:0] memory_rs2; +wire[31:0] memory_PC_next; +wire memory_valid; + +// From m_w_register +wire[31:0] m_w_alu_result; +wire[31:0] m_w_mem_result; +wire[4:0] m_w_rd; +wire[1:0] m_w_wb; +/* verilator lint_off UNUSED */ +wire[4:0] m_w_rs1; +wire[4:0] m_w_rs2; +/* verilator lint_on UNUSED */ +wire[31:0] m_w_PC_next; +wire m_w_valid; + +// From writeback +wire[31:0] writeback_write_data; +wire[4:0] writeback_rd; +wire[1:0] writeback_wb; + +// From csr handler +wire[31:0] csr_decode_csr_data; + + +// From forwarding +wire forwarding_fwd_stall; +wire forwarding_src1_fwd; +wire forwarding_src2_fwd; +/* verilator lint_off UNUSED */ +wire forwarding_csr_fwd; +wire[31:0] forwarding_csr_fwd_data; +/* verilator lint_on UNUSED */ +wire[31:0] forwarding_src1_fwd_data; +wire[31:0] forwarding_src2_fwd_data; + + +// Internal +wire total_freeze; +wire interrupt; +wire debug; + +assign debug = 1'b0; +assign interrupt = 1'b0; +assign total_freeze = fetch_delay || memory_delay; + + + +VX_fetch vx_fetch( + .clk(clk), + .reset(reset), + .in_branch_dir(memory_branch_dir), + .in_freeze(total_freeze), + .in_branch_dest(memory_branch_dest), + .in_branch_stall(decode_branch_stall), + .in_fwd_stall(forwarding_fwd_stall), + .in_branch_stall_exe(execute_branch_stall), + .in_jal(e_m_jal), + .in_jal_dest(e_m_jal_dest), + .in_interrupt(interrupt), + .in_debug(debug), + .in_instruction(fe_instruction), + + .out_instruction(fetch_instruction), + .out_delay(fetch_delay), + .out_curr_PC(fetch_curr_PC), + .out_valid(fetch_valid) ); -assign de_instruction = d_instruction; + +VX_f_d_reg vx_f_d_reg( + .clk(clk), + .reset(reset), + .in_instruction(fetch_instruction), + .in_valid(fetch_valid), + .in_curr_PC(fetch_curr_PC), + .in_fwd_stall(forwarding_fwd_stall), + .in_freeze(total_freeze), + .out_instruction(f_d_instruction), + .out_curr_PC(f_d_curr_PC), + .out_valid(f_d_valid) + ); + + +VX_decode vx_decode( + .clk(clk), + .in_instruction(f_d_instruction), + .in_curr_PC(f_d_curr_PC), + .in_valid(f_d_valid), + .in_write_data(writeback_write_data), + .in_rd(writeback_rd), + .in_wb(writeback_wb), + + .in_src1_fwd(forwarding_src1_fwd), + .in_src1_fwd_data(forwarding_src1_fwd_data), + .in_src2_fwd(forwarding_src2_fwd), + .in_src2_fwd_data(forwarding_src2_fwd_data), + + .out_csr_address(decode_csr_address), + .out_is_csr(decode_is_csr), + .out_csr_mask(decode_csr_mask), + + .out_rd(decode_rd), + .out_rs1(decode_rs1), + .out_rd1(decode_rd1), + .out_rs2(decode_rs2), + .out_rd2(decode_rd2), + .out_wb(decode_wb), + .out_alu_op(decode_alu_op), + .out_rs2_src(decode_rs2_src), + .out_itype_immed(decode_itype_immed), + .out_mem_read(decode_mem_read), + .out_mem_write(decode_mem_write), + .out_branch_type(decode_branch_type), + .out_branch_stall(decode_branch_stall), + .out_jal(decode_jal), + .out_jal_offset(decode_jal_offset), + .out_upper_immed(decode_upper_immed), + .out_PC_next(decode_PC_next), + .out_valid(decode_valid) + ); + + +VX_d_e_reg vx_d_e_reg( + .clk(clk), + .in_rd(decode_rd), + .in_rs1(decode_rs1), + .in_rd1(decode_rd1), + .in_rs2(decode_rs2), + .in_rd2(decode_rd2), + .in_alu_op(decode_alu_op), + .in_wb(decode_wb), + .in_rs2_src(decode_rs2_src), + .in_itype_immed(decode_itype_immed), + .in_mem_read(decode_mem_read), + .in_mem_write(decode_mem_write), + .in_PC_next(decode_PC_next), + .in_branch_type(decode_branch_type), + .in_fwd_stall(forwarding_fwd_stall), + .in_branch_stall(execute_branch_stall), + .in_upper_immed(decode_upper_immed), + .in_csr_address(decode_csr_address), + .in_is_csr(decode_is_csr), + .in_csr_mask(decode_csr_mask), + .in_curr_PC(f_d_curr_PC), + .in_jal(decode_jal), + .in_jal_offset(decode_jal_offset), + .in_freeze(total_freeze), + .in_valid(decode_valid), + + .out_csr_address(d_e_csr_address), + .out_is_csr(d_e_is_csr), + .out_csr_mask(d_e_csr_mask), + .out_rd(d_e_rd), + .out_rs1(d_e_rs1), + .out_rd1(d_e_rd1), + .out_rs2(d_e_rs2), + .out_rd2(d_e_rd2), + .out_alu_op(d_e_alu_op), + .out_wb(d_e_wb), + .out_rs2_src(d_e_rs2_src), + .out_itype_immed(d_e_itype_immed), + .out_mem_read(d_e_mem_read), + .out_mem_write(d_e_mem_write), + .out_branch_type(d_e_branch_type), + .out_upper_immed(d_e_upper_immed), + .out_curr_PC(d_e_curr_PC), + .out_jal(d_e_jal), + .out_jal_offset(d_e_jal_offset), + .out_PC_next(d_e_PC_next), + .out_valid(d_e_valid) + ); + +VX_execute vx_execute( + .in_rd(d_e_rd), + .in_rs1(d_e_rs1), + .in_rd1(d_e_rd1), + .in_rs2(d_e_rs2), + .in_rd2(d_e_rd2), + .in_alu_op(d_e_alu_op), + .in_wb(d_e_wb), + .in_rs2_src(d_e_rs2_src), + .in_itype_immed(d_e_itype_immed), + .in_mem_read(d_e_mem_read), + .in_mem_write(d_e_mem_write), + .in_PC_next(d_e_PC_next), + .in_branch_type(d_e_branch_type), + .in_upper_immed(d_e_upper_immed), + .in_csr_address(d_e_csr_address), + .in_is_csr(d_e_is_csr), + .in_csr_data(csr_decode_csr_data), + .in_csr_mask(d_e_csr_mask), + .in_jal(d_e_jal), + .in_jal_offset(d_e_jal_offset), + .in_curr_PC(d_e_curr_PC), + .in_valid(d_e_valid), + + .out_csr_address(execute_csr_address), + .out_is_csr(execute_is_csr), + .out_csr_result(execute_csr_result), + .out_alu_result(execute_alu_result), + .out_rd(execute_rd), + .out_wb(execute_wb), + .out_rs1(execute_rs1), + .out_rd1(execute_rd1), + .out_rs2(execute_rs2), + .out_rd2(execute_rd2), + .out_mem_read(execute_mem_read), + .out_mem_write(execute_mem_write), + .out_jal(execute_jal), + .out_jal_dest(execute_jal_dest), + .out_branch_offset(execute_branch_offset), + .out_branch_stall(execute_branch_stall), + .out_PC_next(execute_PC_next), + .out_valid(execute_valid) + ); + + +VX_e_m_reg vx_e_m_reg( + .clk(clk), + .in_alu_result(execute_alu_result), + .in_rd(execute_rd), + .in_wb(execute_wb), + .in_rs1(execute_rs1), + .in_rd1(execute_rd1), + .in_rs2(execute_rs2), + .in_rd2(execute_rd2), + .in_mem_read(execute_mem_read), + .in_mem_write(execute_mem_write), + .in_PC_next(execute_PC_next), + .in_csr_address(execute_csr_address), + .in_is_csr(execute_is_csr), + .in_csr_result(execute_csr_result), + .in_curr_PC(d_e_curr_PC), + .in_branch_offset(execute_branch_offset), + .in_branch_type(d_e_branch_type), + .in_jal(execute_jal), + .in_jal_dest(execute_jal_dest), + .in_freeze(total_freeze), + .in_valid(execute_valid), + + .out_csr_address(e_m_csr_address), + .out_is_csr(e_m_is_csr), + .out_csr_result(e_m_csr_result), + .out_alu_result(e_m_alu_result), + .out_rd(e_m_rd), + .out_wb(e_m_wb), + .out_rs1(e_m_rs1), + .out_rd1(e_m_rd1), + .out_rd2(e_m_rd2), + .out_rs2(e_m_rs2), + .out_mem_read(e_m_mem_read), + .out_mem_write(e_m_mem_write), + .out_curr_PC(e_m_curr_PC), + .out_branch_offset(e_m_branch_offset), + .out_branch_type(e_m_branch_type), + .out_jal(e_m_jal), + .out_jal_dest(e_m_jal_dest), + .out_PC_next(e_m_PC_next), + .out_valid(e_m_valid) + ); + +VX_memory vx_memory( + .in_alu_result(e_m_alu_result), + .in_mem_read(e_m_mem_read), + .in_mem_write(e_m_mem_write), + .in_rd(e_m_rd), + .in_wb(e_m_wb), + .in_rs1(e_m_rs1), + .in_rs2(e_m_rs2), + .in_rd2(e_m_rd2), + .in_PC_next(e_m_PC_next), + .in_curr_PC(e_m_curr_PC), + .in_branch_offset(e_m_branch_offset), + .in_branch_type(e_m_branch_type), + .in_valid(e_m_valid), + .in_cache_driver_out_data(in_cache_driver_out_data), + + .out_alu_result(memory_alu_result), + .out_mem_result(memory_mem_result), + .out_rd(memory_rd), + .out_wb(memory_wb), + .out_rs1(memory_rs1), + .out_rs2(memory_rs2), + .out_branch_dir(memory_branch_dir), + .out_branch_dest(memory_branch_dest), + .out_delay(memory_delay), + .out_PC_next(memory_PC_next), + .out_valid(memory_valid), + .out_cache_driver_in_address(out_cache_driver_in_address), + .out_cache_driver_in_mem_read(out_cache_driver_in_mem_read), + .out_cache_driver_in_mem_write(out_cache_driver_in_mem_write), + .out_cache_driver_in_data(out_cache_driver_in_data) + ); + +VX_m_w_reg vx_m_w_reg( + .clk(clk), + .in_alu_result(memory_alu_result), + .in_mem_result(memory_mem_result), + .in_rd(memory_rd), + .in_wb(memory_wb), + .in_rs1(memory_rs1), + .in_rs2(memory_rs2), + .in_PC_next(memory_PC_next), + .in_freeze(total_freeze), + .in_valid(memory_valid), + + .out_alu_result(m_w_alu_result), + .out_mem_result(m_w_mem_result), + .out_rd(m_w_rd), + .out_wb(m_w_wb), + .out_rs1(m_w_rs1), + .out_rs2(m_w_rs2), + .out_PC_next(m_w_PC_next), + .out_valid(m_w_valid) + ); + + +VX_writeback vx_writeback( + .in_alu_result(m_w_alu_result), + .in_mem_result(m_w_mem_result), + .in_rd(m_w_rd), + .in_wb(m_w_wb), + .in_PC_next(m_w_PC_next), + + .out_write_data(writeback_write_data), + .out_rd(writeback_rd), + .out_wb(writeback_wb) + ); + + +VX_forwarding vx_forwarding( + .in_decode_src1(decode_rs1), + .in_decode_src2(decode_rs2), + .in_decode_csr_address(decode_csr_address), + + .in_execute_dest(execute_rd), + .in_execute_wb(execute_wb), + .in_execute_alu_result(execute_alu_result), + .in_execute_PC_next(execute_PC_next), + .in_execute_is_csr(execute_is_csr), + .in_execute_csr_address(execute_csr_address), + + .in_memory_dest(memory_rd), + .in_memory_wb(memory_wb), + .in_memory_alu_result(memory_alu_result), + .in_memory_mem_data(memory_mem_result), + .in_memory_PC_next(memory_PC_next), + .in_memory_is_csr(e_m_is_csr), + .in_memory_csr_address(e_m_csr_address), + .in_memory_csr_result(e_m_csr_result), + + .in_writeback_dest(m_w_rd), + .in_writeback_wb(m_w_wb), + .in_writeback_alu_result(m_w_alu_result), + .in_writeback_mem_data(m_w_mem_result), + .in_writeback_PC_next(m_w_PC_next), + + .out_src1_fwd(forwarding_src1_fwd), + .out_src2_fwd(forwarding_src2_fwd), + .out_csr_fwd(forwarding_csr_fwd), + .out_src1_fwd_data(forwarding_src1_fwd_data), + .out_src2_fwd_data(forwarding_src2_fwd_data), + .out_csr_fwd_data(forwarding_csr_fwd_data), + .out_fwd_stall(forwarding_fwd_stall) + ); + +VX_csr_handler vx_csr_handler( + .clk(clk), + .in_decode_csr_address(decode_csr_address), + .in_mem_csr_address(e_m_csr_address), + .in_mem_is_csr(e_m_is_csr), + .in_mem_csr_result(e_m_csr_result), + .in_wb_valid(m_w_valid), + + .out_decode_csr_data(csr_decode_csr_data) + ); + + endmodule // Vortex