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extending basic test

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This commit is contained in:
Blaise Tine
2020-04-02 08:46:32 -07:00
parent efd3c1d154
commit 6463cca529
14 changed files with 180 additions and 46 deletions
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30
driver/hw/Makefile
View File

@@ -1,27 +1,35 @@
BUILD_DIR=build_sim
BUILD_DIR=build_ase
all: ase fpga
ase: build-setup
ase: setup-ase
make -C $(BUILD_DIR)
fpga: build-setup
# TODO
fpga: setup-fpga
cd build_fpga && qsub-synth
build-setup: $(BUILD_DIR)/Makefile
setup-ase: build_ase/Makefile
$(BUILD_DIR)/Makefile:
afu_sim_setup --sources=sources.txt --platform discrete_pcie3 $(BUILD_DIR) -f
setup-fpga: build_fpga/build/dcp.qpf
build_ase/Makefile:
afu_sim_setup --s sources.txt build_ase
build_fpga/build/dcp.qpf:
afu_synth_setup -s sources.txt build_fpga
run-ase:
cd $(BUILD_DIR) && MENT_VSIM_OPT="-dpicpppath /usr/bin/gcc" make sim
cd build_ase && make sim
wave:
vsim -view $(BUILD_DIR)/work/vsim.wlf -do wave.do
vsim -view build_ase/work/vsim.wlf -do wave.do
run-fpga:
# TODO
clean:
rm -rf $(BUILD_DIR)
clean-ase:
rm -rf build_ase
clean-fpga:
rm -rf build_fpga

3
driver/hw/vortex_afu.sv
View File

@@ -175,7 +175,8 @@ begin
16'h0006: af2cp_sTxPort.c2.data <= 64'h0; // next AFU
16'h0008: af2cp_sTxPort.c2.data <= 64'h0; // reserved
MMIO_CSR_STATUS: begin
$display("%t: STATUS: state=%0d", $time, state);
if (state != af2cp_sTxPort.c2.data)
$display("%t: STATUS: state=%0d", $time, state);
af2cp_sTxPort.c2.data <= state;
end
default: af2cp_sTxPort.c2.data <= 64'h0;