Before ISA2.0
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@@ -3,13 +3,11 @@
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module VX_fetch (
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input wire clk,
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input wire in_memory_delay,
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VX_wstall_inter VX_wstall,
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input wire schedule_delay,
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VX_icache_response_inter icache_response,
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VX_icache_request_inter icache_request,
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output wire out_delay,
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output wire out_ebreak,
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VX_jal_response_inter VX_jal_rsp,
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VX_branch_response_inter VX_branch_rsp,
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@@ -17,15 +15,11 @@ module VX_fetch (
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VX_warp_ctl_inter VX_warp_ctl
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);
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// Inputs
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wire in_freeze = out_delay || in_memory_delay;
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// Locals
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wire pipe_stall;
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assign pipe_stall = in_freeze || schedule_delay;
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assign pipe_stall = schedule_delay;
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wire[`NT_M1:0] thread_mask;
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wire[`NW_M1:0] warp_num;
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@@ -66,8 +60,6 @@ module VX_fetch (
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);
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assign out_delay = 0;
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assign icache_request.pc_address = warp_pc;
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assign fe_inst_meta_fd.warp_num = warp_num;
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assign fe_inst_meta_fd.valid = thread_mask;
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