From 5e5c625759175bbed0e92c57602345d897918518 Mon Sep 17 00:00:00 2001 From: Hansung Kim Date: Mon, 27 Nov 2023 16:06:16 -0800 Subject: [PATCH] Write 0 instead of x for VX_CSR_MPM_RESERVED Otherwise it makes verification hard with tools that don't process x's well. --- hw/rtl/core/VX_csr_data.sv | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/hw/rtl/core/VX_csr_data.sv b/hw/rtl/core/VX_csr_data.sv index f959d93b..881d489e 100644 --- a/hw/rtl/core/VX_csr_data.sv +++ b/hw/rtl/core/VX_csr_data.sv @@ -163,8 +163,10 @@ import VX_fpu_pkg::*; `VX_CSR_NUM_CORES : read_data_ro_r = 32'(`NUM_CORES * `NUM_CLUSTERS); `VX_CSR_MCYCLE : read_data_ro_r = 32'(cycles[31:0]); `VX_CSR_MCYCLE_H : read_data_ro_r = 32'(cycles[`PERF_CTR_BITS-1:32]); - `VX_CSR_MPM_RESERVED : read_data_ro_r = 'x; - `VX_CSR_MPM_RESERVED_H : read_data_ro_r = 'x; + // NOTE(hansung): setting to 'x makes verification with simx hard; + // set to '0 instead + `VX_CSR_MPM_RESERVED : read_data_ro_r = 32'h0; + `VX_CSR_MPM_RESERVED_H : read_data_ro_r = 32'h0; `VX_CSR_MINSTRET : read_data_ro_r = 32'(commit_csr_if.instret[31:0]); `VX_CSR_MINSTRET_H : read_data_ro_r = 32'(commit_csr_if.instret[`PERF_CTR_BITS-1:32]);