diff --git a/hw/rtl/cache/VX_bank.v b/hw/rtl/cache/VX_bank.v
index 0f79f881..590ee91d 100644
--- a/hw/rtl/cache/VX_bank.v
+++ b/hw/rtl/cache/VX_bank.v
@@ -1,4 +1,4 @@
-`include "VX_cache_config.vh"
+`include "VX_cache_define.vh"
 
 module VX_bank #(
     parameter CACHE_ID                      = 0,
diff --git a/hw/rtl/cache/VX_cache.v b/hw/rtl/cache/VX_cache.v
index bbb658ea..f3ade5e9 100644
--- a/hw/rtl/cache/VX_cache.v
+++ b/hw/rtl/cache/VX_cache.v
@@ -1,4 +1,4 @@
-`include "VX_cache_config.vh"
+`include "VX_cache_define.vh"
 
 module VX_cache #(
     parameter CACHE_ID                      = 0,
diff --git a/hw/rtl/cache/VX_cache_core_req_bank_sel.v b/hw/rtl/cache/VX_cache_core_req_bank_sel.v
index 554b8583..0631c5a8 100644
--- a/hw/rtl/cache/VX_cache_core_req_bank_sel.v
+++ b/hw/rtl/cache/VX_cache_core_req_bank_sel.v
@@ -1,4 +1,4 @@
-`include "VX_cache_config.vh"
+`include "VX_cache_define.vh"
 
 module VX_cache_core_req_bank_sel #(  
     parameter CACHE_ID          = 0,
diff --git a/hw/rtl/cache/VX_cache_core_rsp_merge.v b/hw/rtl/cache/VX_cache_core_rsp_merge.v
index e7ab960d..1254be81 100644
--- a/hw/rtl/cache/VX_cache_core_rsp_merge.v
+++ b/hw/rtl/cache/VX_cache_core_rsp_merge.v
@@ -1,4 +1,4 @@
-`include "VX_cache_config.vh"
+`include "VX_cache_define.vh"
 
 module VX_cache_core_rsp_merge #(
     parameter CACHE_ID          = 0,
diff --git a/hw/rtl/cache/VX_cache_config.vh b/hw/rtl/cache/VX_cache_define.vh
similarity index 100%
rename from hw/rtl/cache/VX_cache_config.vh
rename to hw/rtl/cache/VX_cache_define.vh
diff --git a/hw/rtl/cache/VX_data_access.v b/hw/rtl/cache/VX_data_access.v
index fbec1107..265fa327 100644
--- a/hw/rtl/cache/VX_data_access.v
+++ b/hw/rtl/cache/VX_data_access.v
@@ -1,4 +1,4 @@
-`include "VX_cache_config.vh"
+`include "VX_cache_define.vh"
 
 module VX_data_access #(
     parameter CACHE_ID          = 0,
diff --git a/hw/rtl/cache/VX_flush_ctrl.v b/hw/rtl/cache/VX_flush_ctrl.v
index d9b7ca9d..356781d1 100644
--- a/hw/rtl/cache/VX_flush_ctrl.v
+++ b/hw/rtl/cache/VX_flush_ctrl.v
@@ -1,4 +1,4 @@
-`include "VX_cache_config.vh"
+`include "VX_cache_define.vh"
 
 module VX_flush_ctrl #(
     // Size of cache in bytes
diff --git a/hw/rtl/cache/VX_miss_resrv.v b/hw/rtl/cache/VX_miss_resrv.v
index 55755d61..6bf3aa8c 100644
--- a/hw/rtl/cache/VX_miss_resrv.v
+++ b/hw/rtl/cache/VX_miss_resrv.v
@@ -1,4 +1,4 @@
-`include "VX_cache_config.vh"
+`include "VX_cache_define.vh"
 
 module VX_miss_resrv #(
     parameter CACHE_ID          = 0,
diff --git a/hw/rtl/cache/VX_shared_mem.v b/hw/rtl/cache/VX_shared_mem.v
index 3ebf485d..44b2f42b 100644
--- a/hw/rtl/cache/VX_shared_mem.v
+++ b/hw/rtl/cache/VX_shared_mem.v
@@ -1,4 +1,4 @@
-`include "VX_cache_config.vh"
+`include "VX_cache_define.vh"
 
 module VX_shared_mem #(
     parameter CACHE_ID                      = 0,
diff --git a/hw/rtl/cache/VX_tag_access.v b/hw/rtl/cache/VX_tag_access.v
index 829f4006..ef2c6347 100644
--- a/hw/rtl/cache/VX_tag_access.v
+++ b/hw/rtl/cache/VX_tag_access.v
@@ -1,4 +1,4 @@
-`include "VX_cache_config.vh"
+`include "VX_cache_define.vh"
 
 module VX_tag_access #(
     parameter CACHE_ID          = 0,
diff --git a/hw/rtl/interfaces/VX_cache_mem_req_if.v b/hw/rtl/interfaces/VX_cache_mem_req_if.v
index b761b61f..08b1c4ef 100644
--- a/hw/rtl/interfaces/VX_cache_mem_req_if.v
+++ b/hw/rtl/interfaces/VX_cache_mem_req_if.v
@@ -1,7 +1,7 @@
 `ifndef VX_CACHE_MEM_REQ_IF
 `define VX_CACHE_MEM_REQ_IF
 
-`include "../cache/VX_cache_config.vh"
+`include "../cache/VX_cache_define.vh"
 
 interface VX_cache_mem_req_if #(
     parameter MEM_LINE_WIDTH = 1,
diff --git a/hw/rtl/interfaces/VX_cache_mem_rsp_if.v b/hw/rtl/interfaces/VX_cache_mem_rsp_if.v
index eb4abf26..06cd6eed 100644
--- a/hw/rtl/interfaces/VX_cache_mem_rsp_if.v
+++ b/hw/rtl/interfaces/VX_cache_mem_rsp_if.v
@@ -1,7 +1,7 @@
 `ifndef VX_CACHE_MEM_RSP_IF
 `define VX_CACHE_MEM_RSP_IF
 
-`include "../cache/VX_cache_config.vh"
+`include "../cache/VX_cache_define.vh"
 
 interface VX_cache_mem_rsp_if #(
     parameter MEM_LINE_WIDTH = 1,
diff --git a/hw/rtl/interfaces/VX_dcache_core_req_if.v b/hw/rtl/interfaces/VX_dcache_core_req_if.v
index 6fd95087..6addead8 100644
--- a/hw/rtl/interfaces/VX_dcache_core_req_if.v
+++ b/hw/rtl/interfaces/VX_dcache_core_req_if.v
@@ -1,7 +1,7 @@
 `ifndef VX_DCACHE_CORE_REQ_IF
 `define VX_DCACHE_CORE_REQ_IF
 
-`include "../cache/VX_cache_config.vh"
+`include "../cache/VX_cache_define.vh"
 
 interface VX_dcache_core_req_if #(
     parameter NUM_REQS       = 1,
diff --git a/hw/rtl/interfaces/VX_dcache_core_rsp_if.v b/hw/rtl/interfaces/VX_dcache_core_rsp_if.v
index 6732e455..c2196b77 100644
--- a/hw/rtl/interfaces/VX_dcache_core_rsp_if.v
+++ b/hw/rtl/interfaces/VX_dcache_core_rsp_if.v
@@ -1,7 +1,7 @@
 `ifndef VX_DCACHE_CORE_RSP_IF
 `define VX_DCACHE_CORE_RSP_IF
 
-`include "../cache/VX_cache_config.vh"
+`include "../cache/VX_cache_define.vh"
 
 interface VX_dcache_core_rsp_if #(
     parameter NUM_REQS       = 1,
diff --git a/hw/rtl/interfaces/VX_icache_core_req_if.v b/hw/rtl/interfaces/VX_icache_core_req_if.v
index 2edb05d9..550e597c 100644
--- a/hw/rtl/interfaces/VX_icache_core_req_if.v
+++ b/hw/rtl/interfaces/VX_icache_core_req_if.v
@@ -1,7 +1,7 @@
 `ifndef VX_ICACHE_CORE_REQ_IF
 `define VX_ICACHE_CORE_REQ_IF
 
-`include "../cache/VX_cache_config.vh"
+`include "../cache/VX_cache_define.vh"
 
 interface VX_icache_core_req_if #(
     parameter WORD_SIZE      = 1,
diff --git a/hw/rtl/interfaces/VX_icache_core_rsp_if.v b/hw/rtl/interfaces/VX_icache_core_rsp_if.v
index 54ffa56d..75ebcc1e 100644
--- a/hw/rtl/interfaces/VX_icache_core_rsp_if.v
+++ b/hw/rtl/interfaces/VX_icache_core_rsp_if.v
@@ -1,7 +1,7 @@
 `ifndef VX_ICACHE_CORE_RSP_IF
 `define VX_ICACHE_CORE_RSP_IF
 
-`include "../cache/VX_cache_config.vh"
+`include "../cache/VX_cache_define.vh"
 
 interface VX_icache_core_rsp_if #(
     parameter WORD_SIZE      = 1,