diff --git a/hw/rtl/VX_decode.v b/hw/rtl/VX_decode.v
index ecfc9031..628a5f27 100644
--- a/hw/rtl/VX_decode.v
+++ b/hw/rtl/VX_decode.v
@@ -89,8 +89,8 @@ module VX_decode  #(
                 imm     = {{20{alu_imm[11]}}, alu_imm};
                 use_rd  = 1;
                 use_imm = 1;
-                `USED_REGS(1'b0, rd);
-                `USED_REGS(1'b0, rs1);
+                `USED_REGS (1'b0, rd);
+                `USED_REGS (1'b0, rs1);
             end
             `INST_R: begin 
                 ex_type = `EX_ALU;
@@ -125,9 +125,9 @@ module VX_decode  #(
                     op_mod  = 0; 
                 end                
                 use_rd = 1;
-                `USED_REGS(1'b0, rd);
-                `USED_REGS(1'b0, rs1);
-                `USED_REGS(1'b0, rs2);
+                `USED_REGS (1'b0, rd);
+                `USED_REGS (1'b0, rs1);
+                `USED_REGS (1'b0, rs2);
             end
             `INST_LUI: begin 
                 ex_type = `EX_ALU;
@@ -137,8 +137,8 @@ module VX_decode  #(
                 imm     = {upper_imm, 12'(0)};
                 use_rd  = 1;
                 use_imm = 1;                
-                `USED_REGS(1'b0, rd);
-                `USED_REGS(1'b0, 5'b0);
+                `USED_REGS (1'b0, rd);
+                `USED_REGS (1'b0, 5'b0);
             end
             `INST_AUIPC: begin 
                 ex_type = `EX_ALU;
@@ -148,7 +148,7 @@ module VX_decode  #(
                 use_rd  = 1;
                 use_PC  = 1;
                 use_imm = 1;
-                `USED_REGS(1'b0, rd);
+                `USED_REGS (1'b0, rd);
             end
             `INST_JAL: begin 
                 ex_type = `EX_ALU;
@@ -159,7 +159,7 @@ module VX_decode  #(
                 use_PC  = 1;
                 use_imm = 1;
                 is_wstall = 1;
-                `USED_REGS(1'b0, rd);
+                `USED_REGS (1'b0, rd);
             end
             `INST_JALR: begin 
                 ex_type = `EX_ALU;
@@ -169,8 +169,8 @@ module VX_decode  #(
                 use_rd  = 1;
                 use_imm = 1;
                 is_wstall = 1;
-                `USED_REGS(1'b0, rd);
-                `USED_REGS(1'b0, rs1);
+                `USED_REGS (1'b0, rd);
+                `USED_REGS (1'b0, rs1);
             end
             `INST_B: begin 
                 ex_type = `EX_ALU;
@@ -188,8 +188,8 @@ module VX_decode  #(
                 use_PC  = 1;
                 use_imm = 1;
                 is_wstall = 1;
-                `USED_REGS(1'b0, rs1);
-                `USED_REGS(1'b0, rs2);
+                `USED_REGS (1'b0, rs1);
+                `USED_REGS (1'b0, rs2);
             end
             `INST_SYS : begin 
                 if (func3 == 0) begin                    
@@ -207,7 +207,7 @@ module VX_decode  #(
                     use_rd  = 1;
                     use_PC  = 1;
                     use_imm = 1;
-                    `USED_REGS(1'b0, rd);
+                    `USED_REGS (1'b0, rd);
                 end else begin
                     ex_type = `EX_CSR;
                     case (func3[1:0])
@@ -220,9 +220,9 @@ module VX_decode  #(
                     imm     = 32'(u_12);
                     use_rd  = 1;
                     use_imm = func3[2];
-                    `USED_REGS(1'b0, rd);
+                    `USED_REGS (1'b0, rd);
                     if (!func3[2]) 
-                        `USED_REGS(1'b0, rs1);
+                        `USED_REGS (1'b0, rs1);
                 end
             end
         `ifdef EXT_F_ENABLE
@@ -233,8 +233,8 @@ module VX_decode  #(
                 op_type = `OP_BITS'({1'b0, func3});
                 imm     = {{20{u_12[11]}}, u_12};
                 use_rd  = 1;                
-                `USED_REGS(1'b0, rs1);
-                `USED_REGS((opcode == `INST_FL), rd);
+                `USED_REGS (1'b0, rs1);
+                `USED_REGS ((opcode == `INST_FL), rd);
             `ifdef EXT_F_ENABLE               
                 rd_fp = (opcode == `INST_FL);
             `endif
@@ -246,8 +246,8 @@ module VX_decode  #(
                 ex_type = `EX_LSU;
                 op_type = `OP_BITS'({1'b1, func3});
                 imm     = {{20{func7[6]}}, func7, rd};
-                `USED_REGS(1'b0, rs1);
-                `USED_REGS((opcode == `INST_FS), rs2);        
+                `USED_REGS (1'b0, rs1);
+                `USED_REGS ((opcode == `INST_FS), rs2);        
             `ifdef EXT_F_ENABLE
                 rs2_fp = (opcode == `INST_FS);
             `endif
@@ -264,10 +264,10 @@ module VX_decode  #(
                 rd_fp   = 1;
                 rs1_fp  = 1;
                 rs2_fp  = 1;  
-                `USED_REGS(1'b1, rd);              
-                `USED_REGS(1'b1, rs1);
-                `USED_REGS(1'b1, rs2);
-                `USED_REGS(1'b1, rs3);
+                `USED_REGS (1'b1, rd);              
+                `USED_REGS (1'b1, rs1);
+                `USED_REGS (1'b1, rs2);
+                `USED_REGS (1'b1, rs3);
             end
             `INST_FCI: begin 
                 ex_type = `EX_FPU;
@@ -283,36 +283,36 @@ module VX_decode  #(
                         rd_fp   = 1;
                         rs1_fp  = 1;
                         rs2_fp  = 1;     
-                        `USED_REGS(1'b1, rd);
-                        `USED_REGS(1'b1, rs1);
-                        `USED_REGS(1'b1, rs2);
+                        `USED_REGS (1'b1, rd);
+                        `USED_REGS (1'b1, rs1);
+                        `USED_REGS (1'b1, rs2);
                     end
                     7'h2C: begin
                         op_type = `OP_BITS'(`FPU_SQRT);
                         rd_fp   = 1;
                         rs1_fp  = 1;    
-                        `USED_REGS(1'b1, rd);
-                        `USED_REGS(1'b1, rs1);
+                        `USED_REGS (1'b1, rd);
+                        `USED_REGS (1'b1, rs1);
                     end
                     7'h50: begin
                         op_type = `OP_BITS'(`FPU_CMP);
                         rs1_fp  = 1;
                         rs2_fp  = 1;     
-                        `USED_REGS(1'b0, rd);
-                        `USED_REGS(1'b1, rs1);
-                        `USED_REGS(1'b1, rs2);
+                        `USED_REGS (1'b0, rd);
+                        `USED_REGS (1'b1, rs1);
+                        `USED_REGS (1'b1, rs2);
                     end
                     7'h60: begin
                         op_type = (instr[20]) ? `OP_BITS'(`FPU_CVTWUS) : `OP_BITS'(`FPU_CVTWS);
                         rs1_fp  = 1; 
-                        `USED_REGS(1'b0, rd);
-                        `USED_REGS(1'b1, rs1);
+                        `USED_REGS (1'b0, rd);
+                        `USED_REGS (1'b1, rs1);
                     end
                     7'h68: begin
                         op_type = (instr[20]) ? `OP_BITS'(`FPU_CVTSWU) : `OP_BITS'(`FPU_CVTSW);
                         rd_fp   = 1;
-                        `USED_REGS(1'b1, rd);
-                        `USED_REGS(1'b0, rs1);
+                        `USED_REGS (1'b1, rd);
+                        `USED_REGS (1'b0, rs1);
                     end
                     7'h10: begin
                         // FSGNJ=0, FSGNJN=1, FSGNJX=2
@@ -321,9 +321,9 @@ module VX_decode  #(
                         rd_fp   = 1;
                         rs1_fp  = 1;
                         rs2_fp  = 1;
-                        `USED_REGS(1'b1, rd);
-                        `USED_REGS(1'b1, rs1);
-                        `USED_REGS(1'b1, rs2);
+                        `USED_REGS (1'b1, rd);
+                        `USED_REGS (1'b1, rs1);
+                        `USED_REGS (1'b1, rs2);
                     end
                     7'h14: begin
                         // FMIN=3, FMAX=4
@@ -332,9 +332,9 @@ module VX_decode  #(
                         rd_fp   = 1;
                         rs1_fp  = 1;
                         rs2_fp  = 1;
-                        `USED_REGS(1'b1, rd);
-                        `USED_REGS(1'b1, rs1);
-                        `USED_REGS(1'b1, rs2);
+                        `USED_REGS (1'b1, rd);
+                        `USED_REGS (1'b1, rs1);
+                        `USED_REGS (1'b1, rs2);
                     end
                     7'h70: begin 
                         if (func3[0]) begin
@@ -346,15 +346,15 @@ module VX_decode  #(
                             op_mod  = 5;
                         end             
                         rs1_fp  = 1;  
-                        `USED_REGS(1'b0, rd);
-                        `USED_REGS(1'b1, rs1);                                           
+                        `USED_REGS (1'b0, rd);
+                        `USED_REGS (1'b1, rs1);                                           
                     end 
                     7'h78: begin 
                         // FMV.W.X=6
                         op_type = `OP_BITS'(`FPU_MISC); 
                         op_mod = 6;                         
                         rd_fp  = 1;
-                        `USED_REGS(1'b1, rd);
+                        `USED_REGS (1'b1, rd);
                     end
                 default:;
                 endcase
@@ -366,17 +366,17 @@ module VX_decode  #(
                     3'h0: begin
                         op_type = `OP_BITS'(`GPU_TMC);
                         is_wstall = 1;
-                        `USED_REGS(1'b0, rs1);
+                        `USED_REGS (1'b0, rs1);
                     end
                     3'h1: begin
                         op_type = `OP_BITS'(`GPU_WSPAWN);
-                        `USED_REGS(1'b0, rs1);
-                        `USED_REGS(1'b0, rs2);
+                        `USED_REGS (1'b0, rs1);
+                        `USED_REGS (1'b0, rs2);
                     end
                     3'h2: begin
                         op_type = `OP_BITS'(`GPU_SPLIT);
                         is_wstall = 1;
-                        `USED_REGS(1'b0, rs1);
+                        `USED_REGS (1'b0, rs1);
                     end
                     3'h3: begin 
                         op_type = `OP_BITS'(`GPU_JOIN);
@@ -385,8 +385,8 @@ module VX_decode  #(
                     3'h4: begin 
                         op_type = `OP_BITS'(`GPU_BAR);
                         is_wstall = 1;
-                        `USED_REGS(1'b0, rs1);
-                        `USED_REGS(1'b0, rs2);
+                        `USED_REGS (1'b0, rs1);
+                        `USED_REGS (1'b0, rs2);
                     end
                     default:;
                 endcase
diff --git a/hw/syn/quartus/vortex/Makefile b/hw/syn/quartus/vortex/Makefile
index 17e2023b..b2e90b31 100644
--- a/hw/syn/quartus/vortex/Makefile
+++ b/hw/syn/quartus/vortex/Makefile
@@ -1,13 +1,20 @@
+FAMILY = "Arria 10"
+DEVICE = 10AX115N3F40E2SG
+FPU_CORE_PATH=../../../rtl/fp_cores/altera/arria10
+
+#FAMILY = "Stratix 10"
+#DEVICE = 1SX280HN2F43E2VG
+#FPU_CORE_PATH=../../../rtl/fp_cores/altera/stratix10
+
 PROJECT = Vortex
 TOP_LEVEL_ENTITY = Vortex
-SRC_FILE = Vortex.v
-FPU_INCLUDE = ../../../rtl/fp_cores;../../../rtl/fp_cores/altera/arria10;../../../rtl/fp_cores/fpnew/src;../../../rtl/fp_cores/fpnew/src/fpu_div_sqrt_mvp/hdl;../../../rtl/fp_cores/fpnew/src/common_cells/include;../../../rtl/fp_cores/fpnew/src/common_cells/src
-RTL_INCLUDE = $(FPU_INCLUDE);../../../rtl;../../../rtl/libs;../../../rtl/interfaces;../../../rtl/cache
-PROJECT_FILES = $(PROJECT).qpf $(PROJECT).qsf
+SRC_FILE = Vortex.sv
 
-# Part, Family
-FAMILY = "Arria 10"
-DEVICE = 10AX115N3F40E2SG   
+RTL_DIR=../../../rtl
+FPU_INCLUDE = $(RTL_DIR)/fp_cores;$(FPU_CORE_PATH);$(RTL_DIR)/fp_cores/fpnew/src;$(RTL_DIR)/fp_cores/fpnew/src/fpu_div_sqrt_mvp/hdl;$(RTL_DIR)/fp_cores/fpnew/src/common_cells/include;$(RTL_DIR)/fp_cores/fpnew/src/common_cells/src
+RTL_INCLUDE = $(RTL_DIR);$(RTL_DIR)/libs;$(RTL_DIR)/interfaces;$(RTL_DIR)/cache;$(FPU_INCLUDE)
+
+PROJECT_FILES = $(PROJECT).qpf $(PROJECT).qsf
 
 # Executable Configuration
 SYN_ARGS = --parallel --read_settings_files=on